Ordering number : ENN2704C

LA6324N
Monolithic Linear IC

High-Performance http://onsemi.com

Quad Operational Amplifier

Overview
The LA6324 consists of four independent, high-performance, internally phase compensated operational amplifiers that
are designed to operate from a single power supply over a wide range of voltages. These four operational amplifiers are
packaged in a single package. As in case of conventional general-purpose operational amplifiers, operation from dual
power supplies is also possible and the power dissipation is low. It can be applied to various uses in commercial and
industrial equipment including all types of transducer amplifiers and DC amplifiers.

Features
• No phase compensation required
• Wide operating voltage range:
3.0 V to 30.0 V (single supply)
±1.5 V to ±15.0 V (dual supplies)
• Highly resistant to dielectric breakdown
• Input voltag range includes the neighborhood of GND level and output voltage range VOUT is from 0 to VCC –1.5 V.
• Small current dissipation:
ICC = 0.6 mA typ/VCC = + 5 V, RL = ∞

Specitications
Absolute Maximum Ratings at Ta = 25 °C
Parameter Symbol Conditions Ratings Unit
Maximum Supply voltage VCC max 32 V
Differential input voltage VID 32 V
Maximum input voltage VIN max -0.3 to +32 V
Allowable power dissipation Pd max LA6324N 720 mW
Operating temperature Topr -30 to +85 °C
Storage temperature Tstg -55 to +125 °C

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating
Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.

Semiconductor Components Industries, LLC, 2013

August, 2013 92706 / O2504TN(PC)/63096HA(II)/4138TA(KOTO) No.2704-1/5
 LA6324N
Operating Characteristics at Ta = 25 °C, VCC = +5 V
Ratings
Parameter Symbol Conditions Test circuit Unit
min typ max
Input offset voltage VIO 1 ±2 ±7 mV
Input offset current IIO IIN(+) / IIN(–) 2 ±5 ±50 nA
Input bias current IB IIN(+) / IIN(–) 3 45 250 nA
Common-mode input voltage range VICM 4 0 VCC –1.5 V
Common-mode rejection ratio CMR 4 65 80 dB
Voltage gain VG VCC = 15 V, RL ≥ 2 kΩ 5 25 100 V/mV
Output voltage range VOUT 0 VCC –1.5 V
Supply voltage rejection ratio SVR 6 65 100 dB
Channel separation CS f = 1 k to 20 kHz 7 120 dB
ICC 8 0.6 2 mA
Current drain
ICC VCC = 30 V 8 1.5 3 mA
Output current (Source) IO source VIN+ = 1 V, VIN– = 0 V 9 20 40 mA
Output current (Sink) IO sink VIN+ = 0 V, VIN– = 1 V 10 10 20 mA

Package Dimensions
unit : mm
3003B [LA6324N]
19.0
14 8
7.62
6.4

0.25

1 7
3.4 3.65max
(3.0)
0.51min

(1.88) 2.54 0.48 1.2

Equivalent Circuit Pin Assignment

(1 unit) (LA6324N)

VCC

VOUT1 1 14 VOUT4
1 4
VIN1- 2 - + + - 13 VIN4-

VIN1+ 3 12 VIN4+
VIN-
VCC 4 11 GND
VOUT
INPUT
VIN+ VIN2+ 5 10 VIN3+

VIN2- 6 9 VIN3-
2 3
VOUT2 7 8 VOUT3

Top view

No.2704-2/5
 LA6324N
Test Circuit
1. Input offset voltage VIO 2. Input offset current IIO

R1 VCC R2 R1 R VCC R2
- VCC - VCC
R1 + R1 R +
+ NULL VF1 + NULL VF2
- -
R2 R2
+1.4V VEE C +1.4V VEE C

VF1 VF2 - VF1

VIO = IIO =
1+R2/R1 R(1+R2/R1)

3. Input bias current IB

R1 R VCC R2 R1 VCC R2
- VCC - VCC
R1 + R1 R +
+ NULL + NULL
VF3 VF4
- -
R2 R2
+1.4V VEE C +1.4V VEE C

VF4 - VF3
IB =
2R(1+R2/R1)

4. Common-mode rejection ratio CMR 5. Voltage gain VG

Common-mode input voltage range VICM

R1 VCC R2 R1 VCC R2
- VCC - VCC
R1 + VF5,VF6 R1 + VF7,VF8
+ NULL + NULL
EC1, VEE - -
EC2 R2 R2 RL
VEE C EK1, VEE C
EK2

(EC1 - EC2) (1+R2/R1) (EK1 - EK2) (1+R2/R1)

CMR = 20 log VF5 - VF6 VG = VF8 - VF7

6. Supply voltage rejection ratio SVR

R1 VCC1, R2 R1 VCC R2
- VCC2 VCC - VCC
R1 + VF9,VF10 R1 + VF11,VF12
+ NULL + NULL
VEE - VEE1, -
R2 R2 VEE2
VEE C VEE C

(1+R2/R1) (VCC1 - VCC2) (1+R2/R1) (VEE1 - VEE2 )

SVR (+) = 20 log SVR (-) = 20 log
VF9 - VF10 VF11 - VF12

7. Channel separation CS
R2
SW: a R2 VOA
a
R1 VCC CS (A B) = 20 log
R1 VOB
b -
VCC/2 A
C + RL SW: b R2 VOB
VCC/2
CS (B A) = 20 log
A VO R1 VOA
R2
b B These apply also to other channels.
R1 VCC
a -
B
VIN VCC/2 + RL
VCC/2

No.2704-3/5
 LA6324N
8. Current drain ICC 9. Output current IO source 10. Output current IO sink

VCC VCC

- +1V -
A VO A VO
+1V + +

VCC

ICC - VCC IB - VCC

4.0 100

80

Input bias current, IB - nA

3.0
Current drain, ICC - mA

60

2.0

40

1.0
20

0 0
0 10 20 30 40 0 10 20 30 40
Supply voltage, VCC - V Supply voltage, VCC - V

IO (source) - Ta VG - VCC
70 160

60
Output current, IO (source) - mA

120
Voltage gain, VG - dB

50

40 80

30

40
20

10 0
-20 0 20 40 60 80 0 10 20 30 40
Supply voltage, VCC - V

VO - f VG - f
24 140
Output voltage amplitude, VOUT - Vp-p

120
20

100
Voltage gain, VG - dB

16

80
12
60

8
40

4 20

0 0
1k 2 3 5 10k 2 3 5 100k 2 3 5 1M 1 10 100 1k 10k 100k 1M 10M
Frequency, f - Hz Frequency, f - Hz

No.2704-4/5
 LA6324N
Pd max - Ta Pd max - Ta
800 360
LA6324N LA6324NM

Allowable power dissipation, Pd max - mW

Allowable power dissipation, Pd max - mW 720 25
700 320

280
600

240
500
200
400
160
300
120

200
80

100 40

0 0
-30 0 30 60 85 90 120 -40 -30 -20 0 20 40 60 80 85 100

Sample Application Circuits

Noninverting DC amplifier Rectangular wave oscillator Inverting AC amplifier

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PS No.2704-5/5