Code Ni: R2022061 (x20 ) Cser-1) TER. Tech TI Semester Regular Examinations, Jume/Futy - 2022 COMPUTER ORGANIZATIONS ARCHITECTURE. (Common to CST, CSE(CS). CSECOTCSIBCT), CSETOT) &CS) Fime: 3 hours Max. Marks: 70 ‘Answer any FIVE Questions each Question from each unit All Questions carry Equal Marks UNIT- | a) Show the value of all bits of a 12-bit register that hold the number equivalent to (7) decimal 215 in (i) binary (i) binary-coded octal (iii) binary-coded hexadecimal (iv) binary-coded decimal (BCD) b) Derive and explain an algorithm for adding and subtracting 2 floating point binary (™] numbers Or ) Perform the arithmetic operations ( +70) + ( +80) and ( -70) + ( -80) with binary [7M] numbers in signed-2's complement representation. Use eight bits to accommodate cach number together with its sign. Show that overflow occurs in both cases, that the last two carries are unequal, and that there is a sign reversal, b) Discuss hardware implementation of the booth's multiplication, Discuss with an (™) example. UNIT =I 3 a) Design a Full - subtractor circuit with three inputs X, Y, Z and outputs D, B. The [7M] circuit subtracts X - Y - Z where Z is the input borrow, B is the output borrow and D is the difference. Draw the circuit using NAND gates. b) Explain different memory reference instructions. c™) Or 4 a) Briefly explain the arithmetic logie shift unit. (8M] bb) What are registers? Explain the use of accumulator and program counter registers (om) used in computers. UNIT -I 5 What are the different fields in the instruction format? Evaluate R =(X*¥) (A-B) [14M] arithmetic statement using 0 address, 1 address, 2 address and 3 address instruction formats, Or 6 a) Explain the concept of address sequencing for control memory. (SM) b) Write the major characteristics of RISC and explain. (om) Lof2 reer nelCode No:R2022061 (a0) UNIT-IV What is the difference between synchronous and asynchronous data transfer? 9 10 a) b) a) b) a) b) a) » What is virtual memory? How is it realized? Explain its use. Or Explain about Input-output interface with an example, ‘A pwo-way set associative cache memory uses blocks of four words. The cache can accommodate a total of 2048 words for main memory. The main memory size is 128K X 32 ) Formulate all pertinent information required to construct the cache memory. ii) What is the size of the cache memory? UNIT-V ‘Write about the SIMD array processor organization. Explain the vector processing with suitable applications, or Write short notes on Shared Memory Multiprocessors. Describe in detail about pipeline processing. 2of2 reurrrl (™) (7M) (7) (7M) (™) (7M) (7M) (7M)Code Nos R2022421 (220 ) (ser-1) IB, Tech H Semester Regular/Supplementary Examinations, duly - 2024 COMPUTER ORGANIZATION (Common to CSE(AIML),CSE(AD,CSE(DS),CSE(ATDS),CSD, AIDS & AIML) 3 hours Max. Marks: 70 TVEe Questions, each Question from each unit All Questions carry Equal Marks ‘Answer any 1a) Describe the fimetions of the main hardware components of a general purpose (7™] computer bb) Subsract (136)s from (636), using 8's complement method, (7™) or > a) What isa Floating point number? Explain the standard floating point representation [7M] with an example. b) With a neat flow chart, explain the division of two fixed point numbers with an (7™| example, UNIT-II 3a) Explain the internal organization of a Digital computer. (7™} b) Explain the phases of instruction cycle with a neat flow chart. (7™| or 4 a) Givea brief account on general purpose registers in CPU. (7™) b) List out and explain the memory reference instructions. (7™] UNIT-IIT 5 a) Whatis the role of Stack data structure in computer architecture? Explain the PUSH [7M] and POP instructions. b) What is an Instruction format? Explain about various basic computer instruction (7M) formats, or 6 a) Briefly discuss the three main types of Data Transfer and Manipulation instructions. [7M] b) With neat diagram, explain the address selection for control memory. (™] UNIT-IV 7 a) Describe the characteristics and advantages of Cache memory. c™) b) Draw the block diagram of DMA controller and explain its key components. (MI or 8 a) With aneat diagram, show the memory address map of RAM and ROM for a (7M) computer system (Assume 512 bytes ). b) Explain the hardware organization of associative memory with a neat block uy diagram. UNIT-V 9) What is an NXN cross bar switch? Write about the Clos multistage interconnection [7M network. b) Explain about Arithmetic and Instruction pipelines. (7M) Or 10. a) _IMlustrate on RISC pipeline in detail. Explain any two types of intercom UM) structures . b) Explain the types of Array processors in detail (7M lof l rereCade No: IIB. Tech II Semester Regular/Supplementary Examinations, July - 2023 COMPUTER ORGANIZATION (Common to CSE(ATML),CSE(AD,CSE(DS),CSE(AIDS),CSD, AIDS & AIML) Max. Marks: 70 Time: 3 hours b) b) 4 a) b) jo) b) b) b) ) b) Answer any FIVE Questions, each Question from each unit All Questions carry Equal Marks UNIT-I Explain about the different types of Buses in computer architecture. Explain about various types of complement's for a Binary number with suitable examples. Or With a neat flow chart, explain the working of Booths multiplication algorithm and also illustrate the steps to Multiply the two numbers 23 and -9 by using the Booth’s multiplication algorithm UNIT-IL List out and explain the basic Arithmetic Micro operations. What is an Interrupt and its types? Explain the flowchart of Interrupt cycle. or Describe the data transmission between CPU registers during the execution of instructions through Register transfer notation. Write about Control functions and Micro operations of a basic computer. UNIT-IIL What are the typical elements of a machine instruction? Explain. With a neat diagram, explain the design of control unit and also explain its inputs and outputs. Or What is the need for designing the micro-instruction sequencing technique? Briefly discuss various micro-instruction sequencing techniques. UNIT-IV Discuss various possible modes of Data transfer to and from the peripherals in a computer system. Describe the characteristics of Cache memory. Explain Write-through and Write- back methods. or Explain the following i)Auxilliary memory ii)Associative memory UNIT-V Explain the phases of Instruction pipeline with a neat flow chart. Discuss various hardware implementations of Inter-processor synchronization Or Describe the characteristics of Multi processors. 1 Switch & Multiport Memory Ditferentiate between Time Shared Bus, Cro: inter connection structures, Wh lof! wr" [7M] (™] [14M] (7M) (™] (7™] (™} (™] [7M] [14M] 0M) (7™] [4M] UM) (7M) UM (WOMTime: 6 9 IIB, Tech 1 Semester Regular/Supplementary Examinations, July - 2023 COMPUTER ORGANIZATION ts ‘ommon to CSE(ATML),CSE(AD,CSE(DS),CSE(AIDS),CSD, AIDS & AIML) ours ‘Answer any FIVE Questions, each Question from each unit All Questions carry Equal Marks UNIT-I a) How to find r’s complement and (-1)'s complement of a number? Illustrate the same for (563) b) With a neat flow chart, explain the subtraction of two floating point numbers. Or a) Write the differences between RAM and ROM. b) Explain the sequence of steps to detect an error using Cyclic Redundancy Check with a suitable example. UNIT-II 4) Mention all Logic micro operations and explain their hardware implementation. b) Explain the implementation of Circular and Arithmetic shift operations. Or Draw the circuit for Arithmetic Logic Shift unit and Explain its operations by giving its function table. b) What do you mean by Interrupt in Computer architecture? UNIT-IT List and explain in detail various addressing modes of a computer with example. or Draw the block diagram for RISC processor architecture and explain its instruction set. Also discuss its advantages and disadvantages. b) Define the terms i) Control Memory _ii) Micro Instruciton UNIT-IV Whet is cache memory? Explain how it enhances speed of accessing data What is a Virtual Memory? Explain the process of converting virtual addresses to physical addresses with a neat diagram a) a) a) b) Or a) What is Asynchronous Data Transfer? Explain any one method to achieve the asynchronous way of data transfer. b) UNIT-V 4a) List out the benefits of Multiprocessing? Give the important characteristics of multiprocessor systems, ; b) Explain the five stages of RISC pipeline, Or -stage switching network? Explain the ‘What is the basic component of a Mul structure of 8X8 omega switching network, How does Parallel processing work? Disc Loft a) the use cases of Parallel processing. b) rier" Explain Priority interrupt and Daisy chain interrupt system with necessary diagrams. Max. Marks: 70 (7™} (™] (7™] (7™M} {10M} (4M) (12M) (2M) 4M) (omy (4M) (7™] 7M] (7™) (7M) cM) (7M) (7M) (7MIB, Tech II Semester Regular/Supplementary Examinations, July - 2023 COMPUTER ORGANIZATION (Common to CSE(ATML),CSE(AD,CSE(DS),CSE(AIDS),CSD, AIDS & AIML) Max. Marks: 70 Time: 3 hours ‘Answer any FIVE Questions, each Question from each unit All Questions carry Equal Marks UNIT-1 1a) Explain in brief about Weighted and Non-Weighted codes with one example each. [7M] b) How to find r’s complement and (f-1)’s complement of a number? Illustrate the (7™M] same for (7654)s. Or 2 a) With an example, explain the CRC code for detecting multiple errors in a message. [7M] b) With a neat flow chart, explain the Floating point Multiplication algorithm with an [7M] example. UNIT-II 3 a) Explain the hardware implementation of Shift Micro operations. (7™M] b) Explain the implementation of Binary Adder and Binary Incrementor. (™] or 4 a) Explain the Instruction cycle execution with Interrupts. (7M) b) Enumerate the concept of RTL in detail. (7™] UNIT-I 5 a) Evaluate the arithmetic statement X=(A+B) * (C+D) using Three-address, (7™] Two-address, One-address and Zero-address instruction formats, b) Draw the block diagram of Control unit of a basic computer and explain its types. [7M] or 6 a) Showa possible control sequence for performing the operation MOV RI R2. (7™] b) Elaborate on RISC. (™) UNITIV 7a) What is Cache coherence problem? Explain various ways to resolve the Cache [7M] coherence problem. b) Explain about asynchronous data transfer and asynchronous communication (7™M] interface. or 8 a) Explain in detail about Direct Memory Access in computer system. (7™M) b) Distinguish between Programmed I/O and Interrupt driven VO. (7M) UNIT-V 9 a) Briefly discuss the types of Interconnection Structures. cM) b) Explain about Serial and Parallel arbitration logic. (7M) Or 10 a) Explain in detail the types of Parallel Processing. uM] b) Define pipelining? Explain the structure of pipelining with an example. 7M) lof! reer"