1.
Architecture of 8051 Microcontroller
The 8051 microcontroller is an 8-bit microcontroller based on the Harvard
architecture, meaning separate memory spaces and buses for program and
data memory.
Components:
CPU: Executes instructions, performs arithmetic and logic operations.
Program Memory (ROM): Typically 4K bytes to store the program code.
Data Memory (RAM): 128 bytes internal RAM for data and stack.
Registers: General purpose registers R0-R7, special registers (ACC, B, PSW),
and 16-bit DPTR.
Timers: Two 16-bit timers/counters.
Serial Port: For serial communication.
Interrupts: Five interrupt sources with two priority levels.
I/O Ports: Four bidirectional ports P0-P3 (8-bits each).
2. Functions of Important Registers
Program Status Word (PSW)
CY (Bit 7): Carry flag used in arithmetic.
AC (Bit 6): Auxiliary carry, for BCD operations.
F0 (Bit 5): User-defined flag.
RS1 and RS0 (Bits 4 and 3): Select register bank 0–3.
OV (Bit 2): Overflow flag.
P (Bit 0): Parity flag, indicates parity of accumulator.
Special Function Registers (SFR)
Located from address 0x80 - 0xFF.
Include ACC (Accumulator), B register, DPTR (data pointer), SP (stack
pointer), timers’ control registers, ports, interrupt registers, etc.
3. Ports of 8051 Microcontroller
Table
Port Pins Description Special Usage
Open-drain I/O with external
P0 0–7 Address/data multiplex for external memory
pull-up
P1 0–7 I/O port with internal pull-ups General purpose
P2 0–7 I/O port with internal pull-ups High-order address bus for external memory
Multifunction (serial, interrupts, timers, control
P3 0–7 I/O port with internal pull-ups
lines)
4. Function of Data Pointer (DPTR)
16-bit register (DPH:DPL).
Used to store the 16-bit address for accessing external memory.
Instructions like MOVX and MOVC use DPTR for addressing.
Example:
assembly
MOV DPTR, #0x1234 ; Load external memory address 0x1234
MOVX A, @DPTR ; Read data from external memory into accumulator A
5. Addressing Modes with Examples
Table
Addressing
Description Example Explanation
Mode
MOV A, Load immediate value 0x55
Immediate Data is part of instruction
#0x55 to A
Register Operand is in register R0–R7 MOV A, R0 Move content of R0 to A
Operand is in internal RAM or Move content at RAM
Direct MOV A, 30H
SFR in direct address address 30H to A
Move data from RAM at
Indirect Address is in R0 or R1 MOV A, @R0
address in R0 to A
MOVC A, Move code byte from
Indexed Address is sum of A and DPTR
@A+DPTR (A+DPTR) to A
6. Assembly Program to Add Two 8-bit Numbers
Assuming first number stored at RAM address 30H and second at 31H, store
the result at 32H.
assembly
MOV A, 30H ; Load first number into accumulator
ADD 31H ; Add second number to accumulator
MOV 32H, A ; Store sum at 32H
END
Explanation:
MOV A, 30H loads the first number.
ADD 31H adds the value from address 31H.
MOV 32H, A stores the result at 32H.
7. Function of CALL and JUMP Instructions
Table
Instruction Function
Transfers program execution to a subroutine and saves return address on stack.
CALL
Requires a RET to return execution.
Unconditional branch to specified address. No return; control does not resume after
JUMP (JMP)
jump automatically.
8. Types of Instructions in 8051
Data transfer: MOV, MOVX, MOVC
Arithmetic: ADD, ADDC, SUBB, MUL, DIV
Logical: ANL (AND), ORL (OR), XRL (XOR), CPL (Complement)
Branch: SJMP, LJMP, JZ, JNZ, JC (Jump if Carry), JNC (Jump if no Carry), CALL,
RET
Bit operations: SETB (Set bit), CLR (Clear bit), CPL (Complement bit)
9. DJNZ (Decrement and Jump if Not Zero)
This instruction decrements the specified register and jumps to a given
address if the result is not zero.
Typically used for loops or counters.
Example:
assembly
DJNZ R0, LOOP ; Decrement R0; if not zero, jump to LOOP
10. Difference Between MOV and MOVX
Table
Instruction Purpose Use Case
MOV Transfers data between registers or internal RAM and SFRs Internal data transfers
Transfers data between accumulator and external memory Access external data
MOVX
(external data RAM) memory
11. Bit Manipulation Instructions with Examples
Table
Instruction Description Example
SETB P1.0 sets pin P1.0 to
SETB p.x Sets a particular bit ( p.x ) to 1
High
CLR P1.0 clears pin P1.0 to
CLR p.x Clears a particular bit ( p.x ) to 0
Low
CPL p.x Complements (toggles) a bit CPL P1.0 toggles pin P1.0
