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com

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I TIMER/COUNTER
1. REGISTERS
Thanh ghi T1CON:

Bit 5-4: Ch n cc b chia 1, 2, 4, 8 Bit 3: bit i u khi n cho php b dao ng timer1 Bit 2: bit i u khi n ng b ng vo xung clock bn ngoi c a timer1 Bit 1: bit l a ch n ngu n xung clock c a timer1 Bit 0: bit i u khi n timer1

Thanh ghi INTCON:

Bit 7: Cho php ng t ton c c Bit 6: Cho php ng t ngo i vi Bit 5: Cho php ng t Timer0 Bit 4: Cho php ng t ngoi chn RB0/INT Bit 3: Cho php ng t thay i PORTB Bit 2: C trn Timer0 Bit 1: C bo ng t ngoi RB0/INT Bit 0: C bo khi PORTB thay i Thanh ghi PIR1: L thanh ghi ch a cc bit c cho cc ng t ngoi, trong bit TMR1IF (PIR1<0>) l bit c bo ng t trn timer 1 Thanh ghi PIE1: L thanh ghi ch a cc bit cho php ng t c l p cho cc ng t ngo i vi. Trong c bit TMR1IE (PIE1<0>) l bit cho php ng t trn TMR1

Thanh ghi STATUS:

Bit 7: Bit l a ch n thanh ghi (dng a ch gin ti p) Bit 6-5: Bit l a ch n thanh ghi dng a ch tr c ti p Bit 4: Bit th i gian ch (Timer out bit) Bit 3: Bit t t ngu n (Power-down) Bit 2: Bit zero Bit 1: Bit trn / m n (Digit carry/borrow) Bit 0: Bit trn / m n (Carry/borrow)

PCL v PCLATH:
Thanh ghi PC c r ng 13 bit 8 bit th p n m thanh ghi PCL 5 bit cao PC<12:8> khng th c nh ng c th ghi gin ti p qua thanh ghi PCLATH B t k reset no x y ra th cc bit cao c a thanh ghi PC s b xo

OPTION_REG

bit 7 RBPU bit 6 INTEDG bit 5 T0CS: TMR0 Clock Source Select bit 1 = Transition on T0CKI pin 0 = Internal instruction cycle clock (CLKO)

0 = Increment on low-to-high transition on T0CKI pin

bit 3 PSA: Prescaler Assignment bit 1 = Prescaler is assigned to the WDT 0 = Prescaler is assigned to the Timer0 module

bit 4 T0SE: TMR0 Source Edge Select bit 1 = Increment on high-to-low transition on T0CKI pin

bit 2-0 PS2:PS0: Prescaler Rate Select bits

Pic16F877A s Summary

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T2CON (12h)

PIR2 (92h)

2. CCS
a. TIMER0 setup_timer_0(mode) Sets the source, prescale etc for timer0
RTCC_INTERNAL RTCC_EXT_L_TO_H RTCC_EXT_H_TO_L RTCC_DIV_1 RTCC_DIV_2 RTCC_DIV_4 o o o set_timer0(value) or set_rtcc(value) value= GET_TIMER0() or GET_RTCC() Relevant Interrupts : INT_TIMER0 or INT_RTCC RTCC_DIV_8 RTCC_DIV_16 RTCC_DIV_32 RTCC_DIV_64 RTCC_DIV_128 RTCC_DIV_256 Initializes the timer0 clock/counter Returns the value of the timer0 clock/counter

Interrupt fires when timer0 overflows

b. TIMER1
setup_timer_1(mode) T1_DISABLED T1_INTERNAL T1_EXTERNAL T1_EXTERNAL_SYNC T1_CLK_OUT set_timer1(value) value=get_timer1() Relevant Interrupts : INT_TIMER1 Interrupt fires when timer0 overflows Initializes the timer1 clock/counter Returns the value of the timer1 clock/counter Disables or sets the source and prescale for timer1 T1_DIV_BY_1 T1_DIV_BY_2 T1_DIV_BY_4 T1_DIV_BY_8

Pic16F877A s Summary

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Email: trinhanhkhoi072@yahoo.com c. TIMER2

setup_timer_2(mode,period,postscale) mode may be one of: Disables or sets the prescale, period and a postscale for timer2

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T2_DISABLED, T2_DIV_BY_1, T2_DIV_BY_4, T2_DIV_BY_16

period is a int 0-255 that determines when the clock value is reset, postscale is a number 1-16 that determines how many timer overflows before an interrupt: (1 means once, 2 means twice, and so on). Examples: setup_timer_2 ( T2_DIV_BY_4, 0xc0, 2); // At 20mhz, the timer will increment every 800ns, // will overflow every 154.4us, // and will interrupt every 308.8us. set_timer2(value) value=get_timer2() Relevant Interrupts : INT_TIMER2 Interrupt fires when timer2 overflows Initializes the timer2 clock/counter Returns the value of the timer2 clock/counter

3. EXAMPLE a. Timer-interrupt
#include <16F877A.h> #include <KhaiBaoTGhi_16F877A.h> #fuses HS,NOWDT,NOPROTECT,NOLVP } void main() { enable_interrupts(int_timer1);//khoi tao ngat TMR1 setup_timer_1(T1_INTERNAL|T1_DIV_BY_1);//dung xung noi, bo chia 1:1 enable_interrupts(global); set_timer1(15535); // khoi tao lai 10ms set_timer1(15535); count++; trisb=trisc=trisd=0; if(count == 100) //100*10ms = 1s While(1){//cc l nh} { } //port b,c,d lam port xuat //t= (65535-15535)*0.2us = 10ms } count=0; //cc l nh

#use delay(clock=20000000) int8 count; //Chuong trinh ngat TMR1 #int_timer1 //khai bao ngat TMR1 void interrupt_timer1() {

Pic16F877A s Summary

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Email: trinhanhkhoi072@yahoo.com b. Counter-EEPROM

#include <16f877a.h> #include <KhaiBaoTGhi_16F877A.h> #fuses NOWDT,NOLVP,NOPROTECT,HS #use #define #DEFINE #DEFINE #DEFINE delay(clock=20000000) RS RW E LCD RD0 RD1 RD2 PORTB setup_lcd();

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lcd=0x80;//con tro dau dong 1 con_wrt(); for (i=0;i<=27;i++) { lcd= st1[i]; data_wrt(); if (i==13) {lcd=0xc0;//con tro xuong dong 2

Int8 i,cn,ng,tr,ch,dv; int8 low,high; int16 n; char st1[30]={"Truong DHSPKT Tp Ho Chi Minh"}; char st2[20]={"Quantities:"}; }

con_wrt(); }

lcd=0x94;//con tro xuong dong 3 con_wrt(); for (i=0;i<=10;i++)

void con_wrt(); void data_wrt(); void setup_lcd(); void read_rom(); void write_rom(int16 x); void erase_0(); void display_counter(); void hex_ascii();

{ lcd= st2[i]; data_wrt(); } read_rom(); set_timer1 (n);//l y k t qu while(1) { n=get_timer1(); m ghi trog rom

void main() { setup_timer_1(T1_EXTERNAL); trisb=trisd=0;

write_rom(n); if (RC2)//nt nh n xa k t qu { write_rom(0x0000); set_timer1(0); m

Pic16F877A s Summary

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} lcd=0x0c; con_wrt(); hex_ascii();erase_0(); lcd=0xd4; con_wrt(); display_counter(); } } void con_wrt() { RS=0; RW=0; E=1;delay_us(3); E=0;delay_ms(3); } void data_wrt() { RS=1; RW=0; E=1;delay_us(3); E=0; DELAY_US(100); } } void read_rom() { low= read_eeprom(0x0000); high= read_eeprom(0x0001); n=make16(high,low); } void write_rom(int16 x) { write_eeprom(0x00,x); write_eeprom(0x01,x>>8); } void erase_0() { if(cn==0x30) { cn=0x20; if(ng==0x30) {ng=0x20; if(tr==0x30) void setup_lcd() { lcd=0x38; con_wrt(); } {tr=0x20; if(ch==0x30) ch=0x20; } lcd=0x01; con_wrt();

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Pic16F877A s Summary

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} } } void hex_ascii() void display_counter() { lcd=cn; data_wrt(); lcd=ng; data_wrt(); lcd=tr; data_wrt(); lcd=ch; data_wrt(); lcd=dv; } { cn= n/10000 + 0x30; n= n%10000; ng= n/1000 + 0x30; n= n%1000; tr= n/100 + 0x30; n= n%100; ch= n/10 + 0x30; data_wrt();

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dv= n%10+0x30;

II ADC
1. REGISTERS Rusult Low Register).

ADRESH (A/D Result High Register) ADRESL (A/D Rusult Low Register)

ADCON0 (A/D Control Register 0)

Bit 7-> 6 ADCS1:ADCS0 bit l a ch n xung chuy n Bit 5 -> 3 CHS2-CHS0 cc bit l a ch n knh t Bit 2 GO/DONE bit bo tr ng thi chuy n Bit 0 ADON bit m ngu n cho ADC ho t ng t

i ADC

i ADC(ADON=1) ng

ADCON1 (A/D Control Register 1)

Bit 7 ADFM bit l a ch n

nh d ng k t qu ADC Bit 6 ADCS2 bit l a ch n xung clock cho chuy n i ADC

Pic16F877A s Summary

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Bit 5-4 ch a dng Bit 3-> 0 PCFG3:PCFG0 bit i u khi n ADC

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Cc thanh ghi lin quan

Thanh ghi PIR1

n vi c chuy n

i ADC:

L thanh ghi ch a cc bit c cho cc ng t ngoi. Bit 6 ADIF c bo ng t b chuy n 1 = chuy n 0 = chuy n i A/D i A/D ch a i A/D.

c hon thnh. c hon thnh.

Thanh ghi PIE1

L thanh ghi ch a cc bit cho pht ng t

c l p cho cc ng t ngo i vi. 0 = khng cho php Bit 3 SSPIE bit cho php ng t port n i ti p 1 = cho php ng t SSP 0 = khng cho php SSP Bit 2 CCP1IE bit cho php ng t CCP1 1 = cho php ng t CCP1 0 = khng cho php CCP1 Bit 1 TMR2IE bit cho php ng t t 1 = cho php ng t t ng thch ng TMR2 v i PR2 ng b

Bit 7 PSPIE bit cho php ng t 1 = cho php ng t PSP

c/ghi c/ghi

port nhnh song song

0 = khng cho php ng t PSP

c/ghi i

Bit 6 ADIE bit cho php ng t b chuy n 1 = cho php ng t 0 = khng cho php ng t

Bit 5 RCIE bit cho php ng t nh n d li u USART 1 = cho php ng t 0 = khng cho php Bit 4 TXIE bit cho php ng t pht d li u USART 1 = cho php ng t Thanh ghi INTCON L thanh ghi c th

ng thch TMR2 v i PR2 ng thch TMR2 v i PR2

0 = khng cho php ng t t

Bit 0 TMR1IE bit cho php ng t trn TMR1 1 = cho php ng t TMR1 trn 0 = khng cho php TMR1 trn c v ghi,ch a nh ng c ng t v bitcho php cc ng t khc nhau

Pic16F877A s Summary

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Bit 6 PEIE bit cho php ng t ngo i vi 1 = cho php ng t Bit 7 GIE cho php ng t ton c c 0 = khng cho php ng t 1 = cho php t t c cc ngu n ng t

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0 = khng cho php t t c cc ngu n ng t

2. CCS
setup_adc(mode) Sets up the a/d mode like off, the adc clock etc
ADC_OFF // ADC Off ADC_CLOCK_DIV_2 AN0_AN1_AN2_AN3_AN4_AN5// A0 A1 A2 A3 A5 E0 ADC_CLOCK_DIV_4 AN0_AN1_AN2_AN4_AN5_VSS_VREF // A0 A1 A2 A5 E0 VRefh=A3 ADC_CLOCK_DIV_8 AN0_AN1_AN4_AN5_VREF_VREF// A0 A1 A5 E0 VRefh=A3 VRefl=A2 ADC_CLOCK_DIV_16 AN0_AN1_AN4_VREF_VREF // A0 A1 A4 VRefh=A3 VRefl=A2 ADC_CLOCK_DIV_32

AN0_AN1_VSS_VREF// A0 A1 VRefh=A3
AN0_AN1_AN4_AN5_AN6_AN7_VREF_VREF// A0 A1 A5 E0 E1 E2 VRefh=A3 VRefl=A2

AN0_AN1_VREF_VREF// A0 A1 VRefh=A3 VRefl=A2

ADC_CLOCK_DIV_64 AN0// A0 ADC_CLOCK_INTERNAL

AN0_VREF_VREF// A0 VRefh=A3 VRefl=A2 setup_adc_ports(value) Sets the available adc pins to be analog or digital
// Constants used in SETUP_ADC_PORTS() are:

set_adc_channel(channel) Specifies the channel to be use for the a/d call. read_adc(mode) Starts the conversion and reads the value

NO_ANALOGS // None

Relevant Preprocessor:
ALL_ANALOG// A0 A1 A2 A3 A5 E0 E1 E2 AN0_AN1_AN2_AN4_AN5_AN6_AN7_VSS_VREF 1// A0 A1 A2 A5 E0 E1 E2 VRefh=A3 AN0_AN1_AN2_AN3_AN4// A0 A1 A2 A3 A5 AN0_AN1_AN2_AN4_VSS_VREF// A0 A1 A2 A4 VRefh=A3 AN0_AN1_AN3// A0 A1 A3

#DEVICE ADC=xx Configures the read_adc return size. For example, using a PIC with a 10 bit A/D you can use 8 or 10 Relevant Interrupts : INT_AD Interrupt fires when a/d conversion is complete INT_ADOF Interrupt fires when a/d conversion has timed out

Example:
#include <16F877A.h> #include <KhaiBaoTGhi_16f877a.h> #device 16f877*=16 adc=10 #fuses HS,NOWDT,PUT,NOPROTECT #use delay(clock=20000000) #use fast_io(b) #use fast_io(d) #use fast_io(a) int8 tr,ch,dv,n; const unsigned int8 table[]={0xc0,0xf9,0xa4,0xb0,0x99,0x92,0x82,0xf8,0x80,0x90}; //Giai ma HEX-BCD void hex_bcd() { tr=n/100; n=n%100; ch=n/10; dv=n%10; } void hien_thi()//ph ng php qut { if(tr==0) portb=0xff;//xa 0 v ngh a else portb=table[tr]; portd=0xfe; delay_us(100); portd=0xff; if ((ch==0)&&(tr==0)) portb=0xff; else portb=table[ch]; portd=0xfd;

Pic16F877A s Summary

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delay_us(100); portd=0xff; portb=table[dv]; portd=0xfb; delay_us(100); portd=0xff; } void main() { trisb=trisd=0; trisa=0xff; setup_adc(ADC_CLOCK_INTERNAL); setup_adc_ports(AN0_VREF_VREF); set_adc_channel(0);delay_us(10); WHILE(1) { n=read_adc()/2.048;//nn dng 8bit, Vref=2.55 kh i chia hex_bcd(); hien_thi(); } } ***74HC595*** #include <16F877A.h> #include <KhaiBaoTGhi_16f877a.h> #include <74HC595.c> #device 16f877*=16 adc=8//set Vref=2.55V #fuses HS,NOWDT,PUT,NOPROTECT #use delay(clock=20000000) #define #define #define #define #define SH rd0 ST rd1 DS rb7 xoa_tr rd7 xoa_ch rd6 } Void gma(int8 dat) { tr=dat/100; dat=dat%100; ch=dat/10; dv=dat%10; } void xoa() { if(tr==0) { xoa_tr=1; if(ch==0) xoa_ch=1;else xoa_ch=0; }else xoa_tr=0; } #use fast_io(a)

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int8 i,tr,ch,dv,n; int8 const m7d[10] = {0xC0,0xF9,0xA4,0xB0,0x99,0x92,0x82,0xF8,0x80,0x90}; void gma(int8 dat); void xoa(); void main() { trisb=trisd=0; trisa=0xff; setup_adc(ADC_CLOCK_INTERNAL); setup_adc_ports(AN0_VREF_VREF); set_adc_channel(0);delay_us(10); WHILE(1) { n=read_adc(); gma(n); xoa(); load_3_byte(m7d[dv],m7d[ch],m7d[tr]);//HI N TH }

#use fast_io(b) #use fast_io(d)

III SPI
1. REGISTERS
SSPCON1
WCOL SSPOV SSPEN CKP SSPM3 SSPM2 SSPM1 SSPM0 a ch 14

Bit 7

WCOL Write Collition Detect Bit c a vo thanh ghi SSPBUF trong khi c ng trn x y ra Bit 5

c th d li u m i ghi

ln) ng trn x y ra

WCOL = 1 d li u m i ch a truy n xong d li u tr WCOL = 0 khng c hi n t

SSPOV = 0 khng c hi n t

SSPEN Synchronous Serial Port Enable Bit

Bit 6

SSPOV Receive Overflow Indicalor Bit (tc d ng ch SPI Slave Mode) m (thanh ghi SSPBUF) b

SSPEN = 1 cho php c ng giao ti p MSSP (cc pin SCK,SDO,SDI v SS) SSPEN = 0 khng cho php c ng giao ti p MSSP Bit 4 CKP Clock Polarity Select Bit

SSPOV = 1 d li u trong Buffer trn (d li u c ch a

Pic16F877A s Summary

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CKP = 1 tr ng thi ch c a xung Clock l m c logic cao CKP = 0 tr ng thi ch c a xung Clock l m c logic th p Bit 3-0 <SSPM3:SSPM0> Synchronous Serial Mode Select Bit 0101 Slave Mode, xung Clock l y t pin SCK, khng cho php pin i u khi n SS (SS l pin I/O bnh th ng) 0100 SPI Slave Mode, xung Clock l y t pin SCK, cho php pin i u khi n SS.

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0011 SPI Master Mode, xung Clock = (ng ra TMR2)/2 0010 SPI Master Mode, xung Clock = (FOSC/64) 0001 SPI Master Mode, xung Clock = (FOSC/16) 0000 SPI Master Mode, xung Clock = (FOSC/4) Cc tr ng thi khng ho c ch c tc d ng c li t k ho c khng c tc d ng i u khi n i v i ch I2C Mode.

SSPSTAT
SMP

a ch 94h

CKE

BF

Bit 7

SMP Sample Bit SPI Master Mode:

CKE = 0: SPI Master truy n d li u khi xung Clock chuy n t tr ng thi ch n tr ng thi tch c c (tr ng thi ch c xx nh b i bit CKP (SSPCON<4>)

SMP = 1: d li u th i i m cu i xung Clock SMP = 0: d li u Clock

c l y m u (xc

nh tr ng thi logic) t i Bit 5 - 1

c l y m u t i th i i m gi a xung Bit 0

Cc bit ny ch c tc d ng khi MSSP BF Buffer Status bit BF = 1: thanh ghi BF = 0: thanh ghi

ch

I2C

SPI Slave Mode: bit ny ph i

c xa v 0 m SSPBUF c d li u m SSPBUF ch a c d li u

Bit 6

CKE SPI Clock Select bit

CKE = 1: SPI Master truy n d li u khi xung Clock chuy n t tr ng thi tch c c n tr ng thi ch

GIE

PEIE

INTCON

a ch 0Bh,8Bh,10Bh,18Bh

Bit 7

GIE Global Interrupt Enable bit GIE = 1 cho php t t c cc ng t GIE = 0 khng cho php t t c cc ng t

Bit 6

PEIE Pheripheral Interrupt Enable bit PEIE = 1: cho php t t c cc ng t ng ai vi PEIE = 0: khng cho php t t c cc ng t ng ai vi

Pic16F877A s Summary

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10

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a ch 0Ch

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SSPIF Synchronous Serial Port (SSP) Interrupt Flag bit SSPIF -

SSPIF = 1: Ng t truy n nh n SSP x y ra SSPIF = 0: Ng t truy n nh n SSP ch a x y ra

PIE1

a ch 8Ch

SSPIE Synchronous Serial Port (SSP) Interrupt Enable bit SSPIE -

Bit 3 SSPIE = 1: Cho php ng t SSP SSPIE = 0: Khng cho php ng t SSP Thanh ghi d ch d li u SSPSR dng d ch d li u vo ho c ra. Khi m t byte d li u thanh ghi SSPBUF v c hi u c set. ng th i ng t s x y ra. c nh n hon ch nh , d li u s t thanh ghi SSPSR chuy n qua

SSPBUF
Thanh ghi

a ch 13h m d li u 8bit cho chu n giao ti p MSSP

2. CCS
Setup_spi(mode) Mode: SPI_MASTER SPI_SLAVE SPI_L_TO_H SPI_H_TO_L SPI_CLK_DIV_4 SPI_CLK_DIV_16 SPI_CLK_DIV_64 SPI_CLK_T2 SPI_SS_DISABLED Spi_read(value) Spi_write(value) Spi_data_is_in() Interrupt: #int_ssp

Example
Master #include <16f877a.h> #include <KhaiBaoTGhi_16F877A.h> #FUSES NOWDT, HS, NOPUT, NOPROTECT, NODEBUG, NOBROWNOUT, NOLVP, NOCPD, NOWRT #use delay(clock=20000000) #use fast_io(a) #use fast_io(b) #DEFINE SS RA2 int16 data; int16 dem; #INT_TIMER0 void interrupt_T0() { set_timer0(5); dem++; if (dem==1250)//1250*0.8ms=1s { dem=0; data=(data<<1)|data; if(bit_test(data,8)) data=0x01; } } void main() { SETUP_ADC(ADC_OFF); trisa=0; trisc=0b00010000; SS=1; data = 0b00000001;

Pic16F877A s Summary

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ENABLE_INTERRUPTS(INT_TIMER0); SETUP_TIMER_0(rtcc_INTERNAL|RTCC_DIV_16);//T=3.2uS SET_TIMER0(5);//t=3.2uS*(255-5)=800uS=0.8mS ENABLE_INTERRUPTS(GLOBAL); setup_spi( SPI_MASTER | SPI_L_TO_H | SPI_CLK_DIV_4); delay_ms(1000); while(1) { SS=0; //USE RA2 TO SELECT CHIP spi_write(data); SS=1; delay_us(10);//Tao tre giua 2 lan truyen } } Slave #include <16f877a.h> #include <KhaiBaoTGhi_16F877A.h> #FUSES NOWDT, HS, NOPUT, NOPROTECT, NODEBUG, NOBROWNOUT, NOLVP, NOCPD, NOWRT #use delay(clock=20000000) #use fast_io(b) #use fast_io(a)

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//************************* int8 data; //************************* #int_ssp void ssp_isr(void) { data = spi_read(); portb=data; } //************************* void main() { SETUP_ADC(ADC_OFF); trisa=0b00100000; trisb=0; TRISC=0B00011000; PORTB=0; setup_spi(SPI_SLAVE | SPI_L_TO_H | SPI_CLK_DIV_4); clear_interrupt(INT_SSP); enable_interrupts(INT_SSP); enable_interrupts(GLOBAL); while(1);//Do nothing, wait for receiving data }

IV I2C
1. REGISTERS
1. SSPCON: Thanh ghi i u khi n 2. SSPCON2: Thanh ghi i u khi n th 2 3. SSPSTAT(94h): Thanh ghi tr ng thi 4. SSPBUF: Thanh ghi b 5. SSPSR: Thanh ghi d ch 6. SSPADD: Thanh ghi a ch c/ghi c. m truy n nh n

Cc thanh ghi SSPCON, SSPBUF, SSPADD v SSPSON2 c th truy c p

Thanh ghi SSPSR khng th truy c p tr c ti p, l thanh ghi dich d li u ra hay vo. Cc thanh ghi SSPCON, SSPCON2 v SSPSTAT Thanh ghi tr ng thi SSPSTAT(94h): c nh a ch bit

Khi ho t

ng

ch baud

I2C:

=1: byte v a truy n ho c nh n l d li u =0: byte v a truy n ho c nh n l P: STOP Bit =1: nh n c bit STOP c bit STOP a ch

SMP: ch n t c SMP = 1: ch n t c SMP = 0: ch n t c

chu n (100Khz, 1Mhz) cao (400Khz) ch SPI. I2C

CKE: ch s d ng D/A: ch dng ch

=0: ch a nh n

S: START Bit

Pic16F877A s Summary

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=1: nh n c bit START c bit START =1: c p nh t thm =0: khng c p nh t a ch t thanh ghi SSPADD

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=0: ch a nh n

R/W: bo qu trnh truy n-nh n v n ang di n ra Slave mode: =1: ang c d li u

BF: Bit bo tr ng thi thanh ghi SSPBUF Ch nh n d li u(SPI v I2C modes): y d li u

=1: nh n k t thc, SSPBUF

=0: ang ghi d li u Master mode: =1: ang truy n d li u =0: khng c truy n d li u UA: c p nh t bit) a ch (ch i v i ch I2C Slave 10

=0: nh n ch a k t thc,SSPBUF tr ng Ch truy n d li u(I2C mode): y d li u

=1: ang truy n, SSPBUF

=0: truy n k t thc,SSPBUF tr ng

Thanh ghi i u khi n SSPCON(14h)

WCOL: bo s x p ch ng d li u truy n i. Khi a DL vo SSPBUF trong khi ch Master Mode) I2C mode ch a s n sng(I2C

=0: khng. CKP: cho php xung clock tc mode) =1: cho php. =0: gi xung clock m c th p. ho t ng MSSP ng.(trong I2C Slave

Khi a DL vo SSPBUF trong khi DL c ch a Slave Mode) =1: c s x p ch ng d li u.

c truy n i(I2C

SSPM3:SSPM0 : ch n ch =0: khng. SSPOV: bo s x p ch ng d li u nh n v . Khi d li u m i ch a c c. c nh n vo trong khi d li u c trong tg SSPBUF

=1: c s x p ch ng d li u. =0: khng. SSPEN: cho php c ng giao ti p ng b SSP ng.

=1: cho php(cho php cc chn SCL SDA ho t

Thanh ghi i u khi n SSPCON2(91h)

Pic16F877A s Summary

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GCEN : (ch dng trong I2C Slave mode) =1: cho php ng t khi =0: khng cho php. ACKSTAT: Bit tr ng thi ACK(Acknowledge) =1: khng nh n =0: nh n c tn hi u ACK. a ch 0000h c nh n vo thanh ghi SSPSR. RCEN: cho php nh n d li u. =1: cho php. =0: khng. PEN: cho php i u ki n STOP th c thi. =1: cho php. =0: khng.

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c tn hi u ACK t Slave. ACKDT: Bit d li u ACK

RSEN: cho php i u ki n RESTART th c thi. =1: cho php. =0: khng. ng, truy n d li u SEN: cho php i u ki n START th c thi. =1: cho php.

=1: NACK(Not Acknowledge). =0: ACK. ACKEN: cho php ACK tc trong Bit ACKDT i. =1: cho php.

=0: khng. =0: khng. CC CH HO T NG

1-SLAVE MODE Syntax: Returns: state = i2c_isr_state(); state is an 8 bit int 0 - Address match received with R/W bit clear 1-0x7F - Master has written data; i2c_read() will immediately return the data 0x80 - Address match received with R/W bit set; respond with i2c_write() 0x81-0xFF - Transmission completed and acknowledged; respond with i2c_write() 2-MASTER MODE 1- Ch Master GHI (truy n i):

2- Ch

Master

C(nh n v ):

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3-MULTI-MASTER

2. CCS
Relevant Functions: i2c_start() i2c_write(data) i2c_read() i2c_stop() i2c_poll() Relevant Interrupts: #INT_SSP #INT_BUSCOL EXAMPLE 3-MASTER controls Ds1307 void update_ds1307() //write data into { int8 data;//dlieu tam thoi gui vao ds1307 i2c_start(); i2c_write(0xD0); i2c_write(0x00);//ghi dlieu bdau tu vtri 00 data=sec1|(sec2<<4); i2c_write(data); data=min1|(min2<<4); i2c_write(data); data=hour1|(hour2<<4); i2c_write(data); i2c_stop(); // kthuc truyen dlieu } I2C or SPI activity Bus Collision Issues a start command when in the I2C master mode. Sends a single byte over the I2C interface. Reads a byte over the I2C interface. Issues a stop command when in the I2C master mode. Returns a TRUE if the hardware has received a byte in the buffer.

ds1307

void update_time()//read data from ds1307 { i2c_start(); i2c_write(0xD0); //send slave address | write mode i2c_write(0x00); //set register pointer i2C_start(); i2C_write(0xD1); //send slave address | read mode sec = i2c_read(); //read last address stored in register pointer min = i2c_read(); hour = i2c_read(0);//send NACK after read the last data i2c_stop(); //========================= sec1=sec & 0x0F; sec2=sec>>4; //convert to BCD SEC min1=min & 0x0F; min2=min>>4; //convert to BCD MIN hour1=hour & 0x0F; hour2=(hour & 0x30)>>4; //convert to BCD HOUR }

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V USART
1. REGISTERS
+ TXSTA (thanh ghi tr ng thi pht) + RCSTA (thanh ghi tr ng thi thu) + TXREG (thanh ghi pht) + RCREG (thanh ghi thu) + SPBRG (thanh ghi t o t c baud).

+ PIR1 ch a cc c ng t lin quan. + PIE1 k t h p v i thanh ghi INTCON ch a cc c cho php ng t lin quan Thanh ghi TXSTA: Bit4: Bit ch n ch truy n 1 = Truy n ng b 0 = Truy n b t ng b Bit2: Bit ch n ch 0 = High 1 = Low truy n cao/th p n m un USART

Bit7: Bit ch n xung Clock 1 = Master mode 0 = Slave mode Bit6: Bit ch n ch truy n 1 = truy n 9 bit 0 = Truy n 8 bit Bit5: Bit cho php truy n d li u 1 = Cho php 0 = Khng cho php Thanh ghi RCSTA:

Bit1: Bit bo tr ng thi b m 1 = TSR r ng (d li u c truy n xong) 0 = TSR y (d li u cn trong b m c a USART) Bit0: Gi tr bit th 9 trong ch parity. truyn 9 bit,c th l u bit

0 = khng cho php Bit4: Bit cho php ti p t c nhn d li u 1 = cho php 0 = khng cho php Bit7: Bit cho php s d ng b USART 1 = cho php 0 = khng cho php Bit6: Bit ch n ch 1 = nh n 9 bit 0 = nh n 8 bit nh n Bit3: Bit dng trong ch (Master,Slave) Bit2: Bit bo hi u l i khung Bit1: Bit bo l i ng truy n 9 bit ng truy n

Bit5: Bit cho php nh n tn hi u 1 = cho php Thanh ghi: PIE1 : Thanh ghi ch a cc bit cho php ng t ngo i vi c l p cho cc ng t

Bit0: Gi tr 9 bit trong qu trnh nh n l u t i y

Bit RCIE: Bit cho php ng t nh n d li u USART 1 = cho php ng t 0 = khng cho php ng t Bit TXIE: Bit cho php ng t pht d li u USART

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1 = cho php ng t 0 = khng cho php ng t Thanh ghi: PIR1 : Thanh ghi ch a cc bit c cho ng t ngoi.

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Bit RCIF: Bit bo ng t nh n d li u USART 1 = USART nh n xong 0 = USART ch a nh n xong Bit TXIF: Bit bo ng t truy n d li u USART 1 = Truy n m c a USART cn tr ng 0 = Truy n m c a USART y + CC THANH GHI KHC Thanh ghi TXREG : dng ch a d li u truy n i trong qu trnh Transmit Thanh ghi RCREG : dng l u d li u t ngoi vo trong qu trnh Receive baud c a PIC

Thanh ghi: SPBRG : l thanh ghi thi t l p t c

2. CCS
1. #use rs232(cc khai bo s d ng trong usart) 2. putc(data); xu t d li u i 3. getch(data); ch nh n d li u v 4. kbhit(); bit bo nh n d li u Relevant Interrupts : INT_RDA INT_TBE Interrupt fires when the receive data available Interrupt fires when the transmit data empty

Example: (xem v d nhm 12)

MCU_A #include<16f877a.h> #include<KhaiBaoTGhi_16f877a.h> #fuses HS,NOWDT,PUT,NOPROTECT,NOLVP #use delay(clock=20000000) #use rs232(baud=9600,parity=N,xmit=pin_c6,rcv=pin_c7) /* Thiet lap giao tiep RS232 Toc do band=9600 Khong dung parity Xac dinh chan truyen du lieu RC6 Xac dinh chan nhan du lieu RC7 */ #define start input(pin_a0) #define stop input(pin_a1) #define INV input(pin_a2) /*====================================*/ int8 const m7d[]={0xC0,0xF9,0xA4,0xB0,0x99,0x92,0x82,0xF8,0x80,0X9 0}; int8 i,data,dem,vg,dv,ch; int1 tn,sp;// Bien thuan_nghich va bien start_stop /*=====================================*/ void forward() { putc(data); delay_us(500); data=data<<1; if(bit_test(data,4)) { data=1; dem=dem+1; if(bit_test(dem,3)&&bit_test(dem,1))//if(dem==10) { dem=0; vg++;if(vg==100) vg=0; } } } /*========================================*/ void backward() { putc(data); delay_us(500); data=data>>1; if(data==0) { data=8; dem=dem+1; if(bit_test(dem,3)&&bit_test(dem,1))//if(dem==10) { dem=0;

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vg++;if(vg==100) vg=0; } } } /*=======================================*/ void hien_thi() { ch = vg/10; dv = vg%10; portb=m7d[dv]; rd0=1; delay_us(100); rd0=0; portb=m7d[ch]; rd1=1; delay_us(100); rd1=0; } /*=========================================*/ void delay_hthi() { for(i=0;i<=50;i++) hien_thi(); } /*========================================*/ void main() { trisa=1; trisb=0; trisd=0; data=1; //bien dung de xuat ra cac cuon day cua DC tn=1;sp=0; dem=0; vg=0; /*========================================*/ while(1) { while(!sp) { hien_thi(); if(!start) { while(!start) hien_thi(); sp=1; } } while(sp) { delay_hthi(); if(!stop) { while(!stop) hien_thi(); sp=0; } if(!inv) { while(!inv) hien_thi(); tn=~tn; vg=dem=0; delay_hthi(); } if(tn) forward(); else backward(); }

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} } MCU_B #include <16F877A.h> #include <KhaiBaoTGhi_16F877A.h> #fuses HS,NOWDT,NOLVP,NOPROTECT #use delay(clock=20000000) #use rs232(baud=9600,parity=N,xmit=pin_c6,rcv=pin_c7) void main() { trisb=0; while(1) { if(kbhit()) portb=getch(); } }

VI PWM
1. REGISTERS 2. CCS

VII Interrupts
// Constants used in ENABLE/DISABLE_INTERRUPTS() are: #define GLOBAL 0x0BC0 #define INT_RTCC 0x0B20 #define INT_RB 0xFF0B08 #define INT_EXT 0x0B10 #define INT_AD 0x8C40 #define INT_TBE 0x8C10 #define INT_RDA 0x8C20 #define INT_TIMER1 0x8C01
Example: #include<16f877a.h> #include<KhaiBaoTGhi_16f877a.h> #fuses nowdt,nolvp,hs,noprotect,put #use delay(clock=20000000) #use fast_io(b) #use fast_io(d) int8 a,B; #int_ext void interrupt_ext()

#define INT_TIMER2 #define INT_CCP1 #define INT_CCP2 #define INT_SSP #define INT_PSP #define INT_BUSCOL #define INT_EEPROM #define INT_TIMER0 #define INT_COMP

0x8C02 0x8C04 0x8D01 0x8C08 0x8C80 0x8D08 0x8D10 0x0B20 0x8D40

{ a=a<<1; if(a==0) a=1; INTF=0; } #INT_RB void interrupt_rb() { IF(RBIE&&RBIF) { IF(RB4) B=0b00000011; IF(RB5) B=0b00001111;

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IF(RB6) B=0b00111111; IF(RB7) B=0b11111111; } RBIF=0; } void main() { enable_interrupts(global); enable_interrupts(int_ext); enable_interrupts(INT_RB); ext_int_edge(H_to_L); trisb=0xf1; trisd=0; TRISC=0; a=0x01; while(1) { portd=a; PORTC=B; } }

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VIII 74HC595 //74HC595.c

#use delay(clock=20000000) #include <KhaiBaoTGhi ..h> #define DS rB0 #define SH rB1 #define ST rB2 /*xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx All of functions xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx*/ #separate void load_a_byte(int8 dat); #separate void load_2_byte(int8 dat1,int8 dat2); #separate void load_3_byte(int8 dat1,int8 dat2,int8 dat3); #separate void shift_a_byte(int8 dat); #separate void ST_pulse(void); #separate void load_a_bit(void); //xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx// /*XXXXXXXXXXXXXXXXXXXXXXX load a byte OUTto Q0-Q7 XXXXXXXXXXXXXXX*/ #separate void load_a_byte(int8 dat) { shift_a_byte(dat); ST_pulse(); } /*XXXXXXXXXXXXXXXXXXXXXXX load 2 byte OUTto Q0-Q7 XXXXXXXXXXXXXX*/ #separate void load_2_byte(int8 dat1,int8 dat2) { shift_a_byte(dat1); shift_a_byte(dat2); ST_pulse(); } /*XXXXXXXXXXXXXXXXXXXXXXX load 3 byte OUTto Q0-Q7 XXXXXXXXXXXXXXX*/ #separate void load_3_byte(int8 dat1,int8 dat2,int8 dat3) { shift_a_byte(dat1); shift_a_byte(dat2); shift_a_byte(dat3); ST_pulse(); } /*XXXXXXXXXXXXXX 4 bytes, 5 bytes and so on XXXXXXXXXXX XXXXXXXXXX*/ /*XXXXXXXXXXXX shift a byte INto Q0'-Q7' XXXXXXXXXXXXXX XXXX*/ #separate void shift_a_byte(int8 dat) { int8 kk; for(kk=0;kk<=7;kk++) { DS=bit_test(dat,7-kk); SH=1; delay_us(1); SH=0; delay_us(3); } } /*XXXXXXXXXXX move the data from Q0'-Q7' to Q0-Q7 XXXXXXXXXXX*/ #separate void ST_pulse(void) {

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ST=1;delay_us(1); ST=0;delay_us(3); }

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Example: xem l i v d ch

ng ADC (trang 9)

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