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Sigma Delta Modulation

This document summarizes the key aspects of sigma-delta analog-to-digital converters (ADCs). It discusses the main components of sigma-delta ADCs including the sampler, modulator, and decimation filter. It also outlines the characteristics of sigma-delta modulators such as noise shaping and how oversampling ratios and filter order impact noise and resolution. Finally, it briefly discusses implementation considerations for both sigma-delta ADCs and DACs including circuit design techniques and parameters that influence performance.

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217 views8 pages

Sigma Delta Modulation

This document summarizes the key aspects of sigma-delta analog-to-digital converters (ADCs). It discusses the main components of sigma-delta ADCs including the sampler, modulator, and decimation filter. It also outlines the characteristics of sigma-delta modulators such as noise shaping and how oversampling ratios and filter order impact noise and resolution. Finally, it briefly discusses implementation considerations for both sigma-delta ADCs and DACs including circuit design techniques and parameters that influence performance.

Uploaded by

b_sisco
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPT, PDF, TXT or read online on Scribd

Sigma Delta A/D Converter

Sampler Modulator
Decimation
Filter
x(t)
x[n] y[n]
Analog
Digital
fs fs 2 fo
16 bits
e[n]
Over Sampling Ratio =
2fo is Nyquist frequency
Transfer function for an Lth order modulator given by
) (
1
1 ) ( ) ( z E
L
z z X z Y
|
.
|

\
|

+ =
Bandlimited to fo
|
|
.
|

\
|
o
s
f
f
2
Modulator Characteristics
Highpass character for noise transfer function:
In-band noise power is given by
no falls by 3(2L+1) for doubling of Over Sampling Ratio
L+0.5 bits of resolution for doubling of Over Sampling Ratio
no essentially is uncorrelated for
Dithering is used to decorrelate quantization noise
5 . 0
2
1 2
+
|
|
.
|

\
|
|
|
.
|

\
|
+
=
L
s
o
L
rms o
f
f
L
e n
t
2 > L
) (
) (
z E
z Y
Implementation
Select Over Sampling Ratio and L such that quantization
noise is not the limiting factor
Switched capacitor circuits
easy to build in a digital CMOS process
gains and time constants decided by capacitor ratios and clock frequency
Fully differential circuits achieve better power supply
rejection and common mode noise rejection
Analog characteristics are very sensitive to layout
layouts are made symmetrical to overcome variations in process
Influence of Circuit Parameters
Infinite DC gain for the integrators is unrealistic
Finite DC gain (integrator leakage) causes DC offset and increased
baseband noise
Always build the best possible op-amp for the first integrator
Non-linearity in the feedback D/A converter
Harmonic distortion in the output signal
Possible modulation of the reference voltage (bad!!)
A simple 2 level D/A (two switches and a reference voltage) is used
Circuit noise is usually the performance limiting factor
kT/C noise in the capacitors
kTR noise in the resistors and switches
Thermal and 1/f noise in the MOSFETS

Example Implementation
Decimation
Sample rate conversion from a high rate to Nyquist rate
Performed using cascaded digital FIR filters
One class of filters used are called CICs (cascaded
integrator comb filters) with the transfer function
N
Bit-width of the stage is given by ;b is the
output of the modulator
Decimation in stages to ease hardware implementation
Typically,
K
N
z
z
N
z H
|
|
.
|

\
|

1 2
1
1 1
) (
K
z
|
.
|

\
|

1
1
1
( )
K
N
z

1
( ) b N K +
2
log
1 + = L K
Sigma Delta D/A Converters
Modulator loop is digital
Theory and math applicable exactly: quantization error is
replaced by truncation error
Interpolation filter instead of sampler to raise sample rate
Analog part: A 1 bit D/A followed by one or more filters
Harder to build than A/D counterparts (!!) (analog part has no feedback
loop to take advantage of)
Switched capacitor D/As, Current steering D/As are popular
Switched capacitor filters followed by a continuous time smoothing filter
Tapped delay line FIR filters are also used (tends to be larger in area)
General Circuit Considerations
Keep analog and digital circuitry on separate power
supplies and spaced as far as possible
Use the biggest capacitors possible (area and loading on
amplifiers are issues)
Use the smallest switches possible (lower noise, lower
parasitic capacitive coupling)
Low thermal and 1/f noise in op-amps
Keep signal level as large as possible in the signal path
Keep the reference voltage clean (easier said than done!!)

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