PRBS Generator Using VHDL

Presented By,
Divyesh Patel
&
Alpesh Thesiya

GF’s GCOE, JALGAON 1

Pseudo Random Bit Sequence
(PRBS)
 A Pseudorandom bit generator
(PRBS) is used to generate a random
sequence of 1’s and 0’s
 It is a good approach to use a PRBS
sequence as a testing driver than a
regular pulse wave sequence

2
GF’s GCOE, JALGAON
How to construct a PRBS

3
GF’s GCOE, JALGAON
 LFSR
 A linear feedback shift register (LFSR) is a
shift register whose input bit is a linear
function of its previous state. The only linear
functions of single bits are xor and inverse-
xor; thus it is a shift register whose input bit is
driven by the exclusive-or (xor) of some bits of
the overall shift register value.
 Types Of LFSR:

4
Galois Type Fibonacci Type
Design a 15 bit Pseudo Random
Bit Generator / Analyzer
 Design a 15bit PRBS serial bit stream
at 25MHz
 Design a analyzer to check if an error
is encountered in the output signal

5
GF’s GCOE, JALGAON
Description

 Circuit 1:
15 DFF connect in series, the output of the
13th and 15th DFF will connect to a XOR
logic gate and feedback to the 1st DFF

6
GF’s GCOE, JALGAON
DFF Symbol

7
GF’s GCOE, JALGAON
DFF Schematic

8
GF’s GCOE, JALGAON
Rise and Fall time delay
 Rise time delay tR (0 > 1)
 tR = 7.27ns
 Fall time delay tf (1 > 0)

 tf = 4.99ns

9
GF’s GCOE, JALGAON
15bit PSRB

10
GF’s GCOE, JALGAON
15bit PSRB schematic

11
GF’s GCOE, JALGAON
15bit PSRB Simulation

12
GF’s GCOE, JALGAON
Application
 Data Encryption/Decryption
 Digital Signal Processing
 Wireless Communications
 Built-in Self Test (BIST)
 Data Integrity Checksums
 Data Compression
 Direct Sequence Spread Spectrum
 Scrambler/Descrambler
 Optimized Counters 13
 Conclusion
As the PRBS generator using LFSR is easy because of
ease of construction from simple electronics circuit, long
periods, and very uniformly distributed output. An LFSR is a
linear system, leading to fairly easy cryptanalysis.

14
GF’s GCOE, JALGAON
 THANK YOU

15
GF’s GCOE, JALGAON