SEMICONDUCTOR

FABRICATION
2.5 Silicon Deposition
2.6 Metallization
2.7 Assembly

Silicon Deposition

One process aside from diffusion and ion

implantation that is used to fabricate
virtually all modern integrated circuits as
well as the vast majority of modern discrete
devices done in a planar manner.

A process where films of pure or doped

silicon are grown on the surface of a wafer.

The nature of the surface of the wafer determines

whether the resulting silicon film grown will be
monocrystalline or polycrystalline :

If the surface consists of exposed monocrystalline

silicon, then this serves as a seed for crystal growth
and
the
deposited
film
will
also
be
monocrystalline.

If deposition is conducted on top of an oxide or

nitride film, then no underlying crystalline lattice will
exist to serve as a seed for crystal growth, and the
deposited film will form a fine-grained accumulation
of polycrystalline silicon.

Epitaxy

One type of deposition.

It is the growth of a single-crystal

semiconductor
film upon
a suitable
crystalline substrate.

Different methods of growing

epitaxial layers:
Liquid-phase
Epitaxy

molten
semiconductor material is poured on top of
the substrate
- the wafer surface should be reground
and polished before
forming an epitaxial layer

Low Pressure Chemical Vapor Deposited (LPCVD)

Epitaxy or Vapor-phase Epitaxy most modern epitaxial
method

Epitaxial Reactor used for LPCVD

the

wafers
are
mounted
on
an
inductively
heated
carrier block, and a
mixture
of
dichlorosilane
and
hydrogen passes over
them

these gases react at

the surface of the
wafers to form a slowgrowing
layer
of
monocrystalline silicon

Polysilicon Deposition

Another type of deposition where silicon is

deposited on an amorphous material and the
resulting silicon film has a granular structure
with a grain size dependent upon deposition
conditions and subsequent heat treatment
since no underlying lattice exists to align
crystal growth

the grain boundaries of the of the

polycrystalline
silicon
represent
lattice
defects, which can provide sneak paths for
leakage currents

Metallization

Connecting one or more layers of patterned

wirings to the active components of an
integrated circuit in finishing the fabrication
of IC.

the wiring consists of layers of metal and

polysilicon separated by an insulating
material, usually a deposited oxide

Single-level Metal (SLM) System

A typical type of metallization.

A process where a layer of oxide is

deposited over the entire wafer, and
selected areas are patterned and etched to
create oxide windows exposing the silicon, a
contact for metallization. Once the contacts
have been opened, a thin metallic film can
be deposited and etched to form the
interconnection pattern.

Formation of SLM System

Additional layers of metallization can be

done to form a multilevel metal system.
Multiple metal layers increase the cost of
the IC, but it can simplify interconnection
and reduce layout time.

Assembly

Pattern of a typical finished wafer

Each of the small squares on the wafer represents a

complete IC.
The wafer contains approximately 300 IC dice arrayed
in a rectangular pattern.
A few locations in the array are occupied by process
control structures and test dice rather than actual
ICs.

Process control structures - they are used

by wafer fabrication to evaluate the success or
failure of the manufacturing process
Automated testing equipment gathers data on
every wafer, and any that fail to meet
specifications are discarded.
Test dice used by design engineers to
evaluate prototypes of an IC and they are
normally created by adding a few more layers
to the database containing the layout of the IC

Once all dice on the wafer has been completely

tested, the individual dice are sawn apart using
a diamond-tipped sawblade.

Another automated system then selects the

good dice from the scribed wafer for mounting
and bonding while the rejected dice are
discarded.

Mounting and Bonding

Mounting the dice is mounted on a leadframe

The leadframe consists of a rectangular mount pad

that holds the dice and a series of lead fingers that
will eventually be trimmed to form the eight leads of
the Dual In-Line Package (DIP).

The lead frame usually consists of copper or a copper

alloy, often plated with tin-lead alloy.

Bonding attaching of bondwires to the

dice mounted on leadframes.

Bonding can only be performed in areas of

the dice where the metallization is exposed
through openings in the protective overcoat,
locations called as bondpads.

The bondwires connect various bondpads to

their respective leads.

Packaging

The completed ICs are now labeled with

part numbers and other designation codes.
They are tested again to ensure that they
have not been damaged by the packaging
process.

The completed devices are packaged in

tubes, trays, or reels for distribution to
customers.