8051 Microcontroller

Timer/Counter

Presented by :
AKASH GUPTA 111257

ANKIT SAHA 111340

 Topics Covered
Introduction

TMOD Register

Modes of Operation

TCON Register

Counters
Introduction
 Introduction
The 8051 comes equipped with two timers, both of
which may be controlled, set, read, and configured
individually.

The 8051 timer has three general functions:

Keeping time and calculating the amount of time between

events.

Counting the events .

Generating baud rates for the serial port.

 How does a timer count ?
When a timer is in interval timer mode and correctly configured, it will
increment by ONE every machine cycle.

We have:

1,10,59,000 / 12 = 9,21,583 machine cycles / sec

The 8051 uses a 11.059 MHz crystal.

A machine cycle equals 12 clock (crystal) pulses.

Thus the counter increments 9,21,583 times per second.

Thus if a timer has counted from 0 to 50,000 you may calculate:

50,000 / 9,21,583 = .0542 seconds
3 Bit Timer
 8051 Timers/Counters
The 8051 has 2 timers/counters:
Timer/Counter 0
Timer/Counter 1

Registers Used in the Timer :

Timer 0 registers:
TH0, TL0
Exclusive
Timer 1 registers:
TH1, TL1

TMOD (Timer mode register)

Shared by both
TCON (Timer control register)
 Basic Registers
Registers
THx & TLx
They are 16 bit wide.

These registers store:

The time delay as a timer.
The number of events as a counter.

Timer 0: TH0 & TL0

Timer 0 high byte , timer 0 low byte

Timer 1: TH1 & TL1

Timer 1 high byte, timer 1 low byte
 Timer Registers

TH0 TL0

D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

Timer 0

TH1 TL1

D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

Timer 1
TMOD Register
 TMOD Register
Timer mode register = TMOD

An 8-bit register
lower 4 bits : Timer 0 Mode setting (0000 : not used)
upper 4 bits : Timer 1 Mode setting (0000 : not used)
Not bit-addressable
(MSB) (LSB)
GATE C/T M1 M0 GATE C/T M1 M0
Timer 1 Timer 0
BIT NAME EXPLANATION OF THE FUNCTION TIMER

Functions of 7 GATE1
When this bit is set the timer will only run
when INT1 (P3.3) is high. When this bit is
clear the timer will run regardless of the
1

individual state of INT1.

When this bit is set the timer will count
bits of TMOD 6 C/T1
events on T1 (P3.5). When this bit is clear
the timer will be incremented every machine
1
cycle.
5 T1M1 Timer mode bit 1
4 T1M0 Timer mode bit 1
When this bit is set the timer will only run
when INT0 (P3.2) is high. When this bit is
3 GATE0 0
clear the timer will run regardless of the
state of INT0.
When this bit is set the timer will count
events on T0 (P3.4). When this bit is clear
2 C/T0 0
the timer will be incremented every machine
cycle.
1 T0M1 Timer mode bit 0
0 T0M0 Timer mode bit 0
 C/T
0 : Timer operation
(clock : Machine cycle)

1 : Counter operation
(clock : Tx input pin)

(MSB) (LSB)
GATE C/T M1 M0 GATE C/T M1 M0
Timer 1 Timer 0
 Gate
Every timer has a mean of starting and stopping.

Timer is enabled only while the INT pin is high and TR

control pin(in TCON) is set.

GATE = 0
Internal control
The start and stop of the timer are controlled by the software
(Set/clear the TR)

GATE = 1
External control
The hardware way of starting and stopping the timer by
software and an external source.
 M0,M1
M0 and M1 select the timer mode for timers 0 & 1.

M1 M0 Mode Operating Mode

0 0 0 13-bit timer mode
8-bit THx + 5-bit TLx (x= 0 or 1)
0 1 1 16-bit timer mode
8-bit THx + 8-bit TLx
1 0 2 8-bit auto reload
8-bit auto reload timer/counter;
THx holds a value which is to be reloaded
into TLx each time it overflows.
1 1 3 Split timer mode
Modes of
Operation
 Modes of operation
4
TxM1 TxM0 Timer Mode Description of Mode
Operating
Modes

0 0 0 13-bit Timer

0 1 1 16-bit Timer

1 0 2 8-bit Auto Reload

1 1 3 Split Timer Mode

 Timer mode 0 (The 13 bit
Timer)
This is a relic mode.
Included in 8051 to maintain compatibility with its predecessor
8048.

The counters are counting up:

TLx will count from 0 to 31.
When TLx is incremented from 31, it will reset (overflow) to
0.
Now THx will be incremented.

Hence effectively only 13 bits are used.

Bits 0-4 of TLx.
Bits 0-7 of THx..
 Timer mode 1 (The 16 bit
Timer)
This is the most commonly used mode.

This mode operates in a fashion almost like the Mode 0, only

this time all 16 bits are used.

The counting:
TLx is incremented from 0(00h) to 255(FFh).
When TLx is incremented from 255, it resets to 0 and
causes THx to be incremented by 1.
Hence we have a maximum count of 65,025 (255*255)
machine cycles.
 Mode 1- Steps
1. Choose mode 1 timer 0
MOV TMOD,#01H

2. Load registers TL and TH with initial count values

MOV TH0,#FFH
MOV TL0,#FCH

3. Clear the flag TF0

CLR TF0

4. Start the timer.

SETB TR0
5. The 8051 starts to count up by incrementing the TH0-TL0.
TH0-TL0= FFFCH,FFFDH,FFFEH,FFFFH,0000H

TR0=1 TR0=0
Start timer TH0 TL0
Stop timer

FFFC FFFD FFFE FFFF 0000

TF = 0 TF = 0 TF = 0 TF = 0 TF = 1

TF Monitor TF until TF=1

 Mode 1- Programming

XTAL
oscillator 12
C/T = 0
Timer
overflow
flag
TH TL TF

TR

TF goes high when FFFF 0

 Timer Mode 2 (8 bit Auto
Reload)
When a timer is in mode 2, THx holds the "reload value" and
TLx is the timer itself.

Thus the counting proceeds as:

TLx starts counting up.
TLx reaches 255 and is subsequently incremented.
Now instead of resetting to 0 (as in the case of modes 0
and 1), it will be reset to the value stored in THx.
 Mode 2 Steps
1. Choose mode 2 timer 0
MOV TMOD,#02H

2. Set the original value to TH0.

MOV TH0,#38H

3. Clear the flag to TF0=0.

CLR TF0

4. After TH0 is loaded with the 8-bit value, the 8051 gives a copy of it
to TL0.
TL0=TH0=38H
 Mode 2 Steps
5. Start the timer.
SETB TR0

6. The 8051 starts to count up by incrementing the TL0.

TL0= 38H, 39H, 3AH,....

7. When TL0 rolls over from FFH to 00, the 8051 set TF0=1. Also, TL0 is reloaded
automatically with the value kept by the TH0.
TL0= FEH, FFH, 00H (Now TF0=1)
The 8051 auto reload TL0=TH0=38H.
Clr TF0
Go to Step 6 (i.e., TL0 is incrementing continuously).
Note that we must clear TF0 when TL0 rolls over. Thus, we can monitor TF0 in
next process.

8.Clear TR0 to stop the process.

Clr TR0
 Timer 1 Mode 2
With Internal Input

XTAL
oscillator 12

C/T = 0

TL1 TF1 overflow flag

reload
TR1 TH1
 Timer Mode 3 (Split Timer)
When Timer 0 is placed in mode 3, it essentially becomes two separate 8-
bit timers.

That is to say, Timer 0 is TL0 and Timer 1 is TH0.

Both timers count from 0 to 255 and overflow back to 0 independently.

What happens to timer1?

All the bits that are related to Timer 1 will now be tied to TH 0.
While Timer 0 is in split mode, the real Timer 1 (i.e. TH1 and TL1) can be
put into modes 0, 1 or 2 normally.
However, you may not start or stop the real timer 1 since the bits that do
that are now linked to TH0.
The real timer 1, in this case, will be incremented every machine cycle
no matter what.
 Use of mode 3

A good possible use of using split timer mode is if you need to have two
separate timers and, additionally, a baud rate generator.

In such case you can use the real Timer 1 as a baud rate generator
and use TH0/TL0 as two separate timers.
TCON Register
 TCON SFR
Finally, there is one more SFR that controls the two
timers and provides valuable information about them.

Timer control register: TCON

Upper nibble : TIMER
Lower nibble : INTERRUPTS
The Register bits represent the following values :
BIT NAME BIT ADDRESS EXPLANATION OF TIMER
THE FUNCTION
Timer 1 Overflow. This
bit is set by the
7 TF1 8Fh 1
microcontroller when
Timer 1 overflows.
Timer 1 Run.
When this bit is set
6 TR1 8Eh Timer 1 is turned on. 1
When this bit is clear
Timer 1 is off.
Timer 0 Overflow. This
bit is set by the
5 TF0 8Dh 0
microcontroller when
Timer 0 overflows.
Timer 0 Run.
When this bit is set
4 TR0 8Ch Timer 0 is turned on. 0
When this bit is clear
Timer 0 is off.
 TCON Register
(MSB) (LSB)
TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0
Timer 1 Timer0 for Interrupt
TR (run control bit) TF (timer flag, control flag)
TR0 : Timer 0 TF0 : timer 0
TR1: Timer 1 TF1 : timer 1.
Turn timer - ON or OFF TF is like a carry.
TR = 0 : OFF (stop) Originally, TF=0.
TR = 1 : ON (start) When TH-TL roll over to 0000
from FFFFH
Then , TF is set to 1
TF=0:not reached
TF=1:reached
 TCON Register
This SFR is Bit-Addressable
What does this mean ?
It means that if you want to set the bit TF1
(which is the highest bit of TCON)
you could execute the command :
SETB TF1
Rather than executing this command :
MOV TCON , #80h
Because it is bit-addressable.
It decreases program execution time.
Counters
 Counters
These timers can also be used as counters counting
events happening outside the 8051.

As far as the use of a timer/counter as an event counter is

concerned ,everything that we have talked about in the last
section also applies to programming it as a counter ,except
the source of the frequency.

When used as a timer ,the 8051s crystal is used as the

source of the frequency.

However ,when used as a counter ,it is a pulse outside of the

8051 that increments the TH,TL registers.
 Port 3 Pins
Used for Timers 0 and 1
Pin Port Pin Function Description

14 P3.4 T0 Timer/Counter 0 external input

15 P3.5 T1 Timer/Counter 1 external input

(MSB) (LSB)

GATE C/T=1 M1 M0 GATE C/T=1 M1 M0

Timer 1 Timer 0
 Counter Mode 1
16-bit counter (TH0 and TL0)
TH0-TL0 is incremented when TR0 is set to 1 and an external
pulse (in T0) occurs.
When the counter (TH0-TL0) reaches its maximum of FFFFH, it
rolls over to 0000, and TF0 is raised.
Programmers should monitor TF0 continuously and stop the
counter 0.
Programmers can set the initial value of TH0-TL0 and let TF0=1
as an indicator to show a special condition. (ex: 100 people
have come).
Timer 0 with External Input
(Mode 1)

overflow
flag
Timer 0
external TH0 TL0 TF0
input Pin
3.4
TF0 goes high when
FFFF 0
C/T = 1
TR0
 Counter Mode 2
8-bit counter.
It allows only values of 00 to FFH to be loaded into TH0

Auto-reloading
TL0 is incremented if TR0=1 and external pulse occurs.
Thank You!