SimpleScalar Tool Set,

Version 2

CSE 323
Department of Computer
Engineering
A Computer Architecture Simulator
 What is an architectural simulator?
 Tool that reproduces the behavior of a computing device

 What is SimpleScalar?
 A simulator that performs fast, flexible and accurate simulation of
modern processors that implement the SimpleScalar Architecture.
 What is a SimpleScalar Architecture?
 A close derivative of the MIPS architecture.
Simulation
 How does the simulation?
 Takes binaries compiled for the SimpleScalar architecture
and simulates their execution on processor simulator.
Simulation Suite Overview
Binaries?
 How to create binaries for the architecture?
 The simulator provides sets of precompiled binaries.
 Also provides a modified version of GCC that allows
you to compile your own binaries.
SimpleScalar Overview
Simulator
source

Host C
compiler

Results
How to make a binary for
SimpleScalar
 You will be working on TUX machine (IP:10.2.7.254)
with your accounts and passwords.
 SimpleScalar is located in /usr/local/
 Copy the makefile into your own directory.
 cp /usr/local/simplescalar/simplesim-2.0/tests/src/Makefile ./
 Add the necessary information about your c file into
the make file in order to compile it.
 vi Makefile
myprog1:myprog1.c
$(CC) $(CFLAGS) -o myprog1 myprog1.c
How to make a binary for
SimpleScalar
 Compile your c code
 make myprog1
 Run the simulator
 /usr/local/simplescalar/simplesim-2.0/sim-cache
myprog1
 Global Simulator Options (cont.)
 Supported on all simulators
 -h - print simulator help message
 -d - enable debug message
 -i - start up in DLite! debugger
 -q - quit immediately
 -config <file> - read config parameters from
<file>
 -dumpconfig <file> - save config parameters into <file>
Cache Simulation Options
 -cache:dl1 <config> l1 data cache
 -cache:dl2 < config > l2 data cache
 -cache:il1 < config > l1 inst cache
 -cache:il2 < config > l2 inst cache
 -tlb:itlb < config > instruction TLB
 -tlb:dtlb < config > data TLB
sim-cache
sim-cache …(cont.)
 The cache size is therefore the product
of, <nsets>, <bsize>, <assoc>.
 il1:256:32:1:1 (8KB)
sim-cache …(cont.)
Example
 myprog1.c
 #define N 1024
main()
{
int i,j,x[N][N];
for(i=0;i<N;i++)
for(j=0;j<N;j++)
x[i][j]=2*x[i][j];
}
Example (cont’d)
 adding below ones into the Makefile
myprog1:myprog1.c
$(CC) $(CFLAGS) -o myprog1 myprog1.c
 Compile myprog1.c
 make myprog1
 Run the simulator with sim-cache defaults
 /usr/local/simplescalar/simplesim-2.0/sim-cache
myprog1
Example (cont’d)
 Collect the output
 il1.misses 381 # total number of misses
 il1.miss_rate 0.0001 # miss rate (i.e., misses/ref)
 dl1.misses 131512 # total number of misses
 dl1.miss_rate 0.0626 # miss rate (i.e., misses/ref)
 ul2.misses 65933 # total number of misses
 ul2.miss_rate 0.2506 # miss rate (i.e., misses/ref)
Example (cont’d)
 Run the binary for the following cache
system
 unified cache with 256 sets x 32 bytes per
block
 /usr/local/simplescalar/simplesim-2.0/sim-cache
-cache:il1 dl1 -cache:dl1 ul1:256:32:1:l -cache:dl2
none -cache:il2 none myprog1
 Collect the results
 Comment on the results
More Information
 http://www.simplescalar.com