Chapter 8:

FET Amplifiers
 Introduction

FETs provide:

• Excellent voltage gain

• High input impedance
• Low-power consumption
• Good frequency range

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 FET Small-Signal Model

Transconductance

The relationship of a change in ID to the corresponding change in

VGS is called transconductance

Transconductance is denoted gm and given by:

ΔI D
gm 
ΔV GS

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 Graphical Determination of gm

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 Mathematical Definitions of gm
I D
gm 
VGS

2I DSS  VGS 
gm  1  
VP  VP 

2I DSS
Where VGS =0V g m0 
VP
 V 
g m  g m0 1  GS 
 VP 

Where 1  VGS  ID
VP I DSS

 V  ID
g m  g m0  1  GS   g m0
 VP  I DSS

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 FET Impedance
Input impedance:
Zi  

Output Impedance:
1
Z o  rd 
y os

where:
VDS
rd  VGS  constant
I D
yos= admittance parameter listed on FET specification sheets.

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Robert L. Boylestad and Louis Nashelsky Upper Saddle River, New Jersey 07458 • All rights reserved.
 FET AC Equivalent Circuit

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Robert L. Boylestad and Louis Nashelsky Upper Saddle River, New Jersey 07458 • All rights reserved.
Common-Source (CS) Fixed-Bias Circuit

The input is on the gate and the

output is on the drain

There is a 180 phase shift

between input and output

Electronic Devices and Circuit Theory, 10/e 8 Copyright ©2009 by Pearson Education, Inc.
Robert L. Boylestad and Louis Nashelsky Upper Saddle River, New Jersey 07458 • All rights reserved.
 Calculations
Input impedance:

Zi  RG

Output impedance:

Zo  R D || rd

Zo  R D
rd  10R D

Voltage gain:
Vo
Av   g m (rd || R D )
Vi
Vo
Av   g m R D
Vi rd  10R D

Electronic Devices and Circuit Theory, 10/e 9 Copyright ©2009 by Pearson Education, Inc.
Robert L. Boylestad and Louis Nashelsky Upper Saddle River, New Jersey 07458 • All rights reserved.
Common-Source (CS) Self-Bias Circuit
This is a common-source amplifier
configuration, so the input is on the gate
and the output is on the drain

There is a 180 phase shift between

input and output

Electronic Devices and Circuit Theory, 10/e 10 Copyright ©2009 by Pearson Education, Inc.
Robert L. Boylestad and Louis Nashelsky Upper Saddle River, New Jersey 07458 • All rights reserved.
 Calculations
Input impedance:
Zi  RG

Output impedance:

Zo  rd || R D

Zo  R D
rd  10R D

Voltage gain:

A v  g m (rd || R D )

A v  g m R D
rd  10R D

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Robert L. Boylestad and Louis Nashelsky Upper Saddle River, New Jersey 07458 • All rights reserved.
Common-Source (CS) Self-Bias Circuit
Removing Cs affects
the gain of the circuit.

Electronic Devices and Circuit Theory, 10/e 12 Copyright ©2009 by Pearson Education, Inc.
Robert L. Boylestad and Louis Nashelsky Upper Saddle River, New Jersey 07458 • All rights reserved.
 Calculations
Input impedance:
Zi  RG

Output impedance:

Zo  R D
rd  10R D

Voltage gain:
Vo gm R D
Av  
Vi R  RS
1  gm RS  D
rd
Vo g R
Av    m D rd  10(R D  R S )
Vi 1  gmRS

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Robert L. Boylestad and Louis Nashelsky Upper Saddle River, New Jersey 07458 • All rights reserved.
Common-Source (CS) Voltage-Divider Bias

This is a common-source
amplifier configuration, so the
input is on the gate and the
output is on the drain.

Electronic Devices and Circuit Theory, 10/e 14 Copyright ©2009 by Pearson Education, Inc.
Robert L. Boylestad and Louis Nashelsky Upper Saddle River, New Jersey 07458 • All rights reserved.
 Impedances
Input impedance:

Zi  R1 || R 2

Output impedance:

Zo  rd || R D

Zo  R D
rd  10R D

Voltage gain:
A v  g m (rd || R D )

A v  g m R D
rd  10R D

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Source Follower (Common-Drain) Circuit
In a common-drain amplifier
configuration, the input is on the
gate, but the output is from the
source.

There is no phase shift between

input and output.

Electronic Devices and Circuit Theory, 10/e 16 Copyright ©2009 by Pearson Education, Inc.
Robert L. Boylestad and Louis Nashelsky Upper Saddle River, New Jersey 07458 • All rights reserved.
 Impedances
Input impedance:
Zi  RG

Output impedance:
1
Z o  rd || R S ||
gm
1
Z o  R S || r  10R S
gm d

Voltage gain:
Vo g m (rd || R S )
Av  
Vi 1  g m (rd || R S )
Vo gm RS
Av   r  10
Vi 1  g m R S d

Electronic Devices and Circuit Theory, 10/e 17 Copyright ©2009 by Pearson Education, Inc.
Robert L. Boylestad and Louis Nashelsky Upper Saddle River, New Jersey 07458 • All rights reserved.
 Common-Gate (CG) Circuit

The input is on the source

and the output is on the
drain.

There is no phase shift

between input and output.

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 Calculations
Input impedance:

 r  RD 
Z i  R S ||  d 
 1  g m rd 
1
Z i  R S || r  10R D
gm d

Output impedance:

Zo  R D || rd
Voltage gain:
Z o  R D rd  10
 RD 
 m D
g R  
Vo  rd  A v  g m R D rd  10R D
Av  
Vi  RD 
1  
 rd 

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 D-Type MOSFET AC Equivalent

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 E-Type MOSFET AC Equivalent

gm and rd can be found in

the specification sheet for
the FET.

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 Common-Source Drain-Feedback

There is a 180 phase shift

between input and output.

Electronic Devices and Circuit Theory, 10/e 22 Copyright ©2009 by Pearson Education, Inc.
Robert L. Boylestad and Louis Nashelsky Upper Saddle River, New Jersey 07458 • All rights reserved.
 Calculations
Input impedance:
R F  rd || R D
Zi 
1  g m (rd || R D )
RF
Zi  R  rd || R D , rd  10R D
1  gm R D F

Output impedance:
Z o  R F || rd ||R D

Z o  R D R F  rd || R D , rd  10R D

Voltage gain:

A v  g m (R F || rd || R D )
A v   g m R D R F  rd ||RD ,rd 10RD

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Robert L. Boylestad and Louis Nashelsky Upper Saddle River, New Jersey 07458 • All rights reserved.
 Common-Source Voltage-Divider Bias

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 Calculations
Input impedance:
Z i  R1 || R 2

Output impedance:
Zo  rd || R D
Z o  R D rd  10

Voltage gain:
A v  g m (rd || R D )
A v  g m R D rd  10R D

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 Summary Table

more…
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 Summary Table

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 Troubleshooting
Check the DC bias voltages:

If not correct check power supply, resistors, FET. Also check to ensure
that the coupling capacitor between amplifier stages is OK.
.
Check the AC voltages:

If not correct check FET, capacitors and the loading effect of the next
stage

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 Practical Applications
Three-Channel Audio Mixer
Silent Switching
Phase Shift Networks
Motion Detection System

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