Definition of Embedded Systems:

A system designed with a combination of hardware and software for a specific task
is called Embedded Systems.......

Examples:
1. TV Remote control
2. DVD players
3. Printers
4. Scanners
5. Pagers
6. Washing Machines
7. Microwave Ovens
8. Automatic Teller Machines
9. Modems
10. Digital Cameras
11. Network Cards
12. Routers
13. Video Games
14. Set-top boxes
15. Stereo systems
16. Home Security Systems
 CPU memory Timers Ports Interrupts Microprocessor

I/O
Memory TIMERS
Ports
Micro Controller

Serial
CPU Interrupts
Ports

Definition: A programmable device which has a CPU along with inbuilt memory, I/O, timers, serial
port and interrupt is called a Microcontroller….
 Microprocessors vs Microcontrollers

Microprocessor Microcontroller

It is used for multi processing It is used for Specific processing

Needs every circuitry externally Every feature is internally present

Very expensive Cost is very affordable

 8051
DEVELOPED BY INTEL
CORPORATION, IN THE YEARS AROUND
1978-1980.

THERE ARE MANY OTHER CORPORATIONS THAT

DEVELOP MICROCONTROLLERS, LIKE,

PHILIPS
MOTOROLA
ZILOG, etc.,
Features of Intel 8051 Microcontroller: It is an 8-bit microcontroller

It is a 40 pin IC , 5 volts of Vcc

11.0592 MHz clock frequency [Operational Frequency]
8 bit data lines, 16 bit address lines

Memory: 4 KB ROM and 128 bytes of RAM [Internal Memory]

Up to 64 KB of ROM and RAM [External Memory]

I/O Ports : Four 8 bit I/O Ports

Timers : 2 Timers, each of size 16 bit

Serial Ports: 1 Serial Port

Interrupts: 5 Interrupts
Comparison with other basic versions of microcontrollers

Features 8031 8051 8052

Data 8 bit 8 bit 8 bit

RAM 128 bytes 128 bytes 256 bytes

ROM ----- 4 KB 4KB

Timers 2 2 3

Serial Port 1 1 1

Interrupts 3 5 6
Elevator - Example to show the need of interrupts, timers and programmable memory within a chip

Req > floor

Going up
Timer < 10 sec

Timer = 10 sec

idle Door open

Req = floor

Going down

Req< floor
 Port 0 Port 2
8051 Architecture: latch latch
Address
RAM RAM Port 0 Port 2 EPROM
REG Drivers Drivers Program
Address
Register

STACK POINTER BUFFER

A
Program
T1 T2
B TCON,TMOD,TH0,TL0
Incrementer

ALU TH1,TL1,PCON,SCON,
Program
IE,IP,SBUF,SCON Counter

FLAG
Other Registers
DPTR
PSEN
Instruct
ALE Timing
ion
EA Control
Register
RST Port 1 Port 3
latch latch

Oscillator
Port 1 Port 3
Drivers Drivers
PIN CONFIGURARTION of 8051

VCC
P1.0
1 40 P0.0 [AD0]
P1.1
2 39 P0.1[AD1]
P1.2
3 38 P0.2[AD2]
P1.3
4 37
P1.4 P0.3[AD3]
5 36
P1.5 P0.4[AD4]
P1.6
6 35
P1.7
7 34 P0.5[AD5]

RESET
8 33 P0.6[AD6]

P3.0
9 32 P0.7[AD7]
10 31 EA
P3.1
P3.2 11 8051 30 ALE
P3.3 12 29 PSEN
P3.4 13 28 P2.7 [A15]

P3.5 14 27 P2.6 [A14]

P3.6 15 26 P2.5 [A13]

P3.7 16 25 P2.4 [A12]

XTAL2 17 24 P2.3 [A11]

P2.2 [A10]
18 23
XTAL1 P2.1[A9]
19 22
P2.0 [A8]
20 21
GND
Operations of 8051 microcontroller

 Accumulator (8bit register)

 B register
 R0,R1,R3,R4,R5,R6,R7 data memory registers
 Special Function Registers– TMOD TCON SCON SBUF, etc
 5 interrupts--- 2 timer, 2 external, 1 serial port
 2 timers
 4 bi directional 8 bit I/O ports
Port 0 [P0]
total 32 pins of I/O ports
Port 1 [P1]
Port 2 [P2]
Port 3 [P3]
 Program Status word [ PSW], Flag Register

CY AC F0 RS1 RS0 OV F1 P
PSW.7 PSW.6 PSW.5 PSW.4 PSW.3 PSW.2 PSW.1 PSW.0

Cy PSW.7 Carry Flag

AC PSW.6 Auxiliary Carry Flag RS1 RS0 REGISTE ADDRES
F0 PSW.5 Flag 0 available to the user for general purpose R BANK S
RS1 PSW.4 Register Bank selector bit 1 (SEE NOTE) 0 0 0 00H-07H
RS0 PSW.3 Register Bank selector bit 0 (SEE NOTE) 0 1 1 08H-0FH
OV PSW.2 Overflow Flag
1 0 2 10H-17H
F1 PSW.1 Flag F1 available to the user foe general purpose
1 1 3 18H-1FH
P PSW.0 Parity flag. Set/cleared by hardware each instruction cycle to indicate an
odd/even number of “1” bits in the accumulator

Note: The value presented by the RS0 and RS1 selects the corresponding register banks
 7F H
Memory Organization of 8051
Internal ROM
Internal RAM is of size 128 bytes
EPROM - 4 KB
Range of address 00 H – 7F H 30 H
2F H
1. 00 H – 1F H - Memory Bank
general purpose registers
{ Bank 0 – R0 – R7}
{ Bank 1 – R0 – R7}
{ Bank 2 – R0 – R7} 20 H
{ Bank 3 – R0 – R7} 1F H

2. 20 H – 2F H - Bit Addressable Area { Bank 3 – R0 – R7}

3. 30 H – 7F H – General Purpose Area { Bank 2 – R0 – R7}

{ Bank 1 – R0 – R7}

{ Bank 0 – R0 – R7}
00 H
SFRs [SPECIAL FUNCTION REGISTERS]
 External Memory Organization

External ROM up to 64 KB
External RAM up to 64 KB
 Port Structures of 8051

VCC
P1.0
1 40 P0.0 [AD0]
P1.1
2 39 P0.1[AD1]
P1.2
3 38 P0.2[AD2]
P1.3
4 37
P1.4 P0.3[AD3]
5 36
P1.5 P0.4[AD4]
P1.6
6 35
P1.7
7 34 P0.5[AD5]

RESET
8 33 P0.6[AD6]

P3.0
9 32 P0.7[AD7]
10 31 EA
(RXD)P3.0
(TXD)P3.1
P3.1
P3.2 11 8051 30 ALE
(INT0)P3.2 P3.3 12 29 PSEN
(INT1)P3.3 P3.4 13 28 P2.7 [A15]
(T0)P3.4 14 27 P2.6 [A14]
P3.5
(T1)P3.5
(WR)P3.6 P3.6 15 26 P2.5 [A13]

(RD)P3.7 P3.7 16 25 P2.4 [A12]

XTAL2 17 24 P2.3 [A11]

P2.2 [A10]
18 23
XTAL1 P2.1[A9]
19 22
P2.0 [A8]
20 21
GND
Ports
• Port 0 - external memory access
• low address byte/data
• Port 2 - external memory access
• high address byte
• Port 1 - general purpose I/O
• pins 0, 1 for timer/counter 2
• Port 3 - Special features
• 0 - RxD: serial input
• 1 - TxD: serial output
• 2 - INT0: external interrupt
• 3 - INT1: external interrupt
• 4 - T0: timer/counter 0 external input
• 5 - T1: timer/counter 1 external input
• 6 - WR: external data memory write strobe
• 7 - RD: external data memory read strobe
 INTERRUPTS

INTERNAL INTERRUPTS – 3

FROM TIMER 1 AND TIMER 0

SERIAL PORT

EXTERNAL INTERRUPTS

FROM EXTERNAL PINS [ INT0 AND INT1]

INTERRUPT ENABLE REGISTER [ IE]
(MSB) (LSB)
EA X X ES ET1 EX1 ET0 EX0
bar

SYMBOL POSITION FUNCTION

EA IE.7 disables all interrupts if EA bar=0, no interrupt will be acknowledged. If EA bar=1,
each interrupt source is individually enabled or disabled by setting or clearing its
enable bit.
IE.6 Reserved.

IE.5 Reserved.
ES IE.4 Enables or disables the serial port interrupt. If ES=0, the serial port interrupt is
disabled.
ET1 IE.3 Enables or disables the Timer 1 Overflow interrupt. If ET1=0, the Timer 1 interrupt
is disabled.
EX1 IE.2 Enables or disables External interrupt 1. If EX1=0, External interrupt 1 is disabled.
ET0 IE.1 Enables or disables the Timer Overflow interrupt. If ET0=0, the Timer 0 interrupt is
disabled.
EX0 IE.0 Enables or disables External interrupt 0. If EX0=0, External interrupt 0 is disabled.
INTERRUPT PRIORITY REGISTER [ IP]

(MSB) (LSB)
X X X PS PT1 PX1 PT0 PX0

Symbol Position Function

IP.7 Reversed.
IP.6 Reversed.
IP.5 Reversed.
PS IP.4 Defines the Serial port interrupt priority level. PS=1 programs it to the higher
priority level.
PT1 IP.3 Defines the Timer 1 interrupt priority level. PT1=1 programs it to the higher
priority level.
PX1 IP.2 Defines the Timer External Interrupt 1 priority level. PX1=1 programs it to the
higher priority level.
PT0 IP.1 Enables or disables the Timer 0 Interrupt priority level. PT0=1
programs it to the higher priority level.
PX0 IP.0 Defines the External interrupt 0 priority level. PX0=1 programs it to the higher
priority level.
ADDRESSING MODES:

 Immediate Addressing Mode:

Eg: 1) MOV A,#05H
‘# ’ represents the data is immediate.
2) MOV DPTR,#AAAAH
Invalid----MOV DPTR,#74321 (Because Max. decimal value is 65535 (FFFF))

 Register Addressing Mode:

Eg: 1) MOV A,B
2) MOV A,R1
Invalid----1) MOV A,DPTR
2) MOV R1,R2

 Direct Addressing Mode:

Eg: 1)MOV A,05 H
 Register Indirect Addressing Mode:
Eg: 1) MOV A,@R1
@ is used to represent indirect addressing
2)MOV @R2,A
 Indexed Addressing Mode:
Eg: 1) MOVC A,@A+PC
2) MOVC A,@A+DPTR
3) MOVX A,@A+DPTR
Instruction Set :

 Data Transfer Instructions

 Arithmetic Instructions

 Logical Instructions

 Boolean/Bitwise Instructions

 Branching Instructions
Data Transfer Instructions:

MOV: Move copy a data byte from a memory/ register

Eg. MOV A,B
MOVC : Move from Code [Internal ROM] memory
Eg: MOVC A,@A+DPTR
MOVX :Move for External Memory[ RAM or ROM]
Eg: MOV A,@A+DPTR
Push : PUSH 06 H; Push R6 of bank 0 on to top of stack
Pop : Reg Number [ only from BANK 0]
Eg. POP 06H
HLT  halt ; Stop processing and wait
NOP  No operation ; do not perfrom any operation
Arithmetic Instructions:
ADD : Performs addition
Eg. ADD A,B
ADD A,@R0
ADD A,R5
ADDC: Add with carry
SUBB : subtract with borrow
INC : Increment
Eg.INC R0
INC @R0
DEC :Decrement
Eg. DEC R1
DEC @R1
DAA:Decimal adjust for accumulator
DAA A;Fixed instruction
MUL : Multiply
MUL AB ;Fixed instruction
Two values will be present in A and B registers. The product will be stored in the
accumulator. If the product is more than 8bits,then lower byte will be stored on A and higher
byte will be stored in B

DIV :Divide
DIV AB ;Fixed instruction
Dividend will be stored in A& divisor will be stored in B. After division, the quotient will
beheld with A& remainder with B.
Logical Instructions:

ANL : AND operation

ANL A,Value; ANL-Logical AND
Value may be immediate value or registers
The result will be stored in accumulator.
ORL : OR
ORL A,VALUE
XRL: X-OR
XRL A,VALUE
Shift Instructions:

RL: Rotate Left

RL A; Rotate right the accumulator
RLC : Rotate Left Through Carry
RLC A; Rotate left the accumulator through carry.
RR : Rotate Right
RR A; Rotate right the accumulator
RRC: Rotate Right Through carry
RRC A ; Rotate right the accumulator through carry.

SETB : Set a Bit

Bitwise operation instructions:
Eg. SETB P0.5
MOV C,BIT
CPL: complement
CPL A: Complement Accumulator
CLR : CLR A ; clear accumulator

Branching Instructions:
Unconditional branch:

Jump instruction : SJMP [ 8 bit] ,

LJMP[ Long jump 16 bit] : Jump to the specific address

CALL Instruction : ACALL[ Absoulute call ] ,

LCALL [ 16 bit]: Call a subroutine

RET : Return from a Subroutine

RETI : Return from a interrupt sub routine
Conditional branch:
DJNZ :
DECREAMENT AND JUMP IF NOT ZERO [syntax : DJNZ reg, label]
CJNE :
COMPARE AND JUMP IF NOT EQUAL [ Syntax: CJNE Reg1, Reg2/Imm_value, Label]
JZ ADDRESS ; Jump on zero
JNZ ADDRESS ; Jump on non zero
JC/JNC Address; Jump on carry/Jump on nocarry
JB/NB: Jump on bit/Jump on no bit
JE/JNE: Jump if equal/jump if not equal.
A simple program:

ADD R1 =05 h and R2 = 03 H

Program :
ADD R1,R2
It is invalid to memory registers directly

Program:
Mov A, R1
Add A, R2
 PROGRAMS USING SUBROUTINES
Writing Delays in a Program Generate a wave at P1.5

ORG 00H

Again : SETB P1.5 ; Set the bit P1.5

P1.5
ACALL DELAY ; call a delay fro subroutine to make the state exist
for some time
8051
CLR P1.5 ; Clear the bit P1.5 to 0

ACALL DELAY ; call a delay fro subroutine to make the state exist
for some time
SJMP Again ; Continue the signal

DELAY :
MOV R3, # 50
DJNZ R3, $ ; $ symbol puts the loop in the same line
(or)
BACK: DJNZ R3, BACK ;
RET
END
 TIMERS

Timer 1 [16 bit] Timer 0 [16 bit]

{ THI and TL1 (8 bit each)} { TH0and TL0 (8 bit each)

• 8051 has two 16-bit on-chip timers that can be used for timing durations
or for counting external events
• The high byte for timer 1 (TH1) is at address 8DH while the low byte
(TL1) is at 8BH
• The high byte for timer 0 (TH0) is at 8CH while the low byte (TL0) is at
8AH.
• Timer Mode Register (TMOD) is at address 88H
TIMER MODE REGISTER [ TMOD REG]
GATE C/T bar M1 M0 GATE C/T bar M1 M0

Timer 1 Timer 0
GATE When TRx is set and GATE=1,TIMER/COUNTER will run only while INTx pin is high (hardware control).When
GATE=0, TIMER/COUNTER will run only while TRX=1 pin is high(software control).

C/T bar Timer or Counter selector. Cleared for timer operation(input from internal system clock).Set for counter
operation(input from TX input pin)

M1 Mode selector bit(Note 1)

M0 Mode selector bit(Note 1)

M1 M0 Operation Mode
0 0 13-Bit Timer
0 1 16-bit Timer/Counter
1 0 8-bit Auto Reload
1 1 (Timer 0) TL0 is an 8-bit Timer/Counter controlled by the standard timer0 control bits.TH0 is
an 8-bit Timer and controlled by Timer 1 control bits
1 1 (Timer 1) Timer/counter stopped
TIMER CONTROL REGISTER [ TCON REG]
MSB LSB

TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0

BIT SYMBOL FUNCTION

TCON.7 TF1 Timer 1 overflow flag. Set by hardware on Timer/counter overflow.
Cleared by hardware when processor vectors to interrupt routine, or
clearing the bit in software.
TCON.6 TR1 Timer 1 Run control bit. Set/cleared by software to turn
Timer/Counter on/off.
TCON.5 TF0 Timer 0 overflow flag. Set by hardware on Timer/Counter overflow.
Cleared by hardware when processor vectors to interrupt routine, or
by clearing the bit in software.
TCON.4 TR0 Timer 0 Run control bit. Set/cleared by software to turn Timer/counter
on/off.
TCON.3 IE1 Interrupt 1 Edge flag. Set by hardware when external interrupt edge detected. Cleared
When interrupt processed.
TCON.2 IT1 Interrupt 1 type control bit. Set/cleared by software to specify falling edge/low level triggered
external interrupts.
TCON.1 IE0 Interrupt 0 Edged flag. Set by hardware when external interrupt edge detected. Cleared when
interrupt processed
TCON.0 IT0 Interrupt 0 type control bit. Set/cleared by software to specify falling edge/low level triggered
external interrupts.
 Timer frequency is the 12th part of the Operational Frequency of 8051 [ i.e 11.0592 MHz]

So Timer frequency is 11.0592 MHz / 12

= 921.6 KHz = 1.085 µsec

Formula for Delay is

Delay [ in ms or µ s] = [ Maximum count (16 or 8 bit) - Given Count + 1] x 1.085 µsec [ in Hexa-Dec]

= [ Maximum count (16 or 8 bit) - Given Count + 1] x 1.085 µsec [ in DECIMAL]

 MODE 0: used for Maximum of 13 bit count [ 0000 H - 1FFFH]

MODE 1: used for Maximum of 16 bit count [ 0000 H - FFFFH]

MODE 2: used for Maximum of 8 bit count and used in Serial Data Communication [ 00 H - FF H]

Timer in Mode 1[ 16 bit] and Mode 0 [13 bit] Timer in Mode 2 [8 bit]
Formula for Delay is

Delay [ in ms or µ s] = [ Maximum count (16 or 8 bit) - Given Count + 1] x 1.085 µsec [ in Hexa-Dec]

= [ Maximum count (16 or 8 bit) - Given Count + 1] x 1.085 µsec [ in DECIMAL]

CALCULATE the Delay or Count using the Formula

Given Delay is 5 ms, calculate the Count Required

5 ms = [ 65535 - Count +1 ] x 1.085 µsec

4608= 65536 – count

Count = 65536 - 4608

Count = 60928 = EE00 H

Count = EE00 H
STEPS of Timer Programming
Generate a wave at P1.5 WITH 5 ms Delay
1. Select the timer [ 1 or 0] and its mode by TMOD Reg
2. Set the count by loading the Timer Regs. [ by calculating delay time]
3. START the Timer [ SETB TR]
4. Wait until TF is Raised [ BACK : JNB TF1, Back ]
5. Clear TR and TF for next time operation
ORG 00H P1.5
Again : SETB P1.5 ; Set the bit P1.5
ACALL DELAY ; call a delay fro subroutine to make the state exist 8051
for some time
CLR P1.5 ; Clear the bit P1.5 to 0

ACALL DELAY ; call a delay fro subroutine to make the state exist
for some time

SJMP Again ; Continue the signal

DELAY :
MOV TMOD , # 10 H ; 0 0 01 0 0 00 [ Ex: TIMER 1 IN MODE 1]
MOV TL1, # 00 H
MOV TH1, # 0EE H ; COUNT EE00 H FOR A DELAY OF 5 ms
SETB TR1 ; START TIMER 1
BACK : JNB TF1, BACK ; WAIT UNTIL COUNT COMPLETES
CLR TR1
CLR TF1
RET
END
 Serial Data Communication

• TxD: Port 3, pin 1

• Transmit data shifted out
• RxD: Port 3, pin 0
• Receive data shifted in
• Full duplex: both operate in parallel
• SBUF[8 – bit] – Serial Buffer is used for TxD and RxD operations
• We will use Mode 2 only
• asynchronous
• 10 bit transfer: 1 start, 8 data, 1 stop
• Look at documentation for other modes
• Clock for serial shift provided by timer 1
• i.e. programmable baud rate
• takes away a timer from other uses
Serial Port Control Register (SCON)
SM0 SM1 SM2 REN TB8 RB8 TI RI

Receive interrupt flag

Transmit interrupt flag
Received 9th bit
0 0 – Mode -0
0 1 –Mode-1 Transmitted 9th bit
1 0- Mode -2
1 1 –Mode -3 Receive Enable
Serial mode bit-2

NOTE: SCON in 8051 is mostly 0 1 0 1 0 0 0 0 = 50 H

 PCON REGISTER [ 8 BIT REG]

SMOD - - - GF1 GF0 PD IDL

SMOD PCON.7 Double baud rate bit. If SMOD=1,teh baud rate is doubled when the serial port is
used in mode1,2 and 3.
- PCON.6 Not implemented, reserved for future used*
- PCON.5 Not implemented, reserved for future used*
- PCON.4 Not implemented, reserved for future used*
GF0 PCON.3 General purpose bit.
GF1 PCON.2 General purpose bit.
PD PCON.1 Power Down bit. If set the oscillator is stopped. A reset or an interrupt(83C154 and
83C154D only) can cancel this mode(Note 1)
IDL PCON.0 IDLE bit. If set the CPU activity is stopped. A reset or an interrupt(83C154 can cancel
this mode(Note 1)

Note: For 8051 always SMOD is 0

 Serial Port Frequency is 32nd part of Timer Clock frequency

Timer frequency is the 12th part of the Operational Frequency of 8051 [ i.e 11.0592 MHz]

So Timer frequency is 11.0592 MHz / 12

= 921.6 KHz = 1.085 µsec

Serial Port Frequency = 921.6 KHz / 32 = 28800 Hz

Baud Rate = {Osc Freq / Timer Freq}/ Ser_Freq x 2 SMOD / TH 1 value

Example: Baud Rate = 9600, then TH1 = ?, Assuming always SMOD = 0

So 9600 = 28800 x 1/ TH1  TH1 = 28800 / 9600

THI = 3
Count to be loaded in THI = FF – 3 = FC H [ always used in mode 2 of timer 1]
 Serial Port Frequency is 32nd part of Timer Clock frequency

Timer frequency is the 12 th part of the Operational Frequency of 8051 [ i.e 11.0592 MHz]

So Timer frequency is 11.0592 MHz / 12

= 921.6 KHz = 1.085 µsec

Serial Port Frequency = 921.6 KHz / 32 = 28800 Hz

Baud Rate = {Osc Freq / Timer Freq}/ Ser_Freq x 2 SMOD / TH 1 value

Example: Baud Rate = 9600, then TH1 = ?, Assuming always SMOD = 0

So 9600 = 28800 x 1/ TH1  TH1 = 28800 / 9600

THI = 3
Count to be loaded in THI = FF – 3 = FC H [ always used in mode 2 of timer 1]
 Program to Transfer the word “ECE” at speed of 9600 baud rate
MOV TMOD, # 20 H; 0 0 10 0000 [ TIMER 1 IN MODE 2]

MOV SCON , # 50 H ; 01(MODE1) 0 1(REN) 0000 STEPS of SERIAL PORT Programming

MOV TH1, #0FC H ; for baud rate 9600, TH1 = 3
1. Select the timer [ 1 ] and its mode 2 by TMOD Reg
MOV A, # ‘E’
2. Set SCON reg in mode 1 as scon = 50 H
ACALL TRANS 3. Set the count in TH1 by loading the Timer Regs. [ by
MOV A, # ‘C’ calculating BAUD RATE]
ACALL TRANS 4. START the Timer1 [ SETB TR1]
MOV A,#’E’ 5. Wait until TI is Raised [ BACK : JNB TI, Back ]
ACALL TRANS 6. Clear TR and TI for next time operation
EXIT: SJMP EXIT

TRANS:
MOV SBUF,A ; Set data to go out from SBUF
SETB TR1 ; Start data transfer
Back: JNB TI, BACK ; wait for transfer complete
CLR TI
CLR TR1
RET
END
Conclusions:

1. Microcontrollers when compared with microprocessors share many synonymous names like ALU, Flags,
Timers, etc but differ in their arrangements and usage.
2. Intel 8051 is an early basic model which still, stands as an example to many new microcontrollers.
3. From its theoretical observations the major features stand as
Operational Frequency – 11.0592 MHz
Data width of 8 bit
Inbuilt Memories, Timers, Serial Ports , Interrupt Structures, I/O Ports.
4. It is the most beneficial and simple programmable controller for various types of Interfaces.