Ring Oscillator Metastable

based Digital Fingerprint circuit

Himanshu Kesarwani
MEC2018007
Under The Guidance Of Dr. M. Goswami
 Content
• Introduction
• Digital Fingerprint Circuit
• Conventional Ring Oscillator Based DFC
• Effect of Temperature Variation on Ring
Oscillator Frequency
• Proposed DFC
• Results
• Conclusion
• Future Work
• References
 Introduction
•With the increasing popularity of mobile electronic devices for
storage of secret information and conduct of secure transactions,
the difficulty is to improve hardware security.
•Currently the best practice to authenticate a device to protect
them with some cryptographic functions implemented on
hardware and store the secret key in non-volatile memory like
EEPROM or battery backed SRAM .
• Such scheme usually consumes large circuit area and has high
power dissipation.
•Digital Fingerprint Circuit (DFC) serves as an inexpensive
generator of cryptographic nonce and a digital fingerprint
analogous to human biometric for device authentication to avoid
the presence of a long-term key in vulnerable hardware.[1]
 DFC: Digital Fingerprint Circuit
•DFC is a ‘digital fingerprint’ that serves as unique identity for semiconductor
devices.

•Depends on the uniqueness of their physical microstructure , which depends on

process variation which is unpredictable.

•It is virtually impossible to duplicate or clone the structure.

Figure1. Basic Example of DFC.[4]

 Conventional Ring Oscillator Based
DFC
•RO PUF is one of the most popular PUFs due to its security, low
complexity, and ease of implementation and evaluation.

a.
b

Figure :2(a) :Conventional Ring Oscillator based DFC.[1]

b : Current Starved Inverter.[3]
 Effect of Temperature Variation on RO
Frequency
•For Regular Inverter Based RO:
• f = 1/ 2mtd where m is the number of inverter stages. As a first order estimation:

td = CoVdd /Id.
•The saturation current Id = μCox (W /2L) (VGS − Vt) ^α.
•The temperature coefficient of current [3]:
[3]

K varies from 1.2 to 2

σ varies from .5 to 3 mV/K

•For CS Inverter Based RO:

•By varying its bias, Vctrl or Vbn , the delay of CS inverter can be adjusted to counteract
the effect of temperature induced drain current variation.
Figure 3.a temp_vs_Freq graph for regular inverter RO. b) temp_vs_frq graph for different values of Vbn for
CS-inverter RO(simulated in cadence virtuoso).

•Frequency deviation dF/F(%) for regular inverter RO is 11.18323%.

•Frequency deviation dF/F(%) for CS inverter RO for Vbn=.711v is 1.324%.

[3]
 Proposed Metastable-RO based Digital
Fingerprint Circuit
•It consists of an 4-bit LFSR, a RO DFC core and a bidirectional counter. The
RO DFC core consists of 16 ROs. Each RO consists of an NAND gate and
eight inverters.

Figure 4: Proposed Architecture of DFC

Figure 5: Schematic of proposed design
 RESULTS

Figure 6: Simulation result of proposed DFC

Figure 7: Final response of the DFC
The randomness of DFC response is tested by NIST STS test. 10000 is generated
into 50 blocks and 200 bits for eaqch block .

TEST P-Value Proportion Result

Frequency 0.249284 99/100 Pass

Block Frequency 0.419021 100/100 Pass

Cumulative Sums 0.759756 99/100 Pass

Longest-Run 0.366918 99/100 Pass

FFT 0.003996 100/100 Pass

Serial 0.883171 100/100 Pass

Table 1: NIST Test Results

Figure 8: power consuption of proposed DFC
 Conclusion
•A low power Metastable-RO based-DFC has been
designed with significantly reduction in hardware.

•As it uses single mux ,single counter and no

comparators, the area and power is saved.
 FUTURE WORK
•This work consumes total power 730uW, so the
further reduction in power is needed.

•As the challenge is given by the LFSR and the

number of bits of LFSR is linearly dependent to the
number of Ring oscillator chain. So the challenge-
response pairs will be low in numbers. It needed
to be increased.
 REFERENCES
[1]. C. Herder, M. Yu, F. Koushanfar and S. Devadas, "Physical Unclonable Functions
and Applications: A Tutorial," in Proceedings of the IEEE, vol. 102, no. 8, pp. 1126-
1141, Aug. 2014.doi: 10.1109/JPROC.2014.2320516.

[2]. M. J. Azhar, F. Amsaad and S. Köse, "Duty-Cycle-Based Controlled Physical

Unclonable Function," in IEEE Transactions on Very Large Scale Integration (VLSI)
Systems, vol. 26, no. 9, pp. 1647-1658, Sept. 2018, doi: 10.1109/TVLSI.2018.2827238.

[3]. E. Socher, S. M. Beer, and Y. Nemirovsky, “Temperature sensitivity of SOI-CMOS

transistors for use in uncooled thermal sensing,” IEEE Trans. Electron Devices, vol. 52,
no. 12, pp. 2784–2790, Dec. 2005.

[4] Christian Wachsmann; Ahmad-Reza Sadeghi, "Physically Unclonable Functions

(PUFs): Applications, Models, and Future Directions," in Physically Unclonable
Functions (PUFs): Applications, Models, and Future Directions , Morgan & Claypool,
2014.