Open seminar on

IMPROVEMENT OF CERTAIN POWER QUALITY ISSUES OF TRANSMISSION

SYSTEMS WITH POWER FLOW CONTROLLERS

By
RAJAREDDY. DUVVURU
[Reg. No. 13PH0217]
Under the esteemed Guidance of

Supervisor Co-Supervisor
Dr. B.VENKATA PRASANTH Dr.V.Ganesh
Prof & Head Prof & Head
EEE Department EEE Department
QISCET, Ongole JNTUACEP, Pulivendula

Department of Electrical and Electronics Engineering

JNTUCEA , ANANTAPUR

October -29, 2018

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 Contents
1. Introduction
2. Problem Definition
3. Objectives
4. Organization of Thesis
5. Conclusions
6. References
7. Publications

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Introduction
 Now a days, power system network influences losses of
transmission system (apporx. 30%). These losses can be
reduced by series compensation with capacitor banks or
synchronous phase modifiers.
 Synchronous phase modifiers and capacitor banks are incapable
to supply maximum amount of power transfer to load.
 Now a days these losses can reduced by using custom power
devices like power electronic based Flexible AC Transmission
system (FACTS) control devices.

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  Flexible AC Transmission system is a static equipment and it is
a integrated concept based on power electronic switching
converters and dynamic controllers to enhance the system
utilization and power transfer capacity.
 FACTS devices are used to control the interrelated parameters
such as series impedance, shunt impedance, current, voltage
and phase angle which govern the operation of transmission
systems.

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 FACTS device controllers can be divided into four categories.
1. Series Controllers : series controllers are;
 It has variable impedance and has a function to inject the series voltage.

Thyristor Controlled Series Capacitors (TCSC), Static Synchronous Series

Compensator( SSSC), Distributed Static Series Compensator (DSSSC).

Figure 1: series controller

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 2. Shunt controllers : shunt controllers are ;
 It has variable impedance and has a function to inject the current into the
system.
Static Var Compensator (SVC), STATCOM

Figure 2: shunt controller

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 3.Combined series-series controller : Interline Power Flow Controller
(IPFC)

Figure 3: series - series controller

 It has separate but co-ordinated unified(common dc link)

controller and has a capability to compensate reactive power as
well as interline transfer active power.

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 4. Combined series-shunt controllers : Unified Power
Flow Controller (UPFC)

Figure 4: series - shunt controller

 It has capability to inject voltage & current and has
unified & co-ordinated real power exchange between
series & shunt converter.

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  Because of high control capability the Power Electronic based
combined Power Flow Controllers specifically UPFC is
suitable for transmission system of power system.
 The FACTS devices are installed at different locations for
different purposes, each of them is unique. As a result, each
FACTS device requires customer design and manufacturing,
which leads to a long building cycle and high cost, it requires a
large area for installation.

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Problem Definition

The UPFC has capability to control power flow but it has own
draw backs of this device are :
1. one of the reasons is high cost for the same ratings of
FACTS devices. This device requires a large number of
power electronic switches in series and parallel connection.

2. To provide voltage isolation, 3-phase high voltage

transformers are essential and series connected transformers
requires an higher rating to handle the fault voltages and
currents.
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 3. Possibility of faults may occurs in the UPFC are:
a) For a shunt converter, failure results in a disconnection of the
device from the grid which prevents it from providing reactive
compensation.
b) The series converter is directly inserted into transmission lines,
not only the device, but also the transmission lines will be
disconnected from the system during the failure.

 Due to these reasons UPFC cannot manage the all parameters,

so we are focused on advanced UPFC devices.

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 The UPFC is further developed into a new combined FACTS
devices such as Distributed Power Flow Controller (DPFC) and
Generalized Unified Power Flow Controller (GUPFC).
 These two controllers will provide better performance compared
to UPFC.
o DPFC and GUPFC can be used to improve the performance of

the system due to the separate controlling capability of real

power, reactive power, phase angle, voltage magnitude, grid
currents and oscillations .

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Objectives of work
Main objectives of work are :

1. (a) To Investigate the Power Quality issues in Transmission system

by using DPFC with Proportional Integral Derivative (PID) Controller.

(b) It is also analyze the performance of the DPFC during the failure

of a single series converter.

2. To Examine the capability of the DPFC to damp low frequency

power oscillations and voltages by using Power Oscillation Damping

(POD) controller.

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 3. (a) To Analyze the Power Quality issues in Transmission
system by providing a GUPFC-PID controller
(b) To Damp out low-frequency power oscillation by using
GUPFC with POD controller.
 These results are analyzed with DPFC and GUPFC and also
performance of these devices are validated with test systems.

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 Organization of the Thesis

My research work is divided in to three modules.

Module-I
(a) Analyze the power quality issues like voltage sag, current swell and Total
Harmonic Distortions during the fault condition without and with DPFC-PID
controller.
(b) It is also analyzes the active power, reactive power, currents and voltages in
transmission line during the failure of a single series converter by providing a
PID controller.
Module-II

(a) Investigates DPFC is used to damp out the low frequency power oscillations
like active and reactive power oscillations and voltages at generator side.

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 Module-III

(a) Investigate the power quality issues like voltage sag, current
swell and THD during the fault condition and after placing
GUPFC with PID controller.
(b) It is also Investigates low frequency power oscillations like
active power and reactive power and also analyze the
voltages during the fault condition and after placing GUPFC-
POD controller.

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 Module -I
IMPROVEMENT OF POWER QUALITY IN
TRANSMISSION SYSTEM USING DPFC
&
PERFORMANCE OF DPFC DURING FAILURE
OF SERIES CONVERTERS

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Distributed Power Flow Controller(DPFC)

 DPFC employs the Distributed FACTS(D-FACTS) concept.

 DPFC is derived from the UPFC, it behaves like as UPFC.

Figure 5: flow chart from UPFC to DPFC

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 Figure 6 : Schematic diagram of DPFC
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DPFC Operating Principle
The DPFC consists of a shunt and several series connected converters. Each
converter within the DPFC is independent and has its own dc capacitor to
provide the required dc voltage.

The shunt converter is similar as a STATCOM, while the series converter

employs the D-FACTS concept, which is to use multiple single-phase converters
instead of a large rated converter.

Two approaches are applied to the UPFC to increase the reliability and to
reduce the cost; they are as follows
(i) eliminating the common dc link of the UPFC and exchange of active
power,
(ii) distributing the series converters,
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 Exchange of active power

Figure 7 : block diagram of active power exchange in transmission line

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 DPFC with PID controller
The working of proposed system is sensing the receiving end

voltage and it compares with the reference voltage. Output of the

summer i.e. error signal is given to the PID controller block, and it
gives to DPFC controller.

Figure 8: block diagram of proposed system with PID controller

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 In this proposed work is tested 3-test cases.

1. Single machine connected to infinite bus system

2. Two bus system

3. Standard test system of 30-bus system.

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 Simulation Results


The DPFC is tested in a single machine connected to infinite
(SMIB) bus and 30-bus system.

It is proposed that three phase fault is injected in transmission
line of proposed system in order to measures the voltage sag,
current swell and THD values without DPFC and with DPFC.
Case 1 : Single machine connected to infinite bus
Case 2 : standard 30-bus system .

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Case 1: SMIB

Figure 9: single line diagram of SMIB

1. Voltage Sag

In the simulation model for time t = 0.07 sec the DPFC is connected to the
source. Up to t = 0.07 sec the three phase source is supplying the power to
the load. After at time of 0.07sec 3-ph fault is injected to system.

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 Vvoltage (pu)
Vvoltage (pu)

(a) (b)
Figure 10: Three-Phase load voltage sag without and with DPFC

 It is observed that above results during the fault the voltage sag is about
0.38 pu during the time period 0.07 sec to 0.11 sec as shown in above
figure 10(a).
 By placing a DPFC, the voltage sag is reduced effectively as shown in
above figure 10(b).
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 2. Current Swell
Current (pu)

Current (pu)
(a) Time (sec) (b)
Figure 11 : Three-Phase load current swell without DPFC with DPFC

 It is observed that above results during the fault the current levels are increased to 0.4 p.u
during the time period 0.07 sec to 0.11 sec as shown in above figure 11(a).
 By placing a DPFC, the current swell is decreased effectively as shown in above figure 11(b).

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3. Total Harmonic Distortion
 Load voltage harmonic analysis without and with DPFC through
FFT analysis is analyzed for test case 1.

Figure 12 : Total harmonic distortion of load voltage without and with DPFC

 From figure 12 it is observed that after placing DPFC the THD values
is reduced from 11.83% to 0.51%.
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 Table 1 : Summary of test results for voltage sag, swell and THD.

DPFC with PI controller by DPFC with PID controller

Parameters Without DPFC Ahmad et al. (Proposed)

Voltage sag 55% 12% 10 %

Current swell 20 % 12 % 10 %

THD 11.83 % 0.65 % 0.51 %

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 Case 2 : 30 bus system.

Figure 13 : 30-bus standard bus system

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 Figure 14 : 30-bus standard bus system with DPFC

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 1. Voltage Sag

In the simulation model for time t=0.07 sec the DPFC
is connected to the source. Up to t = 0.07 sec the three
phase source is supplying the power to the load. After
time of 0.07sec 3-ph fault is injected to system.

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 Vvoltage (pu)
Vvoltage (pu)

(a) (b)
Figure 15: Three-Phase load voltage sag without and with
DPFC

 It is observed that above results during the fault voltage sag about 0.4 p.u during
the time period 0.07 sec to 0.11 sec as shown in above figure 15(a).
 By placing a DPFC, the voltage sag is reduced effectively as shown in above
figure 15(b).
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 2. Current Swell
Current (pu)

Current (pu)
(a) Time (sec) (b)
Figure 16 : Three-Phase load current swell without DPFC with DPFC

 It is observed that above results during the fault the current swell is about 0.38 p.u during
the time period 0.07 sec to 0.11 sec as shown in above figure 16(a).
 By placing a DPFC, the current swell reduced effectively as shown in above figure 16(b).
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 3.Total Harmonic Distortion
 It is observed that the load voltage harmonic analysis without and with
DPFC by placing a DPFC the THD will be reduced from 11.83% to
0.44%.

Figure 17 : Total harmonic distortion of load voltage without and with DPFC
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 Table:2 power flow analysis for SMIB with PID Controller
S. no Bus from Bus to Power Flows with out Power Flows with DPFC
DPFC SMIB SMIB

P (MW) Q (MVAr) P (MW) Q (MVAr)

1 1 2 96 -120 124.0 -114.2

Table:3 power flow analysis for 30-bus system with PID Controller

S. no Bus from Bus to Power Flows without DPFC Power Flows with DPFC
(SMIB) (SMIB)

P (MW) Q (MVAr) P (MW) Q (MVAr)

1 1 2 96 -120 124.0 -114.2

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 2 1 3 0.00098 -0.000158 0.001375 -0.000846

3 2 4 9.70 -89.21 14.12 -121.7

4 3 4 9.70 -89.21 14.12 -121.7

5 4 6 9.70 -89.21 14.12 -121.7

6 5 7 1021 -969.20 1550 -1501

7 6 7 398 -1024 512.6 -1494

8 6 8 0.00089 -0.000102 0.001827 -3.6*10-3

9 8 28 1060 -1024 1560 -1510

10 9 10 1.96 -35.2 2.218 -74.37

11 9 11 1.96 -35.2 2.218 -74.37

12 11 9 1.96 -35.2 2.218 -74.37

13 12 13 292.2 -201.3 389.9 -375.2

14 12 14 89.21 -289.34 124.6 -404.0

15 14 15 1.96 -45.7 2.218 -74.37

16 15 18 1.96 -45.7 2.218 -74.37

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 17 16 17 1.96 -45.7 2.218 -74.37

18 17 10 1.96 -45.7 2.218 -74.37

19 18 19 1.96 -45.7 2.218 -74.37

20 19 20 1.96 -45.7 2.218 -74.37

21 20 10 1.96 -45.7 2.218 -74.37

22 21 22 201.2 -201.3 389.9 -375.2

23 22 10 89.21 -289.34 124.6 -404.0

24 22 24 159.3 -520.7 249.2 -808.1

25 24 25 201.5 -863.6 373.8 -1212

26 25 26 840.5 -920.3 1170 -1126

27 27 25 0.00104 -0.00024 0.001827 -0.000301

28 27 28 0.0040 -0.000254 0.0099 -0.000210

29 28 8 909.1 -1005 1198.5 -1316

30 29 30 0.00156 -0.00025 0.003655 -0.00092

31 30 27 0.00089 -0.00035 0.001827 -0.00241

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 Table 4 : Summary of test results for voltage sag , current swell and THD

Parameters Without DPFC with DPFC with

PID controller PID controller
DPFC (Proposed) (Proposed)
(SMIB) (30-bus
system

Voltage sag 55% 10 % 9%

Current swell 20 % 10 % 9%

THD 11.83 % 0.51 % 0.44 %

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  In case failure of series converter for DPFC. Because, the series
converter directly connected to the transmission line through
transformer.

Figure 18 : Location of the supplementary control for the series converter

failure
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 a. Two types of failures can happen in the DPFC series
converters: short circuit and open circuit. The short circuit for
the series converters is not a problem, because it will not
interrupt the transmission line.

b. However, when the series converters have an open circuit, the

transmission line will be also open circuit thereby influencing
the whole network. To prevent the open circuit of the series
converters, a bypass circuit is provided for each series
converter.

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  Series converter voltage is given by;

where k is the number of failed converter in phase a. By using

sequence analysis, this unbalanced series voltage can be
represented by;

Ex: No. of series converters n =3

Failure converter k= 1

Fault occurs in phase a is Vse,a = (n - k)/n =0.0667

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2-bus system:
 Here analyze the two-bus system with DPFC converter , by considering

two busses as a constant voltage source.

Figure 19: 2-bus system with DPFC

 Each series converter generated 0.0667 p.u voltage at the fundamental

frequency.
o One of the series converters is created with short circuit during the

duration 0.02 second to 0.08 seconds to analyse the effect of DPFC.

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 (a) (b)

Figure 20 : Series converter voltages at bus1 and bus2 during fault and after fault


It is observed that during the fault shown in figure 20(a), voltage magnitude will be reduces

certain value upto 0.08 sec.


By placing a DPFC, voltage magnitude is compensated during this time, the voltage

magnitude is increases by 0.2 p.u for the duration of 0.02sec to 0.08 sec as shown in figure

20(b).

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 (a) (b)
Figure 20(A): (a) Three phase currents with DPFC at bus1 and bus2 after fault
(b) Three phase voltage & current with DPFC at receiving end after fault

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 P(pu)
Q(pu)

Q(pu)
P(pu)

(a) (b)
Figure 21 : Active & Reactive power during serious converter failure and after fault

o It is observed that above results during the fault, active and reactive power are

oscillates for more time duration as shown in figure 21(a).

o By placing a DPFC these oscillations is reduced with in short duration

as shown in figure JNTUA

09/25/2020 21(b). 46
 Table 5 : Summary of test results for active power and reactive
power

Parameters Without DPFC DPFC with PI DPFC with

controller by PID controller
Yuan et al. (Proposed)
Active 20 % 12% 10 %
power
Reactive 20 % 12 % 8%
power

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 Module- II
MODELLING OF DISTRIBUTED POWER FLOW
CONTROLLER (DPFC) FOR DAMPING OF POWER
OSCILLATION

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  In this module, low frequency power oscillations cause severe
problems on generator side, due to suddenly fault occurs in
transmission line and harmonic currents enters into generator
winding , it will oscillate the generator continuously.
 These type of oscillations can be reduced by providing a Power
Oscillation Damping (POD) controller.

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 Design of POD controller

 In order to damp oscillations, POD controllers should be attached

to DPFC control. The structure of a POD controller is as shown
in figure 22 below and it is similar to PSS controllers.

Figure 22 : Block diagram of POD controller

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  It involves an amplification block, a wash-out block and two
lead-lag blocks.
 The washout block is proposed to eliminate the DC component
of a POD controller input signal and has a large time constant,
usually from 5 sec to 10 sec, since the oscillation is low
frequency (less than 2 Hz normally) to compensate the
difference between the oscillation input signal and DPFC
output variables.
 The lead-lag blocks provides phase shifting characteristic.

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 Figure 23: Location of the POD controller in the DPFC

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Simulation Results
i. In this case analyzed two bus system, two busses are consider as a
generator buses.

Figure 26: single line diagram of two-bus system

ii. In simulation, the proposed that three phase fault is injected in transmission
line of proposed system in order to analyze the active power and reactive
power oscillations, bus voltages without and with DPFC-POD controller.

iii. In the simulation model for time t = 0.02 sec the DPFC is connected to the
source. Up to t = 0.02 sec the three phase source is supplying the power to
the load.

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 (a) (b)
Figure 27: Active Power without and with DPFC-POD

 It is observed that above results during the fault, active powers is oscillates for

more time duration as shown in figure 27(a).

 By placing a DPFC these oscillations is reduced with in short duration as shown

in figure 27(b). These oscillations are settled from time t=0.02 sec onwards.
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 Figure 28 : Reactive Power without and with DPFC-POD

 It is observed that above results during the fault, reactive powers is

oscillates for more time duration as shown in figure 28(a).

 By placing a DPFC these oscillations is reduced with in short

duration as shown in figure 28(b). These oscillations are settled

from time t=0.02 sec onwards.
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 (a) (b)
Figure 29 : Bus voltages without and with DPFC-POD

 It is observed that the analyzed results during the fault, at the time of starting oscillations it

faces disturbance voltages at sending end and receiving end as shown in figure 29(a).

After placing DPFC with POD at the time of starting no disturbance in starting point of

oscillations at sending end and receiving end as shown in figure 29(b).

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Cont..
 Here observed that the magnitude of the voltages at sending
end and receiving end voltages are 507V and 516V without
DPFC, after placing a DPFC the voltage magnitudes are
increased to 660V and 680V respectively as shown in figure
29(a)&(b), therefore the system performance is improved in
transmission line.

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Module -III
MODELLING AND ANALYSIS OF GENERALIZED
UNIFIED POWER FLOW CONTROLLER & POWER
QUALITY IMPROVEMENT IN TRANSMISSION
SYSTEM

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Generalized Unified Power Flow Controller
GUPFC consists of two series and a single shunt converter, so that
GUPFC is treated as a three converter controller.
A common dc link is used to connect both the converters, the real
and reactive power is exchanged among the converters through
this link.
 GUPFC is used to monitor five power system parameters such as
real and reactive powers, bus voltages, current and impedance at
both ends and provides reactive power compensation.

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 Figure 33 : Schematic diagram of GUPFC
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  The topics discussed in this module as

1. Mitigate the power quality problems by using GUPFC.

2. Reduced the low frequency oscillations by using POD controller.
 The above both objectives analyzed by providing a PID and POD
controllers.
 By providing a PID controller analyzed the power quality
problems like voltage sag, current swell and THD calculations.
In this proposed work is tested with two test cases.
1. Single machine connected to infinite bus system.

2. Standard test system of 30-bus system.

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 Simulation Results

The GUPFC is tested in a single machine connected to infinite (SMIB) bus and 30-
bus system.

It is proposed that three phase fault is injected in transmission line of proposed
system in order to measures the voltage sag, current swell and THD values without
GUPFC and with GUPFC.
Case 1 : Single machine connected to infinite bus

Case 2 : standard 30-bus system

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 Case 1 : SMIB

Figure 34: single line diagram of SMIB with GUPFC

1. Voltage Sag
 In the simulation model for time t = 0.07 sec the GUPFC is connected
to the source. Up to t = 0.07 sec the three phase source is supplying the
power to the load. After time of 0.07sec 3-ph fault is injected to system.

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 Vvoltage (pu)
Vvoltage (pu)

(a) (b)
Figure 35: Three-Phase load voltage sag without and with GUPFC

 It is observed that above results during the fault the voltage levels are
decreased to 0.38 p.u during the time period 0.07 sec to 0.11 sec as
shown in above figure 35(a).
 By placing a GUPFC, the voltage sag is reduced effectively as shown

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in above figure 35(b).JNTUA 64
 2. Current Swell
Current (pu)

Current (pu)
(a) Time (sec) (b)
Figure 36 : Three-Phase load current swell without and with GUPFC

 It is observed that above results during the fault the current levels are increased to 0.18 p.u
during the time period 0.07 sec to 0.11 sec as shown in above figure 36(a).
 By placing a GUPFC, the current swell is reduced effectively as shown in above figure 36(b).

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 3. Total Harmonic Distortion
 Load voltage harmonic analysis without and with GUPFC
through FFT analysis is analyzed for test case 1.

Figure 37: Total harmonic distortion of load voltage without GUPFC

 From figure 37 it is observed that after placing GUPFC the

THD values is reduced from 11.83% to 0.30%.
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 Table 7: Comparison of summary of test results for voltage sag , current swell
and THD with DPFC and GUPFC

Parameters Without device DPFC wit PID GUPFC with PID

Voltage sag 55% 10% 8%

Current swell 20 % 10 % 8%

THD 11.83 % 0.51 % 0.30 %

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Case 2 : 30 -bus system

Figure 38 : 30 bus standard bus system

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 Figure 39 : 30 bus standard bus system with GUPFC

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1. Voltage Sag
 In the simulation model for time t = 0.07 sec the GUPFC is connected to
the source. Up to t = 0.07 sec the three phase source is supplying the
power to the load. After time of 0.07sec 3-ph fault is injected to system.

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Vvoltage (pu)

Vvoltage (pu)
(a) (b)
Figure 40: Three-Phase load voltage sag without and with GUPFC

 It is observed that above results during the fault the voltage levels are decreased to
0.42 p.u during the time period 0.07 sec to 0.11 sec as shown in above figure 40(a).
 By placing a GUPFC, the voltage sag is reduced effectively as shown in above
figure 40(b).

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 2. Current Swell
Current (pu)

Current (pu)
(a) Time (sec) (b)
Figure 41: Three-Phase load current swell without and with GUPFC

 It is observed that above results during the fault current swell about 0.18 p.u during the
time period 0.07 sec to 0.11 sec as shown in above figure 41(a).
 By placing a GUPFC, the current swell is decreased as shown in above figure 41(b).
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 3.Total Harmonic Distortion
 It is observed that the load voltage harmonic analysis without and with
GUPFC by placing a DPFC the THD will be reduced from 11.83% to
0.22%.

Figure 42 : Total harmonic distortion of load voltage without and with GUPFC
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 Table:8 power flow analysis for SMIB with PID Controller
S. no Bus from Bus to Active power with out Power Flows with GUPFC
GUPFC( SMIB) (SMIB)

P (MW) Q (MVAr) P (MW) Q (MVAr)

1 1 2 96 -120 132.0 -123.0

Table:9 power flow analysis for GUPFC with PID Controller

S. no Bus from Bus to Power Flows without Power Flows with GUPFC
GUPFC (30-bus) (30-bus)

P (MW) Q (MVAr) P (MW) Q (MVAr)

1 1 2 29.50 39.99 -35.65 -57.84

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 2 1 3 0.00098 -0.000158 0.001983 -0.00098

3 2 4 9.70 -89.21 16.5 -160.5

4 3 4 9.70 -89.21 16.5 -160.5

5 4 6 9.70 -89.21 16.5 -160.5

6 5 7 1021 -969.20 1560 -1499

7 6 7 398 -1024 571 -1366

8 6 8 0.00089 -0.000102 0.002083 -0.000397

9 8 28 1060 -1024 1567 -1513

10 9 10 1.96 -35.2 3.71 -71.44

11 9 11 1.96 -35.2 3.71 -71.44

12 11 9 1.96 -35.2 3.71 -71.44

13 12 13 292.2 -201.3 399.7 -373.4

14 12 14 89.21 -289.34 139.2 -389

15 14 15 1.96 -45.7 3.71 -89.02

16 15 18 1.96 -45.7 3.71 -71.44

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 17 16 17 1.96 -45.7 3.71 -71.44

18 17 10 1.96 -45.7 3.71 -71.44

19 18 19 1.96 -45.7 3.71 -71.44

20 19 20 1.96 -45.7 3.71 -71.44

21 20 10 1.96 -45.7 3.71 -71.44

22 21 22 201.2 -201.3 399.7 -373.4

23 22 10 89.21 -289.34 139.2 -389

24 22 24 159.3 -520.7 310.4 -637.9

25 24 25 201.5 -863.6 397.8 -493.9

26 25 26 840.5 -920.3 1175 -1120

27 27 25 0.00104 -0.00024 0.001963 -0.000329

28 27 28 0.0040 -0.000254 0.00126 -0.00105

29 28 8 909.1 -1005 1210.8 -1206.66

30 29 30 0.00156 -0.00025 0.004052 -0.000859

31 30 27 0.00089 -0.00035 0.00198 -0.003297

09/25/2020 JNTUA 76
 a. GUPFC-POD controller eliminated the low frequency
oscillations by controlling the real and reactive power flow in
the transmission line. Hence it offers better performance
characteristics.

b. In simulation, the proposed that three phase fault is injected

in transmission line of proposed system in order to analyze
the active power and reactive power oscillations , bus
voltages without and with GUPFC-POD controller.

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 c. In this case, here analyzing two bus system, two buses are consider as a
generator buses.

Figure 43: single line diagram of two-bus system

d. In the simulation model for time t = 0.02 sec the GUPFC-POD is

connected to the source. Up to t = 0.02 sec the three phase source is
supplying the power to the load. After t=0.02sec 3-ph fault is
injected to system.

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 (a)

(b)
Figure 44: Active power without and with GUPFC-POD
09/25/2020 JNTUA 79
  It is observed that above results during the fault, active powers

is oscillates for more time duration as shown in above figure

44(a).

 By placing a GUPFC-POD these oscillations is settled faster

and provided superior damping as shown in above figure

44(b).

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 Figure 45: Reactive power without and with GUPFC-POD
09/25/2020 JNTUA 81
  It is observed that above results during the fault, active powers

is oscillates for more time duration as shown in above figure

45(a).

 By placing a GUPFC-POD these oscillations is settled faster

and provided superior damping as shown in above figure

45(b).

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Conclusions
My research work concluded as :

DPFC is used to control the Power Quality Problems in

Transmission system. When 3-phase fault is injected in

transmission line to measure the voltage sag, current swell and
THD are analyzed by placing of DPFC with PID controller
and without DPFC in transmission line. It is observed that
voltage sag is reduced from 55% to 10% for the proposed 2-bus
system without and with DPFC device connected. Similarly
current swell and THD reduced to 10 % and 0.51 %
respectively.
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  It is observed that voltage is increased by 0.2 pu by placing the
DPFC during the failure of series converter. The transmission
system voltage is maintained under standard values even
though during the failure of series converter.
 Power Oscillations Damping Controller is used to damp-out
the low frequency oscillations in active power, reactive power
and voltage for test system with DPFC-POD.

09/25/2020 JNTUA 84
  GUPFC is used to control the Power Quality Problems in Transmission
system. It is proposed that three phase fault is injected in transmission line
of proposed system in order to measures voltage sag, current swell and
THD values without GUPFC and with GUPFC. It is observed that voltage
sag is reduced from 55% to 8 % for the proposed system without and with
GUPFC device connected. Similarly current swell and THD reduced to 8 %
0.30 % respectively.
 It is observed that during fault active power and reactive power oscillations
settled it takes more time. By placing a GUPFC-POD these oscillations are
reduced fastly.

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 Future Scope
In future, this work can be extended easily by implementing

advanced methods like Hybrid Power Flow Controller (HPFC)

and Optimal Unified Power Flow Controller (OUPFC) in
transmission system.
Based on the study carried out, a basic platform is available to

investigate various issues in the future, few of techniques are

used to improve the performance of the system, which are given
below.
09/25/2020 JNTUA 86
Cont..
 Various optimization techniques like ANN, Sliding Mode Controller
(SMC) and grey-wolf optimization can be adopted for the optimal
location and optimal setting of FACTS devices for power quality
improvement and their effectiveness can be compared.
 Multi-bus system with multiple FACTS controllers may be studied
to observe the power quality improvement.
 This work has covered power quality in 30-bus system using DPFC
and GUPFC. The work may be extended to higher bus system.

09/25/2020 JNTUA 87
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 Published papers in support of work
 
International/National Journals
1. RajaReddy. Duvvuru, B.VenkataPrasanth, V.Ganesh “A Novel Approach for Improvement
of Power Quality in Transmission System by Using Distributed Power- Flow Controller”
International Journal of Engineering Research in Electrical and Electronic Engineering
(IJEREEE) Vol 3, Issue 3, March 2016.
2. RajaReddy. Duvvuru, B.VenkataPrasanth,V.Ganesh “A Novel Approach for Reducing the
Power Oscillations in Transmission System by using Distributed Power Flow
Controller(DPFC)”IJCTA,9(14) 2016, International Science Press,pp:6721-6730.
(Scopus)
3. 5. RajaReddy.Duvvuru, B.VenkataPrasanth, V.Ganesh “Performance of Generalized
Unified Power Flow Controller (GUPFC) in Transmission System” accepted for
International Journal of Renewable Energy Technology, INDERSCINCE publications
waiting for publishing. (Scopus)

09/25/2020 JNTUA 95
 International Conference
 RajaReddy.Duvvuru, B.VenkataPrasanth, V.Ganesh “Improvement of the
Distributed Power Flow Controller (DPFC) performance in Transmission Lines
during failure of Series Converter” Special issue in ELSEVIER Energy
Procedia to be Published, Science Direct on September -2016. (Scopus)

09/25/2020 JNTUA 96
Related Journals
1. RajaReddy.Duvvuru, B.VenkataPrasanth, V.Ganesh “Modeling and Analysis of
Distributed Power Flow Controller Damping of Power System Oscillations in
Transmission System” Journal on Circuits and Systems Engineering, i-manager’s
publications, vol.5,no.1,December-16 to February-17,pp: 30-35. (Scopus)
2. RajaReddy.Duvvuru, B.VenkataPrasanth, V.Ganesh “Modelling of the
Generalized Unified Power Flow Controller (GUPFC) with 48-Pulse Gate Turn-
off Based Voltage Source Converter” accepted in Lecturer notes in Electrical
Engineering, SPRINGER SERIES to be Published on october -2017. (Scopus)
3. RajaReddy. Duvvuru, B. VenkataPrasanth, V. Ganesh, “Active and Reactive
Power Control of Distributed Power-Flow Controller (DPFC) with Fuzzy
Logic Controllers” Submitted to Taylor & Francis, Under review process-
Submitted on July-2018.(SCI)

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 CORRECTIONS ARE MADE AS PER THE RECOMMENDATIONS OF
THE EXTERNAL EXAMINER –1
S.No Review Comments and Queries Old Answers/Clarifications New
report report
page page
no. no.
1. The literature survey needs to be 9-15 The referred papers have been studied & 9-18
exhaustive. The chapter 2 extended the information in Literature
presents briefly. Survey.
2. The equation 3.1 in page 17 is to 17 The equation 3.1 is corrected in page 20
be corrected. no.20, and modified thesis as

3. Page 19, figure 3.3: add source
information or reference informat
ion from where it has been
adopted.
19 This information is adopted from text 22
book “FACTS Controllers in Power 
Transmission and Distribution” by K.R.
Padiyar, New age International Publishers as
kept in reference [72].

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 4. Page 22, section 3.4.2, 4th line: 22 Typographical mistake has been corrected 25
“theta­_se” symbol missing. and the symbol is inserted in page 25,
section 3.4.2, and 4th line.
5. Page 28, equation 3.25: explain 28 Explanation added on “why mutual 31
why mutual impedance is ignored impedance is ignored for the transmission
for the transmission line? line?” in page no.31 last Paragraph.
6. Figures 3.9, 3.18, 4.6 are not 28, As per the suggestion of the examiner the 31, 39
clear. Please re-draw. 36 figures of 3.9, 3.18 and 4.6 have been and 51
and redrawn clearly.
46
7. Modeling of GUPFC is not 36-37 More explanation has clearly given with 39-42
clearly explained. Needs more necessary information related to modeling of
explanations. GUPFC in page no’s 39 to 42.
8. Page 51: there is no information 51 This information is added in page no. 56 of 56
has been provided in the thesis first Para about how the voltage sag is
about how the voltage sag has created and location of the fault is drawn in
been created? In addition, at what fig 4.11.
location the disturbance has been
created on the system shown in
Fig.4.11.

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 9. With reference to Figures 4.12
and 4.13, why the current before
current swell is not maintained
with and without DPFC-PID?
10. Page 52, the last paragraph
concluding that by placing DPFC,
the current swell has been
effectively mitigated. But there is
no information on what basis this
conclusion has been made?
11. Page 54, for 30-system, how the
buses 8 and 28 are chosen as best
location? What is the criterion
chosen for best location?
12. For the case of DPFC-PID, how
the PID controller parameters
have been chosen?
13. Figure 4.19: without and with
DPFC-PID, why the current
values are not matching during
normal operation (before current
swell)?.
09/25/2020 JNTUA
52 The results are updated in Figure 4.13 (a) & 57
(b) as per the question in page no. 57.
52 The detailed explanation is included 57
regarding mitigation of current swell in page
no.57.
54 The detailed explanation regarding placing 59
of DPFC for buses 8 and 28 are the best
locations for 30 bus systems is explained in
case : 2 of page no. 59.
49 The PID parameters have been chosen based 54
on the Zeigler- Nichols method. The detailed
explanation is given in page no. 54.
57 The results are updated in Figure 4.19 as per 62
the question in page no. 62.
100
14. Table 4.2, sl.no.2, why the power
flow from bus-1 to bus-3 is very
less.
15. Table 4.2, there is no flow
information between the buses 2
and 4.
16. In table 4.2 and In table 6.2, why
there is a lot of difference between
flow the buses 25 to 26 is
different from buses 26 to 25.
Looks to be the power flow
results are not correct.
17. Figure 4.24, why the two buses 1
and 2 are not having the same
phase sequence voltages? One is
RGB and another one is RBG.
Looks to be wrong results.
18. Figure 4.26 caption mentions bus-
3. However, the system does not
have a 3rd bus.
09/25/2020 JNTUA
59 For 30-bus system network, the impedance 64
of the line between bus1 & bus3 is high.
Hence power flow between bus1 and bus3
are less.
59 The detailed flow information is added in 64
table 4.2 in page no.64 regarding power flow
between bus 2 and 4.
59 & The information regarding power flow from 64 &
88 bus 25 to 26 and 26 to 25 is to be same. 93
Here bus 26 to 25 was typed mistake instead
of bus 27 to 25. This has been rectified in
table 4.2 and 6.2.
61 The results were correct, but different colors 66
were selected to show results and missed the
uniformity. It is corrected and redrawn in
figure no.4.24 in page no. 66.
62 If the network is 2-bus system, figure 4.26 67
results considered as voltage and current at
receiving end side, it is typographical
mistake and it is rectified and is shown in
page no. 67.
101
19. Figure 5.10: why the phase 73 The results were correct, but different 78
sequence the sending end and the colours were selected to show results and
receiving end voltages are not the missed the uniformity. It is corrected and
same? With the addition of DPFC- redrawn in figure no.5.10 in page no. 78.
POD, why the phase sequence is
changing?.
20 Observations based on the Figure 73 The detailed explanation has been added 78 &
5.10 does not carry any novelty. about figure no. 5.10 in last Para page no. 78 79
& 79.
21. Figure 6.7: without and with 81 The results are updated in Figure 6.7 as per 86
GUPFC-PID, why the current the question in page no. 86.
values are not matching during
normal operation (before current
swell)?.
22. Figure 6.13: without and with 86 The results are updated in Figure 6.13 as per 91
GUPFC-PID, why the current the question in page no. 91.
values are not matching during
normal operation (before current
swell)?.

23. Figure 6.17,the y-axis values are 90 The Y axis is renamed as in MW in fig 6.17 95
in MW, not W.

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 24. Figure 6.18,the y-axis values are 91 The Y axis is renamed as in MVAr in fig 96
in MVAr, not VAr. 6.18

25. Page 94, the scope for future 94 The scope of future work is rewritten and 99 &
work is very brief. presented in page.no.99 & 100. 100

26. The format for reference [71] 102 The reference no.71 is corrected and 108
needs to be uniform. maintained uniformly.

27 In appendix A and B, why the
transmission line parameters are
mentioned in p.u/km?.
103 Typographical mistake has been corrected in 109 &
& appendix A and B transmission line 110
104 parameters are mentioned in Ohm/Km,
Henry/Km and Farad/Km (R,L and C) in
page no. 109 & 110.

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 THANK YOU

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