VIRTUAL MEMORY ADDRESS TRANSLATION

IN A SYSTEM WITH VIRTUAL MEMORY THE MAIN MEMORY CAN BE VIEWED AS A CACHE FOR THE
DISK, WHICH SERVES AS THE LOWER-LEVEL STORE. DUE TO THE ENORMOUS DIFFERENCE BETWEEN
MEMORY ACCESS TIMES AND DISK ACCESS TIMES, A FULLY-ASSOCIATIVE CACHING SCHEME IS USED.
THAT IS, THE ENTIRE MAIN MEMORY IS A SINGLE SET - ANY PAGE CAN BE PLACED ANYWHERE IN
MAIN MEMORY. THIS MAKES THE SET FIELD OF THE ADDRESS VANISH. ALL THAT REMAINS IS A TAG
AND AN OFFSET.
THE OFFSET FIELD IDENTIFIES A PARTICULAR LOCATION WITHIN PAGE OR FRAME.

THE TAG FIELD IDENTIFIES A PAGE IN THE LOGICAL ADDRESS SPACE.

SINCE THE TAG FIELD JUST IDENTIFIES A PAGE IT IS USUALLY CALLED THE PAGE NUMBER FIELD.
 THE ADDRESS JUST DECOMPOSES INTO AN OFFSET FIELD AND A PAGE NUMBER FIELD. THE NUMBER
OF BITS IN THE OFFSET FIELD IS DETERMINED BY THE PAGE SIZE. THE REMAINING BITS ARE THE
PAGE NUMBER.
ADDRESS TRANSLATION WITH PAGE TABLES

• Each page table entry contains information about a single

page. Part of this information is a frame number (green) —
where the page is located in physical memory. In addition
there are control bits (blue) for controlling the translation
process. Address translation concatenates the frame number
with the offset part of a logical address to form a physical
address.
• A page table base register (PTBR) holds the base address for
the page table of the current process. It is a processor register
that is managed by the operating system.