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PT2001

APPLICATION
RECOMMENDATION

CONFIDENTIAL AND PROPRIETARY


Summary
• Vboost components selection
• Recirculation path components selection
• ESD recommendation
• Layout recommendation

2 CONFIDENTIAL AND PROPRIETARY


Vboost component selection
• Boost tank capacitors ESR at cold
temperature need to be taken in account
to avoid spikes on Vboost pin during
recirculation

• Maximum voltage spikes included on


Vboost pin is 80V (at all temperature).

• Example: Chemi con GPD/GVD series


High ripple and low ESR at cold temp.
If Vboost = 65V Max ESR recommended
0.3Ohms.

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Recirculation path components selection
ECU ECU • Recirculation diode needs to be ultrafast
PT2000
PT2001 VBOOST PT2000
PT2001 VBOOST
OFF OFF
diode to avoid any spikes either negative
High Side
Driver
VBAT High Side
Driver
VBAT on the S_HSx pin or positive and higher
High Side
OFF

High Side
OFF
than max ratings on D_LSx pin.
Driver Driver
Injector

Injector
Low Side
Driver
OFF
Low Side
Driver
ON
• Example: NXP BYQ28ED-200

Current Current
Feedback Feedback

− Max trr recommended 30ns

4 CONFIDENTIAL AND PROPRIETARY


ESD recommendation
• For ESD protection, all S_HSx pin that
are going outside the module should be
protected with a 4.7nF capacitor.

5 CONFIDENTIAL AND PROPRIETARY


Layout recommendation: Sense resistance
• Sense resistors layout must be considered with special care, to sense the voltage as close as
possible to the resistor terminations.
• Balanced series resistance, induced by the layout, between the sense resistor positive
termination to the VSENSEPx and the sense resistor negative termination to the VSENSENx
pin is recommended. The balance can be achieved by implementing similar line lengths.

Sense
resistance

Filtering
capacitor
(100pF)

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Layout recommendation: GND connections
• All the ground pins of the PT2001 should be connected to the same ground
voltage. Even during transient conditions, the voltage difference between PGND,
DGND and AGND must be limited to ±0.3V. The layout of the ground connection of
the ECU should be carefully design, in order to limit as much as possible the
ground noise, that is generated for instance during fast switching of the external
power MOSFETs

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Layout recommendation: Capacitor positions
• VCC5, VCCIO, VCC1P5 capacitance has to be place as close as
possible to device and between their respective GND

Pin Corresponding GND

VCC5 AGND
VCCIO DGND
VCC1P5 DGND
VCCP PGND
VBATT PGND
VBOOST PGND or AGND

VCC5 AGND

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Layout recommendation: Power line recommendation
• To avoid noise coupling between the power lines and the PT2001 and to sustain the current it is
recommended to use planes for Vbat and Vboost, distributing each MOSFET. Sense wire with
decoupling capacitor close to the device need to be use to monitor Vboost voltage on the PT2001.

9 CONFIDENTIAL AND PROPRIETARY

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