Professional Documents
Culture Documents
Hardware/Software Introduction
1
Outline
lens
• Common metrics
– Unit cost: the monetary cost of manufacturing each copy of the system,
excluding NRE cost
– NRE cost (Non-Recurring Engineering cost): The one-time
monetary cost of designing the system
– Size: the physical space required by the system
– Performance: the execution time or throughput of the system
– Power: the amount of power consumed by the system
– Flexibility: the ability to change the functionality of the system without
incurring heavy NRE cost
delayed entry
On-time triangle, representing market
Market rise Market fall penetration
Delayed – Triangle area equals revenue
• Loss
D W 2W – The difference between the on-
On-time Delayed Time time and delayed triangle areas
entry entry
On-time
delayed entry
• Percentage revenue loss =
Market rise Market fall (D(3W-D)/2W2)*100%
Delayed • Try some examples
– Lifetime 2W=52 wks, delay D=4 wks
D W 2W
– (4*(3*26 –4)/2*26^2) = 22%
On-time Delayed Time – Lifetime 2W=52 wks, delay D=10 wks
entry entry – (10*(3*26 –10)/2*26^2) = 50%
– Delays are costly!
• Costs:
– Unit cost: the monetary cost of manufacturing each copy of the system,
excluding NRE cost
– NRE cost (Non-Recurring Engineering cost): The one-time monetary cost of
designing the system
– total cost = NRE cost + unit cost * # of units
– per-product cost = total cost / # of units
= (NRE cost / # of units) + unit cost
• Example
– NRE=$2000, unit=$100
– For 10 units
– total cost = $2000 + 10*$100 = $3000
– per-product cost = $2000/10 + $100 = $300
p e r p ro d uc t c o st
$120,000 $120
$80,000 $80
$40,000 $40
$0 $0
0 800 1600 2400 0 800 1600 2400
Num b e r o f units (vo lu m e ) Num b e r o f units (vo lu m e )
• Technology
– A manner of accomplishing a task, especially using
technical processes, methods, or knowledge
• Three key technologies for embedded systems
– Processor technology
– IC technology
– Design technology
total = 0 total = 0
for i =1 to … for i =1 to …
General-purpose (“software”) Application-specific Single-purpose (“hardware”)
total = 0
for i = 1 to N loop
total += M[i]
end loop
Desired
functionality
general ALU
• User benefits Program
memory
Data
memory
– Low time-to-market and NRE costs
Assembly code
– High flexibility for:
• Benefits
– Fast
– Low power
– Small size
• Benefits total = 0
for i =1 to …
– Some flexibility, good performance, size and
power
Embedded Systems Design: A Unified 23
Hardware/Software Introduction, (c) 2000 Vahid/Givargis
IC technology
gate
IC package IC oxide
source channel drain
Silicon substrate
10,000
1,000
1983
1985
1987
1989
1991
1993
1995
1997
1999
2001
2003
2005
2007
2009
Embedded Systems Design: A Unified 29
Hardware/Software Introduction, (c) 2000 Vahid/Givargis
Moore’s law
• Wow
– This growth rate is hard to imagine, most people
underestimate
– How many ancestors do you have from 20 generations ago
• i.e., roughly how many people alive in the 1500’s did it take to make
you?
• 220 = more than 1 million people
– (This underestimation is the key to pyramid schemes!)
10,000 150,000,000
transistors transistors
To final implementation
10,000
Productivity
100
10
0.1
0.01
2005
1993
2001
2003
1983
1987
1985
1991
1989
1981
1999
1997
1995
2007
2009
• Exponential increase over the past few decades
• Hardware/software
Implementation
“codesign” Microprocessor plus
program bits: “software”
VLSI, ASIC, or PLD
implementation: “hardware”
The choice of hardware versus software for a particular function is simply a tradeoff among various
design metrics, like performance, power, size, NRE cost, and especially flexibility; there is no
fundamental difference between what hardware or software can implement.
General- Single-
purpose ASIP purpose
General, processor processor Customized,
providing improved: providing improved:
1983
1985
1987
1989
1991
1993
1995
1997
1999
2001
2003
2005
2007
2009
Embedded Systems Design: A Unified 36
Hardware/Software Introduction, (c) 2000 Vahid/Givargis
Design productivity gap
• 1981 leading edge chip required 100 designer months
– 10,000 transistors / 100 transistors/month
• 2002 leading edge chip requires 30,000 designer months
– 150,000,000 / 5000 transistors/month
• Designer cost increase from $1M to $300M
10,000 100,000
1,000 10,000
Logic transistors 100 1000
10 Gap 100 Productivity
per chip IC capacity
(in millions) 1 10 (K) Trans./Staff-Mo.
0.1 1
productivity
0.01 0.1
0.001 0.01
1981
1983
1985
1987
1989
1991
1993
1995
1997
1999
2001
2003
2005
2007
2009
Embedded Systems Design: A Unified 37
Hardware/Software Introduction, (c) 2000 Vahid/Givargis
The mythical man-month
• The situation is even worse than the productivity gap indicates
• In theory, adding designers to team reduces project completion time
• In reality, productivity per designer decreases due to complexities of team management
and communication
• In the software community, known as “the mythical man-month” (Brooks 1975)
• At some point, can actually lengthen project completion time! (“Too many cooks”)
Team
• 60000 15
1M transistors, 1 16 16
50000 19 18
designer=5000 trans/month
40000 23
• Each additional designer 24
30000
reduces for 100 trans/month Months until completion
20000 43
• So 2 designers produce 4900 Individual
10000
trans/month each
0 10 20 30 40
Number of designers