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Engr. S. A.

AHSAN RAJON
Lecturer Department of Computer Science, Khulna Public College, Khulna³9100 . E-Mail: ahsan.rajon@gmail.com Web: http://sites.google.com/site/ahsanrajon

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Programmable digital electronic device Electronic Machine that manipulates data according to a set of instructions. , , , ,

Engr. S. A. AHSAN RAJON Lecturer, Department of Computer Science

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= = = =    

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CPU Input OUTPUT

MEMORY

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What is this value?? 0.6 or 0.65 0.655 or 0.6550005 0.655000501 or 0.25000000000000000051

What is this value?? 0.2 or 0.25 0.25 or 0.250001 0.250000501 or 0.25000000000000000051
Engr. S. A. AHSAN RAJON Lecturer, Department of Computer Science
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(Progressive and Sequential)

Engr. S. A. AHSAN RAJON Lecturer, Department of Computer Science

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Engr. S. A. AHSAN RAJON Lecturer, Department of Computer Science

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Engr. S. A. AHSAN RAJON Lecturer, Department of Computer Science

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Engr. S. A. AHSAN RAJON Lecturer, Department of Computer Science

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...

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(Uniprocessor) /

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Software

Pre-Written Software

Customized Software

Application Softeare

System Software
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Engr. S. A. AHSAN RAJON Lecturer, Department of Computer Science

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Engr. S. A. AHSAN RAJON Lecturer, Department of Computer Science

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Engr. S. A. AHSAN RAJON Lecturer, Department of Computer Science

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Engr. S. A. AHSAN RAJON Lecturer, Department of Computer Science

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Engr. S. A. AHSAN RAJON Lecturer, Department of Computer Science

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Engr. S. A. AHSAN RAJON Lecturer, Department of Computer Science

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Engr. S. A. AHSAN RAJON Lecturer, Department of Computer Science

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Engr. S. A. AHSAN RAJON Lecturer, Department of Computer Science

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Engr. S. A. AHSAN RAJON Lecturer, Department of Computer Science

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(Control Unit) (ALU: Arithmetic
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Logic Unit) Engr. S. A. AHSAN RAJON  (Memory) Lecturer, Department of Computer Science

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ALU Arithmetic Logic Unit

Input

Memory

Output

Control Unit

Instruction/comm and

CPU:Central Processing Unit

Result Display

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RAM: Random Access Memory

, Static and Dynamic

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ROM: Read Only Memory
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PROM, EPROM, EEPROM, FLASH
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««. Then «.. Else«. 

 ShiftLecturer, Department of Computer Science
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START PROCESS 

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Instruction Fetch & Decode 

Execute Instruction and Store Result

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Process Terminated 

Engr. S. A. AHSAN RAJON Lecturer, Department of Computer Science

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VESA: Video Electronic Standard Architecture USB: Universal Serial Bus Fireware ISA: Industry Standard Architecture EISA: Extended/Enhanced Industry Standard Architecture PCI: Peripheral Component Interconnect
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ROM
Read Only Memory PROM 
Programmable

Read Only Memory

EPROM 
Erasable

Programmable Read Only Memory Erasable Programmable Read Only

EEPROM 
Electrically

Memory

FLASH
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/  



, / Small Computer System Interface 

 SCSI:

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USB
USB 3.0 5 GBPS

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Fireware
Expensive Speedy

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VIRUS
Vital Information Resources Under Seize

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Input
Job-1

process

output

Input

process

output

Job-2

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Cycle-1 Job-1 Job-2 Job-3 Job-4 Input

Cycle-2 Process Input

Cycle-3 Output Process Input

Cycle-4

Cycle-5

Cycle-6

Output Process Input Output Process Output

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CPU-1
I/O processor
MAIN MEMORY

CPU-2
I/O processor

I/O Unit
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DOS
Microsoft Disk/Directory Operating System 1981 CP/M Command

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Mac OS
Macintosh Operating System 1984 Apple Computer Inc

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UNIX
1969 Bell Lab, USA

LINUX
Linus Tarvoldus Free

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WINDOWS
1985 Microsoft Corporation
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Terminal-1 User-1 Terminal-2 User-2 Terminal-3 User-3

CPU

Engr. S. A. AHSAN RAJON Lecturer, Department of Computer Science

Terminal-n User-n
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