Laboratory Report

Sample and Hold

A Laboratory Report Presented to

Prof. Aileen Caberos-Gumera
Faculty, DEET
College of Engineering and Technology,
MSU-IIT
Sample and Hold
The sample and hold circuit is a front end in
which it deals with the analog signal.

From the word “Sample and Hold”, it samples

the analog input, holds the samples/data in a
definite time and then releases it.

It contains a switch and a capacitor

Sample and Hold Diagram
Ideal Sample and
Hold
Ideal Sample and Hold Code
Ideal Sample and Hold Simulation
Ideal Sample and Hold Simulation
Ideal Sample and Hold Simulation
Non-Ideal Sample
and Hold
Non-Ideal Sample and Hold Code
Non-Ideal Sample and Hold Simulation
Non-Ideal Sample and Hold Simulation
Non-Ideal Sample and Hold Simulation