Professional Documents
Culture Documents
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Controller Area Network
2
Introduction
3
CAN Overview
7 Application
6 Presentation
5 Session
4 Transport
3 Network
2 Data Link CAN Protocol
1 Physical
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CAN Protocol – Basic Concepts
Configuration flexibility
• Easy connection / disconnection of nodes
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Basic Concepts (Cont.)
Multimaster architecture
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Basic Concepts (Cont.)
CSMA/CD
Carrier Sense Multiple Access/Collision Detect
(CSMA/CD):
6A
Basic Concepts (Cont.)
CSMA/CA
6B
Basic Concepts (Cont.)
CSMA/CD + AMP
The CAN protocol allows simultaneous bus access from different
nodes. If more than one node is accessing the bus, a arbitration
is required. The bus access method used in CAN is a non-
destructive, bit-wise arbitration, called Carrier Sense Multiple
Access with Collision Detection and Arbitration on Message
Priority (CSMA/CD + AMP). The message priority is decoded in
the CAN identifier.
When the bus is in Idle state, several nodes can start
transmission of a frame. Every node reads back, bit by bit, from
the bus during the complete message and compares the
transmitted bit value with the received bit value. Per definition the
bits with a dominant value overwrites those with a recessive
value (this has to be provided by the transceiver).
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Basic Concepts (Cont.)
CAN Bus Characteristics – Wired - AND
“1” = recessive
“0” = dominant
A B C BUS
0 0 0 0
0 0 1 0 As soon as one node transmits
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Message Coding
Signal to High
Signal to High
“1”
“0”
0 1 0 ………………………
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Bus Access and Arbitration
0 1 0 1 1 0 1
Tx Pin
Node A
Rx Pin
0 1 0 1 1 1
Tx Pin Dominant Bit Overwrites
Node B Recessive Bit
Rx Pin (Node B loses arbitration
and stops transmission)
0 1 0 1 1 0 1
Busline
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CAN Versions
CAN Specification
• 1.2 - 11-bit only; 29-bit intolerant
• 2.0A - 11-bit only; 29-bit tolerant (2.0B Passive)
• 2.0B - 11- and 29-bit (2.0B Active)
11-bit - 211 = 2048 Identifiers
29-bit - 229 = 536870912 Identifiers
Dominant - 0
Recessive - 1
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CAN 2.0 Overview - Standard Frame
Data Frame
Control ACK End of
IFS
Arbitration Field Data Field CRC Field
Field Field Frame
DLC
ACK
RTR
SOF
11-bit Identifier
IDE
RO
DEL
DEL
(4) 0-8 Bytes 15-bit CRC 7 3
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CAN 2.0 Overview - Extended Frame
IFS
Arbitration Field Field Field Frame Bus Idle
ACK
SRR
SOF
DLC
IDE
RTR
11-bit Identifier 18-bit Identifier 0-8 Bytes 15-bit CRC
DEL
DEL
R1
R0
(4) 7 3
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CAN Frame Formats
EF OF
DF1 I DF2 I RF3 I DF3 I DF4 I DF4 I DF5 I I DF6
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Remote Frame
Remote Frame
DLC
ACK
RTR
SOF
IDE
RO
11-bit Identifier (4) 15-bit CRC 7 3
Data Frame
DLC
ACK
RTR
SOF
IDE
RO
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Interframe Space
Interframe Space is composed of an intermission field (3 bits) plus Bus idle (0-? bits)
- Bus Idle only applies if there is no data or remote frame pending
Interframe Space may be followed by a Data Frame, Remote Frame, or Bus Idle
Interframe
Space
Bus Idle
Intermission
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Error and Overload Frames
Error
Frame
Data or 6 0-6
Remote Frame
8 IFS
Superposition of Error
Error Flags Delimiter
Overload
Frame
IFS or 6 0-6 8 IFS
End of Frame
Superposition of Overload
Overload Flags Delimiter
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Bit Encoding / Bit Stuffing
CAN uses NRZ encoding with bit stuffing after 5 consecutive bits
After 5 consecutive dominant bits a recessive bit is stuffed
After 5 consecutive recessive bits a dominant bit is stuffed
Bit stuffing is active between Start of Frame and CRC field (minus delimiter)
After CRC field, an error frame will violate the fixed format fields
ACK slot surrounded by delimiters
End of Frame is seven recessive bits
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Bit Stuffing
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Desired Data
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Actual
Data Stream
Stuff Bit
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Bus Synchronization
/ Idle
All nodes synchronize on leading edge of
SOF bit (Hard Synchronization)
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CAN Bit Timing
1 bit time
transmit point
sample point
Phase
Sync- Propagation Phase
Buffer
segment Time Segment Buffer
Segment 2
Segment 1
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CAN Bit Timing
Timing Segments
1 bit time
transmit point
sample point
Sync Timing Timing
Segment Segment 1 Segment 2
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Correction of Phase errors
The Phase error (e) of an edge is given by the position of the edge
relative to Sync segment, measured in Time Quanta (TQ).
e = 0 If the edge lies within Sync segment
e< 0 if the edge lies after the sample point of the previous bit
Get corrected by shortening the Phase segment 2
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Synchronization Jump Width
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Error Detection
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Fault Confinement States (Cont.)
Reset
Re-Initialization
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Error Counters
Note: See CAN Specification 2.0 for further details on Fault Confinement (exceptions to TEC, etc.)
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Error Frames
Active Error
Frame
Data or 6 0-6
Remote Frame 8 IFS
Superposition of Error
Error Flags Delimiter
Passive Error
Frame
Data or 6 0-6
Remote Frame 8 IFS
Superposition of Error
Error Flags Delimiter
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Residual Error Probability
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Message Propagation
T TX T BUS T RX
Tx Interrupt Processing Data Transmission Rx Interrupt Processing
time: time: time:
10 to 200 uS 55uS 10 to 200 uS
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Bus Utilization
Number of Bits in Message
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Bus Utilization
Calculation
Example: Bus speed = 250 K bps (bits per second)
So, in every second only 250,000 bits can be transmitted.
100% bus utilization is when 250,000 bits are sent every second.
t = 1 second
250,000 bits
If you have 1 message - (151 bits long); and
if it is transmitted every 50 mS (20 times per second); then
every second it uses 3020 bits (151 x 20).
Note: 151 bits is an extended CAN message with 10 stuff bit and IFS.
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Relation Between Baud Rate and Bus Length
Bit Rate
(Kbps)
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Standardization
10 Diagnostics
Class A Body
Electronics
Real-time capability
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CAN Implementations
Node A Node B
81C9x CAN
Controller
MC33388 MC33388
CAN
Transceiver
CAN Bus
36
CAN Physical Layers
37
J2284 Technical Information
Based on ISO 11898
3.5
CAN_H
2.5
CAN_L
1.5
0
Recessive Dominant Recessive TIME
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J2411 Overview
39
J2411 Overview
0 1
VOLTAGE
0
Recessive Dominant Recessive TIME
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ISO 11898
Most implementation use
• Several off the shelf transceivers
• Discrete possible
Based on Bosch CAN protocol specification
• Part 1 - CAN 2.0A
• Part 2 - CAN 2.0B
• Part 3 - Fault Tolerant
• Part 4 - Time Triggered CAN
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ISO 11898 Overview
VOLTAGE
0 1
3.5
CAN_H
2.5
CAN_L
1.5
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ISO 11898 -1,-2
Unshielded cable
Network Network
termination
termination
120 ohms
120 ohms
Maximum length =
0.3 m (1 feet)
@ 1 Mbps
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ISO 11898-3
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TTCAN
ISO 11898-4
• Adds time triggering capability to CAN
• Satisfy time critical applications which currently use software and
safety critical applications to place the timing requirements into the
protocol and hence into silicon
• Additional silicon cost is estimated at a few cents
• Introduces the concept of common or "global time" and the use of
"reference messages" to synchronize behavior across the network
• Other messages may be transmitted in specific "transmit time
windows"
• Synchronization needs to be supported to fractions of the bit time
• Robert Bosch have been highly active in setting up TTCAN.
Currently have an FPGA based board solution.
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