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CAN Protocol

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Controller Area Network

Fundamentals Physical Layer


• Introduction • Message coding
• Overview • Bus Synchronization
• Basic Concepts • Bit Timing / Construction

Datalink Layer CAN Physical Layers


• Bus Access Arbitration CAN Controllers Overview
• Protocol versions Benefits
• Frame Formats
• Error Detection
• Error Handling

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Introduction

• CAN (Controller Area Network) was developed by


Bosch in mid 1980’s.
• Internationally standardized under ISO 11898
• For greater safety,improved pollution control and
reduced fuel consumption, car industry has
developed multitude of electronic systems. E.g
ABS,EMS, Traction control, Central door locking and
power seats, etc,.
• Was developed to use in passenger cars to exchange
data between electronic systems,sensors in real time
speeds upto 1Mbit/s.

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CAN Overview

7 Application
6 Presentation
5 Session
4 Transport
3 Network
2 Data Link CAN Protocol
1 Physical

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CAN Protocol – Basic Concepts

Bus access priority by message identifier


• Non-destructive bitwise arbitration
• Low latency time for high priority messages

Configuration flexibility
• Easy connection / disconnection of nodes

Broadcast / Multicast reception


• System wide data consistency

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Basic Concepts (Cont.)

 Number of nodes not limited by protocol

 Multimaster architecture

 No node addressing, message identifier specifies


contents and priority

 Powerful error handling


• Automatic retransmission of corrupted messages
• Fault confinement: permanent vs. temporary faults

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Basic Concepts (Cont.)
CSMA/CD
Carrier Sense Multiple Access/Collision Detect
(CSMA/CD):

 It is the protocol for carrier transmission access in Ethernet


networks.
 On Ethernet, any device can try to send a frame at any time.
 Each device senses whether the line is idle and therefore
available to be used.
 If it is, the device begins to transmit its first frame. If another
device has tried to send at the same time, a collision is said to
occur and the frames are discarded.
 Each device then waits a random amount of time and retries
until successful in getting its transmission sent

6A
Basic Concepts (Cont.)
CSMA/CA

Carrier Sense Multiple Access with Collision Avoidance


(CSMA/CA):

A network control protocol in which


(a) a carrier sensing scheme is used,
(b) a data station that intends to transmit sends a jam signal,
(c) after waiting a sufficient time for all stations to receive the jam
signal, the data station transmits a frame, and
(d) while transmitting, if the data station detects a jam signal from
another station, it stops transmitting for a random time and
then tries again.

6B
Basic Concepts (Cont.)
CSMA/CD + AMP
 The CAN protocol allows simultaneous bus access from different
nodes. If more than one node is accessing the bus, a arbitration
is required. The bus access method used in CAN is a non-
destructive, bit-wise arbitration, called Carrier Sense Multiple
Access with Collision Detection and Arbitration on Message
Priority (CSMA/CD + AMP). The message priority is decoded in
the CAN identifier.
 When the bus is in Idle state, several nodes can start
transmission of a frame. Every node reads back, bit by bit, from
the bus during the complete message and compares the
transmitted bit value with the received bit value. Per definition the
bits with a dominant value overwrites those with a recessive
value (this has to be provided by the transceiver).

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Basic Concepts (Cont.)
CAN Bus Characteristics – Wired - AND
“1” = recessive

“0” = dominant

A B C BUS
0 0 0 0
0 0 1 0 As soon as one node transmits

0 1 0 0 A dominant bit (0 – Zero)


Two logic states
possible on the bus: 0 1 1 0 Bus is in the dominant state
“1” = recessive 1 0 0 0
“0” = dominant
1 0 1 0 Only if all nodes transmits
1 1 0 0 A recessive bit (1 – One)
1 1 1 1 Bus is in the recessive state

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Message Coding

Message Coding: NRZ - Code

Signal to High

Transmit a “0” Low

Signal to High

Transmit a “1” Low

“1”

“0”

0 1 0 ………………………

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Bus Access and Arbitration

0 1 0 1 1 0 1

Tx Pin
Node A
Rx Pin

0 1 0 1 1 1
Tx Pin Dominant Bit Overwrites
Node B Recessive Bit
Rx Pin (Node B loses arbitration
and stops transmission)

0 1 0 1 1 0 1

Busline

Note: CAN uses NRZ encoding.

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CAN Versions

CAN Specification
• 1.2 - 11-bit only; 29-bit intolerant
• 2.0A - 11-bit only; 29-bit tolerant (2.0B Passive)
• 2.0B - 11- and 29-bit (2.0B Active)
11-bit - 211 = 2048 Identifiers
29-bit - 229 = 536870912 Identifiers
Dominant - 0
Recessive - 1

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CAN 2.0 Overview - Standard Frame

Data Frame
Control ACK End of

IFS
Arbitration Field Data Field CRC Field
Field Field Frame

DLC

ACK
RTR
SOF

11-bit Identifier

IDE
RO

DEL

DEL
(4) 0-8 Bytes 15-bit CRC 7 3

SOF - Start of Frame Standard Frame: IDE=0


RTR - Remote Transmission Request Standard Data Frame: RTR=0
IDE - Identifier Extension Standard Remote Frame: RTR=1
R0 - Reserved bit
DLC - Data Length Code
CRC - Cyclic Redundancy Check
ACK - Acknowledgement bit

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CAN 2.0 Overview - Extended Frame

Control ACK End of


Data Field CRC Field

IFS
Arbitration Field Field Field Frame Bus Idle

ACK
SRR
SOF

DLC
IDE

RTR
11-bit Identifier 18-bit Identifier 0-8 Bytes 15-bit CRC

DEL

DEL
R1
R0
(4) 7 3

SOF - Start of Frame Extended Frame: SRR=1, IDE=1


Extended Data Frame: RTR=0
SRR - Substitute Remote Request Extended Remote Frame: RTR=1
IDE - Identifier Extension
RTR - Remote Transmission Request
Standard/Extended frames are prioritized as follows:
R0 - Reserved bit
R1 - Reserved bit IDE RTR
DLC - Data Length Code 0 0 Standard Data Frame
0 1 Standard Remote Frame
CRC - Cyclic Redundancy Check
1 0 Extended Data Frame
DEL - Delimiter 1 1 Extended Remote Frame
ACK - Acknowledgement bit

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CAN Frame Formats

Data Frame (DF) - carries data from transmitter to receiver


Remote Frame (RF) - transmitted to request Data Frame of same ID
Error Frame (EF) - transmitted by any node to signal error
Overload Frame (OF) - provides extra delay between Data or Remote Frames
Interframe Space (I) - separates preceding and succeeding frames

Error Delay in Node

EF OF
DF1 I DF2 I RF3 I DF3 I DF4 I DF4 I DF5 I I DF6

Data Frame 1 Remote Frame 3 Error Frame causes


requests Data Frame 3 Data Frame 4 to be re-sent
Overload Frame causes
Data Frame 2 delay before Data Frame 6

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Remote Frame

Remote Frame - RTR is recessive (1) and no data is sent.


The DLC is set to the same value as the Response Data Frame DLC.

Remote Frame

DLC

ACK
RTR
SOF

IDE
RO
11-bit Identifier (4) 15-bit CRC 7 3

Response Data Frame - RTR is dominant (0) and data is sent.


The Identifier is the same as the Remote Frame Identifier

Data Frame

DLC

ACK
RTR
SOF

IDE
RO

11-bit Identifier (4) 0-8 Bytes 15-bit CRC 7 3

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Interframe Space

Interframe Space is composed of an intermission field (3 bits) plus Bus idle (0-? bits)
- Bus Idle only applies if there is no data or remote frame pending

Interframe Space may be preceded by a Data, Remote, Overload, or Error Frame

Interframe Space may be followed by a Data Frame, Remote Frame, or Bus Idle

Interframe
Space

Data, Remote, Data or Remote


Error, or Overload 3 0-? Frame
Frame

Bus Idle
Intermission

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Error and Overload Frames

Error
Frame

Data or 6 0-6
Remote Frame
8 IFS

Superposition of Error
Error Flags Delimiter

Overload
Frame
IFS or 6 0-6 8 IFS
End of Frame
Superposition of Overload
Overload Flags Delimiter

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Bit Encoding / Bit Stuffing

CAN uses NRZ encoding with bit stuffing after 5 consecutive bits
 After 5 consecutive dominant bits a recessive bit is stuffed
 After 5 consecutive recessive bits a dominant bit is stuffed

CAN devices automatically stuff/de-stuff bits transparent to programmer

Bit stuffing is active between Start of Frame and CRC field (minus delimiter)

Bit stuffing forces transitions in bit stream; allowing CAN devices to


resynchronize.

After CRC field, an error frame will violate the fixed format fields
 ACK slot surrounded by delimiters
 End of Frame is seven recessive bits

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Bit Stuffing

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

Desired Data

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Actual
Data Stream

Stuff Bit

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Bus Synchronization

Hard Synchronization at Start of Frame bit

Intermission SOF Header

/ Idle
All nodes synchronize on leading edge of
SOF bit (Hard Synchronization)

Re-Synchronization on each Recessive to Dominant


edge

Re-Sync Re-Sync Re-Sync Re-Sync

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CAN Bit Timing

1 bit time

1 time quantum (tq)

transmit point
sample point
Phase
Sync- Propagation Phase
Buffer
segment Time Segment Buffer
Segment 2
Segment 1

• Each bit time is made up of a fixed number of time quantum (tq).


• Each time quantum (tq) is a fixed length.
• tqs construct the sync-segment, propagation time segment phase
buffer segment 1, and phase buffer segment 2.

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CAN Bit Timing
Timing Segments

1 bit time

1 time quantum (tq)

transmit point
sample point
Sync Timing Timing
Segment Segment 1 Segment 2

• CAN modules combine Propagation Segment + Phase Buffer


Segment 1 as Timing Segment 1
• Phase Buffer Segment 2 as Timing Segment 2

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Correction of Phase errors
The Phase error (e) of an edge is given by the position of the edge
relative to Sync segment, measured in Time Quanta (TQ).
e = 0 If the edge lies within Sync segment

e >0 If the edge lies before the Sample Point


Get corrected by lengthening Phase segment 1

e< 0 if the edge lies after the sample point of the previous bit
Get corrected by shortening the Phase segment 2

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Synchronization Jump Width

Amount by which bit length can be adjusted during Re-Sync is


defined as Synchronization Jump Width
No of TQ by which Phase Buffer Segment 1 can be
lengthened
No of TQ by which Phase Buffer Segment 2 can be
shortened
Programmability of Synchronization Jump Width is mandatory
Minimum of 1Tq, maximum of 4Tq

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Error Detection

There are five types of error detection mechanisms:


Bit error: bit received is not the value
transmitted (except in arbitration and ACK field)
Stuff error: more than five consecutive bits of same
polarity are received
CRC error: CRC sent is calculated and compared wrong
Form error: fixed format fields are violated. No dominant
bits allowed in CRC Delimiter,ACK Delimiter, End Of Frame
and Intermission

ACK error: no ACK is sent by receivers and received by


sender

All detected errors are immediately followed by an error frame.


 Error frame violates error detection mechanisms if only
one node detects error (local error) (superposition of error
frames)

Automatic retransmission following error frame. 25


Fault Confinement

 Confines a faulty node on the network

 Isolates the faulty node in a timely manner

 Distinguishes between temporary and permanent faults


Temporary faults allow the node to recover

 To understand fault confinement you must understand:


1. Fault Confinement states
2. Transmit and Receive Error Counters (TEC,
REC)

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Fault Confinement States (Cont.)

REC > 127


or Sends Passive Error Frame
TEC > 127

Sends Active Error Frame Error


Passive
REC <= 127
and TEC > 255
TEC <= 127

Error Active Bus Off

Reset

Re-Initialization

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Error Counters

TEC and REC are incremented/decremented based on successful/unsuccessful messages

Receive Error Counter (REC)


If receiver sends an error frame REC=REC+1
If receiver was first to start an error frame REC=REC+8
If receiver monitors a BIT ERROR while sending an error frame REC=REC+8
After successfully receiving a message REC=REC-1

Transmit Error Counter (TEC)


If transmitter sends an error frame TEC=TEC+8
If transmitter monitors a BIT ERROR while sending an error frame TEC=TEC+8
After successfully transmitting a message TEC=TEC-1

Note: See CAN Specification 2.0 for further details on Fault Confinement (exceptions to TEC, etc.)

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Error Frames

Active Error
Frame

Data or 6 0-6
Remote Frame 8 IFS

Superposition of Error
Error Flags Delimiter

Passive Error
Frame

Data or 6 0-6
Remote Frame 8 IFS

Superposition of Error
Error Flags Delimiter

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Residual Error Probability

The probability that data will be


corrupted and remain undetected.
• 5-10 nodes with error rate 1/1000
• Maximum bit error is 0.02
• Operating at 1 Mbit/s
• Bus loading average 50%
• Average message length 80 bits
• Operating life of 4000 hours
• Total number of message transmitted 9 x 1010

One undetected message occurs every 1000 years.

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Message Propagation

Event (trigger) Output/Response

T TX T BUS T RX
Tx Interrupt Processing Data Transmission Rx Interrupt Processing
time: time: time:
10 to 200 uS 55uS 10 to 200 uS

Depending on: (standard frame) Depending on:


• Processor 47 bits overhead • Processor
• Clock speed 8 data bits • Clock speed
• Message object 55 bits total @ 1 uS • Message object filtering
pre-processing

Total response time 75 uS (absolute minimum)

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Bus Utilization
Number of Bits in Message

Field Description 11-bit ID 29-bit ID


SOF Start-of-Frame 1 1
Arbitration Identifier 12 32
RTR - Remote Transmission Request
Control IDE - Identifier Extension Bit 6 6
R0 - Reserved Bit
DLC - Data Length Code
Data Data - 1-8 bytes 0 - 64 0 - 64
CRC CRC Code - 15-bit CRC 16 16
Del - Delimiter
ACK Ack Bit 2 2
Del - Delimiter
End-of-Frame 7 Recessive Bits 7 7
Stuff Bits Stuff bits due to 5 consecutive bits 0 - 24 0 - 24
Total 44 - 132 64 - 152

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Bus Utilization
Calculation
Example: Bus speed = 250 K bps (bits per second)
So, in every second only 250,000 bits can be transmitted.
100% bus utilization is when 250,000 bits are sent every second.
t = 1 second

250,000 bits
If you have 1 message - (151 bits long); and
if it is transmitted every 50 mS (20 times per second); then
every second it uses 3020 bits (151 x 20).

So, bus utilization of the message is:


3020 bits = 0.01208 or 1.208%
250000 bits

Note: 151 bits is an extended CAN message with 10 stuff bit and IFS.

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Relation Between Baud Rate and Bus Length

Up to 1Mbit / sec @ 40m bus length (130 feet)

Bit Rate
(Kbps)

CAN Bus Length (M)

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Standardization

bit rate / kbps

1000 High Speed CAN


ISO –11898
Class C
EMS, ABS
125
Low Speed CAN
Class B ISO –11519 -2

10 Diagnostics

Class A Body
Electronics

Real-time capability

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CAN Implementations

Node A Node B

e.g. EMS e.g. ABS


Application

e.g. 80C166 Host


Controller e.g. 82527

81C9x CAN
Controller

MC33388 MC33388
CAN
Transceiver

CAN Bus

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CAN Physical Layers

J2284 - CAN High Speed Interface


J2411 - Single-Wire Physical Layer
ISO 11898 – Most implementations use this

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J2284 Technical Information
Based on ISO 11898

– Impedance of Wire - 120 ohms, 108 min,


132 max
– Contact Resistance - 70 milli-ohms
nominal Voltage - 16 V max
– Current - 500 mA max 0 1 VOLTAGE

3.5
CAN_H
2.5
CAN_L
1.5

0
Recessive Dominant Recessive TIME

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J2411 Overview

• Single unshielded-wire CAN


• 33.3Kbps (normal), 83.33 Kbps (high-speed)
• Supports 11-bit and 29-bit identifiers
• Maximum number of nodes - 32
• Maximum bus length - 40 meters
• No bus termination necessary

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J2411 Overview

0 1
VOLTAGE

0
Recessive Dominant Recessive TIME

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ISO 11898
 Most implementation use
• Several off the shelf transceivers
• Discrete possible
Based on Bosch CAN protocol specification
• Part 1 - CAN 2.0A
• Part 2 - CAN 2.0B
• Part 3 - Fault Tolerant
• Part 4 - Time Triggered CAN

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ISO 11898 Overview

VOLTAGE
0 1

3.5

CAN_H
2.5
CAN_L

1.5

Dominant Recessive TIME


Recessive

-Two-wire differential bus


-Termination placement
- Dominant and recessive bit definition

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ISO 11898 -1,-2

Maximum: 40 meters (120 feet)


@ 1 Mbps

Unshielded cable

Network Network
termination
termination
120 ohms
120 ohms

Maximum length =
0.3 m (1 feet)
@ 1 Mbps

ECU ECU ECU


Node 1 Node 2 . . . Node 32

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ISO 11898-3

• Intended for low speed, not greater than 125 kbps


• Built to withstand line failures
– CAN_H or CAN_L interrupted
– CAN_H or CAN_L shorted to battery or ground
– CAN_L shorted to battery voltage
– CAN_L shorted to CAN_H
– CAN_H and CAN_L interrupted at the same location
– Loss of termination

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TTCAN
ISO 11898-4
• Adds time triggering capability to CAN
• Satisfy time critical applications which currently use software and
safety critical applications to place the timing requirements into the
protocol and hence into silicon
• Additional silicon cost is estimated at a few cents
• Introduces the concept of common or "global time" and the use of
"reference messages" to synchronize behavior across the network
• Other messages may be transmitted in specific "transmit time
windows"
• Synchronization needs to be supported to fractions of the bit time
• Robert Bosch have been highly active in setting up TTCAN.
Currently have an FPGA based board solution.

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