CHAPTER 9:

OPERATIONAL AMPLIFIER
Contents

 Symbol
 Example
 Characteristics
 Structure
 Operation
 Applications
 μp 741
Symbol
Example
Characteristics
 Characters of circuits depend on outside circuit
structure, not the opamp itself
 Gain AV: very high, ideally ∞
 Zin: very large, ideally ∞
 Zout: very small, ideally 0
 Current entering the amp at either terminal: extremely
small, ideally 0
 Voltage out (when voltages into each other are equal):
small, ideally 0
 Bandwidth: broad, ideally infinite
Characteristics
 Input: 2 inputs (positive and negative)
 Single-ended input: 1 input to signal source, 1 input to ground
 Double-ended input: 2 different signal sources or 1 signal source
apply between 2 inputs
 Output: 1 or 2 outputs, typically 1 output
 Mode gain:
 Differential-mode gain Adm - large
 Common-mode gain Acm - small
 Common-mode rejection ratio CMRR=G=Adm/Acm, usually about
103-105
Structure
 Requirement:
 Gain: large
 Offset: small
 Currents: small
 Input impedance: large
 Output impedance: small
 Input: symmetric
Structure
 Input stage
 Intermediate stage
 Level shifting stage
 Output stage

 Example: 741 – at the end of chapter

Applications
 Basic and advance applications
 Basic applications:
 Inverting, non-inverting amplifier
 Uni-gain circuit
 Addition and subtraction circuits
 Integration and differential circuits
 Multi-stages circuit
Applications
 Advance applications
 Current-controlled voltage source
 Voltage-controlled current source
 DC voltmeter
 AC voltmeter
 Driver circuit
 Active filters
 NIC
 .etc.
Non-inverting fixed-gain amplifier

Prove:
 V- = V+ = V
1

 I- = I+ = 0
=>IR1 = Irf = V1/R1
=>A = 1+Rf/R1
Non-inverting fixed-gain amplifier

A = 1+Rf/R1=101
Vo=101Vi
Inverting fixed-gain amplifier
Prove:
 V- = V+ = 0

 I- = I+ = 0

=>IR1 = Irf = V1/R1

=>A = -Rf/R1
Voltage addition

Vo = -V1Rf/R1-V2Rf/R2 –
V3Rf/R3
If V1=V2=V3 then:
A= -Rf/R1-Rf/R2 –Rf/R3
Voltage subtraction

Vout1 = -Rf/R1V1
Vout = -Rf/R2V2 - Rf/R2Vout1 = -Rf/R2V2 + Rf/R2V1
= -Rf/R2(V1 – V2)
Voltage subtraction with 1 amp
Prove:
 V-=V+=V *R /(R +R )
1 3 1 3

 I- = I+ = 0
=>IR2 = IR4 = (V2-
V1*R3/(R1+R3))/R2
=>Vo=V1*R3/(R1+R3)*
(R2+R4)/R2 – V2*R4/R2
Uni-gain (buffer) amplifier

 Provide required input and output resistant stage

 Provide multiple identical output signals
Voltage-controlled voltage source

 Vo=(1+Rf/R1)V1  Vo=(-Rf/R1)V1
Voltage-controlled current source

 Io=V1/R1
Current-controlled voltage source

 Vo=-I1RL
Current-controlled current source

 Io=I1(R2+R1)/R2
Integration circuit

 Vo=(Vi/
RC)0ƒTVi(t)dt+Vout(t=0)
Differential circuit

 Vo=-RC dVi/dt
Filter
 Low pass filter
 High pass filter
 Band pass filter
1st order low pass filter

 Cutoff frequency: fOH=1/(2πR1C1)

 Voltage gain below cutoff freq: Av=1+Rf/RG
2nd order low pass filter

 Cutoff frequency: fOH=1/(2πR1C1)

 Voltage gain below cutoff freq: Av=1+Rf/RG
1st and 2nd order high pass filter

 Cutoff frequency: fOL=1/(2πR1C1)

 Voltage gain above cutoff freq: Av=1+Rf/RG
Band pass filter
Multi-stages gain

A = A1*A2*A3
741 application-Light activated alerter
12V battery monitor
Homework
 Chapter 14: 1, 4, 9, 10, 12, 15, 17, 18
 Chapter 15: 1, 6, 8, 11, 14, 16, 17
OpAmp 741
 Maximum ratings
 Inside structure
Maximum ratings
 OpAmp 741 inside structure
 Biasing Currents
 Input Stage
 Second Stage
 Output Stage
 Short Circuit Protection
 Inside structure: Schematic

HI
Q12 Q13b Q13a

Q14

Q15
Q9 Q8 Q19
R6
27k
Q18
Vo
R10 R7
Vin+ Vin- 40k 27k
Q1 Q2 Q21
R5
39k
Q20
Cc
Q3 Q4 Q23

30p

Q7 Q16

Q17
R9
Q11 Q10 Q6 50k
Q5 R8
R3 100
50k
R4 R1
5k 1k R2
1k Q24
Q22
R11
50k

LO
 Biasing Current Sources

Q12
 Generates reference bias
current through R5
Q9 Q8

 The opAmp reference

R5
39k
current is:
Iref=[VCC-VEB12-VBE11-(-VEE)]/R5
 For VCC=VEE=15V and
Q11 Q10
VBE11=VBE12=0.7V, we have
IREF=0.73mA
R4
5k
 Input Stage
 The differential pair,
Q1 and Q2 provide the
main input
Vin+ Vin-
 Transistors Q5-Q7
Q1 Q2
provide an active load
Q3 Q4 for the input
Q7

Q6
Q5
R3
50k
R1
1k R2
1k
Input Stage:
DC Analysis - 1

 Assuming that Q10 and Q11 are matched, we can

write the equation from the Widlar current source:

 IREF 
VT  ln  IC10  R4
 IC10 
 Using trial and error, we can solve for
IC10, and we get: IC10=19A
Input Stage: DC Analysis -2

 From symmetry we
see that IC1=IC2=I,
and if the npn  is
large, then IE3=IE4=I
 Analysis
continues:
Input Stage: DC Analysis -3
 Analysis of the active load:
Second (Intermediate) Stage
Q13b Q13a
 Transistor Q16 acts as an
emitter-follower giving
this stage a high input
resistance
 Capacitor Cc provides
Cc frequency compensation
30p using the Miller
Q16 compensation technique
Q17
R9
50k
R8
100
Second Stage:
DC Analysis

 Neglecting the base current of Q23, IC17 is equal to

the current supplied by Q13b
 IC13b=0.75IREF where P >> 1
 Thus: IC13b=550uA=IC17
 Then we can also write:
 IC17 
VBE17 VT  ln  618mV
 IS 
IE17  R8  VBE17
IC16 IE16 IB17  16.2A
R9
 Output Stage
 Provides the opAmp
Q14 with a low output
Q19
Q15 resistance
R6

Q18
27k  Class AB output
R10
40k
R7
27k
Vo
stage provides fairly
Q21
high current load
Q23
Q20
capabilities without
hindering power
dissipation in the IC
Output Stage:
DC Analysis

 Q13a delivers a current of 0.25IREF, so we can say:

IC23=IE23=0.25IREF=180A
 Assuming VBE18 = 0.6V, then IR10=15A, IE18=180-
15=165A and IC18=IE18=165A
 IC19=IE19=IB18+IR10=15.8A
Short Circuit Protection

Q24
Q22
R11
50k

 These transistors are normally off

 They only conduct in the event that a large current is drawn from the
output terminal (i.e. a short circuit)