BASIC CONCEPTS OF

PRIMARY MULTIPLEXING

V.SRINATH ITX2
 MULTIPLEXING
MULTIPLEXING IS THE PROCESS OF
INTERLEAVING N INDEPENDENT
INFORMATION SIGNALS IN TO A
CONTINUOUS SIGNAL i.e. N INDEPENDENT
PARALLEL SIGNALS INTO A SERIAL SIGNAL
IN A SEQUENTIAL MANNER FOLLOWING A
SET OF RULES AS RECOMMENDED BY
ITU(T).
 MULTIPLEXING

Whenever the bandwidth of a medium

linking two devices is greater than the
bandwidth needs of the devices, the link can
be shared. Multiplexing is the set of
techniques that allows the (simultaneous)
transmission of multiple signals across a
single data link. As data and
telecommunications use increases, so does
traffic.
Dividing a link into channels
Types of multiplexing
 Frequency-division multiplexing (FDM)

FDM is an analog multiplexing technique

that combines analog signals
 FREQUENCY DOMAIN

IN FREQUENCY DOMAIN A GIVEN

BANDWIDTH OF FREQUENCIES IS DIVIDED
INTO A NUMBER OF FREQUENCY SLOTS
HAVING A BANDWIDTH OF 4 KHz EACH.

THIS IS CALLED FREQUENCY DIVISION

MULTIPLEXING (FDM)
FDM Principle
FDM process
FDM de multiplexing example
 TIME DOMAIN
IN TIME DOMAIN A GIVEN TIME
INTERVAL IS DIVIDED INTO A NUMBER
OF TIME INTERVALS OF EQUAL
DURATION CALLED TIME SLOTS.
THIS IS CALLED TIME DIVISION
MULTIPLEXING (TDM)
 Time Division Multiplexing (TDM)

TDM is a digital multiplexing technique for combining

several low-rate digital channels into one high-rate
one.
Synchronous time-division multiplexing
Example
 Interleaving

• The process of taking a group of bits from

each input line for multiplexing is called
interleaving.
• We interleave bits (1 - n) from each input
onto one output.
Interleaving
 OPTICAL DOMAIN

IN OPTICAL DOMAIN, A GIVEN BAND

OF WAVELENGTHS IS DIVIDED AMONG
A NUMBER OF INFORMATION SIGNALS
WITH SUITABLE SPACING. EACH
INFORMATION SIGNAL IS ASSIGNED A
SPECIFIC WAVELENGTH.

THIS IS CALLED WAVELENGTH

DIVISION MULTIPLEXING.
 Basic Principle of Wave Length Division
Multiplexing (WDM)

(λ1). TX-A
ITU Ch.1 RX-A (λ1).
ITU Ch.1
Optic fiber
(λ2 ) TX-A
ITU Ch.2 RX-A (λ2 )
4 CH ITU Ch.2 Data Out
Data in 4 CH
WDM WDM
(λ3 ) TX-A
MUX (λ3 )
ITU Ch.3 MUX RX-A
ITU Ch.3
EDFA
(λ 4 ) TX-A
ITU Ch.4 25 db gain
RX-A (λ4 )
ITU Ch.4
Wavelength-division multiplexing (WDM)
Prisms in wavelength-division multiplexing and
demultiplexing
 TIME DIVISION MULTIPLEXING
IN TIME DIVISION MULTIPLEXING,
EACH INFORMATION SIGNAL IS
SAMPLED AT A RATE EQUAL TO OR
GREATER THAN TWICE THE
BANDWIDTH OF THE INFORMATION
SIGNAL.

FOR SPEECH SIGNAL THE

BANDWIDTH IS 4 KHz. HENCE THE
SAMPLING RATE OR SAMPLING
FREQUENCY IS 8 KHz.
THEREFORE THE TIME INTERVAL
AVAILABLE FOR SAMPLING IS 125
MICRO-SECONDS.
THIS TIME INTERVAL IS DIVIDED
INTO N NUMBER OF TIME
INTERVALS OF EQUAL DURATION
CALLED TIMESLOTS.
EACH INFORMATION SIGNAL
COMING FROM THE USER IS
CALLED A CHANNEL.
EACH USER INFORMATION SIGNAL
(VOICE) IS SAMPLED ONCE IN EACH
125 MICRO-SECONDS DURATION
WHICH IS CALLED A SAMPLE. FOR
FAITHFUL REPRODUCTION OF THE
INFORMATION AT THE RECEIVING
END A MINIMUM OF 8000 SAMPLES
FOR EACH INFORMATION SIGNAL
ARE REQUIRED TO BE
TRANSMITTED IN A DURATION OF
ONE SECOND.
EACH SAMPLE OF EACH CHANNEL
IS QUANTIZED AND ENCODED INTO
AN EIGHT BIT SIGNAL. THUS A
SAMPLE IS REPRESENTED BY AN
EIGHT BIT BINARY CODE. THIS
PROCESS IS CALLED TDM-PCM i.e.
TIME DIVISION MULTIPLEXING
USING PULSE CODE MODULATION
AND THE SIGNAL SO GENERATED IS
CALLED THE PCM SIGNAL.
 ANALOG-TO-DIGITAL
CONVERSION
A digital signal is superior to an analog
signal because it is more robust to noise and
can easily be recovered, corrected and
amplified. For this reason, the tendency
today is to change an analog signal to digital
data. In this section we describe a
technique, pulse code modulation
FOR GENERATING A PCM SIGNAL
THE FOLLOWING STEPS ARE
INVOLVED.
 FILTERING
 SAMPLING
 QUANTIZATION
 ENCODING
Source Encoding : PCM Encoding Process
 Filtering
Filters are used to limit the speech signal to
the frequency band 300 ‑ 3400 Hz.

Sampling
A process of periodically sampling the
continually changing analog input voltage and
convert it to a series of constant amplitude
pulses, so that it is easier to convert to binary
PCM code
 Sampling

T1 T2 T3
Audio Signal
time
T4 T5 T6 T7

Sampler Output
T1 T2 T3
Pulse Amplitude
time
Modulated (PAM) T4 T5 T6 T7
signal
Sampling is the periodical measurement of the
value of the analogue signal.
A sampled signal contains all the information if
the sampling frequency is at least twice the
highest frequency of the signal to be sampled.
As the analogue signals in telephony are band-
limited from 300 to 3400Hz, a sampling
frequency of 8000Hz - every 125usec - is
sufficient.
It is necessary to determine a minimum limit
for the number of samples to be taken, for
proper reconstruction of the analogue signal,
with acceptable limits of distortion. This
sampling rate is defined by sampling theorem
 Sampling Theorem
A complex signal, such as human speech, has a
wide range of frequency components.

The frequency components may have different

amplitudes.

In other words, only the component frequencies

have certain amplitudes, and all other frequencies,
either higher or lower, have no amplitude.
'If a band‑limited signal is sampled at regular
intervals of time and at a rate equal to or more
than twice the highest signal frequency in the
band, then the sample contains all the information
of the original signal'.
fs  2fH
fs – Sampling Frequency;
fH is the highest frequency in the band.
Let us assume that the voice signals are
band‑limited to 0 to 4 kHz, then the sampling
frequency may be 8 kHz. Hence, the time period of
sampling
Ts = 1/8000 sec. = 125 microseconds
If we have just one channel, then the signal
can be sampled every 125 microseconds. But,
if N channels are sampled, one by one, at the
rate specified by the sampling theorem, then
the time available for sampling each channel
would be equal to Ts / N.
 Quantizing
In PCM system, PAM signals are converted into
digital form by Quantization. The discrete level of
each sampled signal is quantified with reference to
a certain specified level of an amplitude scale.

Quantizing, is also defined as a process of

breaking down a continuous amplitude range
into a finite number of amplitude values or
steps.
A sampled signal exists only at discrete times
but its amplitude is drawn from a continuous
range of amplitudes of an analogue signal.
Hence, an infinite number of amplitude values
are possible. However, a suitable finite
number of discrete values can be used to get
an approximation of the infinite set.
The discrete value of a sample is measured by
comparing it with a scale, having a finite
number of intervals called the 'quantizing
intervals' and identifying the interval in which
the sample lies.
For example, a 0.1 volt signal can be divided
into 10 mv ranges, like 0‑ 10 mv, 10-­20mv,
20‑30 mv, 30‑40 mv, and so on. The interval
0‑10 mv may be designated as level 0, 10‑20
mv as level 1, 20‑30 mv as level 2, etc
For transmission, these levels are given a binary
code. This process is called encoding. In practical
systems, quantizing and encoding are a combined
process
 Quantization levels

In order to quantize these five samples of the signal, the total

amplitude may be divided into eight ranges or intervals.
Samples ‘a’ lies in the range 5. Accordingly, the quantizing
process will assign a binary code corresponding to 5, i.e., 101.
Similarly, codes are assigned for other samples also. Here the
quantizing intervals are of the same size, hence, it is called
Linear Quantizing.
Quantizing has to be done for both positive and negative swings
 Relation between Binary Codes and
Number of levels

Because the quantized samples are coded in

binary form, the quantization intervals are in
powers of 2.
Practical PCM systems use an eight bit code
with the first bit as sign bit.
It means that there are 28 = 256 levels for
quantizing, 128 in the positive direction and 128
in the negative direction.
 Quantization Distortion
Analogue Quantizing Binary Decoded Maximum
Signal Level Code O/P Error
amplitude
Range

0 – 10 mV 0 1000 5mV  5mV

10 – 20 mV 1 1001 15 mV  5mV
20 – 30 mV 2 1010 25 mV  5mV
30 – 40 mV 3 1011 35 mV  5mV
40 – 50 mV 4 1100 45 mV  5mV
In quantization, the lower value of each interval
is assigned to a sample falling in that particular
interval.

At the receiving end, the mid value of the

interval is assigned, while decoding.
If a sample has an amplitude, say 23 mV or 28 mV, it
will be assigned the level 2, in either case.
This is represented in binary code as 1010. When
these are decoded at the receiving end, the decoder
will convert them into analogue signals of amplitude
25mV each.
Thus, the process of quantization leads to an
approximation of the input signal with some deviations
in amplitude.
These deviations, between the amplitudes of samples
at the transmitting and the receiving ends, i.e., the
difference between the actual value and the
reconstructed value, gives rise to quantization error of
distortion.
One way to reduce quantization noise is to increase the amount of
quantization intervals. The difference between the input signal
amplitude height and the quantization interval decreases as the
quantization intervals are increased (increases in the intervals
decrease the quantization noise). However, the amount of code
words also need to be increased in proportion to the increase in
quantization intervals
 Non Linear Quantization

In linear quantization, equal step size results in equal

error for all amplitudes. Thus, the signal to noise ratio for
weaker signals will be poorer in comparison with signal
to noise ratio for stronger signals.
To reduce this error, it is, therefore, necessary to reduce
step size. In other words, the number of steps in the
given amplitude range should be increased.
This would however, increase the transmission
bandwidth because bandwidth is B = fH log N,
Where N is the number of quantum steps and f H is the
highest signal frequency.
But as per the speech statistics, the probability of
occurrence of small amplitude is much greater than
that a large one. It, therefore, seems appropriate to
provide more quantum levels
( VL = low value) in the small amplitude region and
only a fewer quantum levels (VH = high value) in the
region of higher amplitudes.
In this case, no increase in transmission bandwidth
will be required, provided that the total number of
specified levels remains unchanged.
This will also bring about uniformity in signal to noise
ratio at all levels of input signal. This type of
quantization is called Non linear Quantization,
Segmented Companding Curve
In practice, non linear quantization is achieved
using segmented quantization. There are equal
number of segments for both positive and negative
excursions. In order to specify the location of a
sample value it is necessary to know.

•Sign of the sample (positive or negative)

•Segment number

•Quantum level within the segment

.
Encoding Curve with Compression 8 bit code
As seen from Fig. the first two segments in either
polarity are collinear, i.e., the slope is the same
and hence, they may be considered as one
segment.

Thus, the total number of segments appears to be

13. However, for purpose of analysis, all the 16
segments are to be considered separately
 Companding
The non linearity introduced by the non‑
uniform quantizing can be neutralized by a
reverse procedure.

As the non linearity, before the transmission, is

achieved by 'compressing' the signal, it can be
neutralized by 'expanding' the received signal.

Hence, the procedure is called 'companding',

in short.
 Encoding

Conversion of quantized analogue samples to

binary signal is called encoding.

To represent 256 steps, an 8‑bit code is

required. This 8 bit code is also called as
word. The 8‑bit word appears in the form
 P ABC WXYZ
Polarity bit Segment Step number in
‘1’ for +ve code the segment
‘0’ for –ve
The MSB indicates the sign of the sample. Next 3
bits indicate one out of eight segment numbers.
Last 4 bits indicate one out of 16 positions in the
segment. A . voltage 'Vc' will be encoded as
11110101
The quantizing and encoding are done by a
circuit called coder. The coder converts PAM
signals, into an 8 bit binary code,
 Line codes
In a digital system, the data streams originating from
Primary MUX equipment are first connected to higher
order MUX equipment and then to radio. Thus the
encoded output of the PCM equipment is transmitted
over VF cable pair or unbalanced wire before entering
the transmission medium. On these interconnecting
cables the signal is likely to undergo high frequency
attenuation, distortion and cross talk. More over the
signal has a strong dc content and thus prevents the use
of ac-coupled circuits.
For distortion free transmission, the encoder output
should be converted into a suitable code which will
match the characteristics of the medium. This code is
called the LINE CODE.
CHARACTERISTICS OF LINE CODES
Restricted band width
Low energy in the upper part of the signal
spectrum to reduce attenuation distortion
Low energy in the lower part of the spectrum
to reduce crosstalk
No dc component so that transformers can be
used for coupling purposes
Contain adequate timing information
Have an in built error monitoring capability
 Line Coding
•PCM code generated by the CODEC function is in
Non-Return to Zero (NRZ) format.
•It cannot effectively be transmitted directly on a
transmission line because the signal contains a DC
component and lacks timing information.
•An additional coding step is necessary which
converts NRZ code to a pseudo ternary code
suitable for transmission.
• Practical coding schemes include Alternate Mark
Inversion (AMI),Bipolar with N Zero Substitution
(BNZS), and High Density Bipolar 3 (HDB3) coding.
These schemes eliminate the DC component of
NRZ code, thereby eliminating the troublesome DC
wander phenomenon.
 TYPES OF LINE CODES
Non-return-to-zero NRZ binary
Return to Zero RZ binary
Bipolar(AMI) Alternate Mark Inversion
HDB-3 High Density Bipolar order of 3
 Line Coding (continued)
Return-to-zero (RZ) describes a line code used in
telecommunications signals in which the signal drops
(returns) to zero between each pulse. This takes place
even if a number of consecutive 0's or 1's occur in the
signal. The signal is self-clocking. This means that a
separate clock does not need to be sent alongside the
signal, but suffers from using twice the bandwidth to
achieve the same data-rate as compared to
non-return-to-zero format.
Line Coding (continued)
non-return-to-zero (NRZ) line code is a binary code in
which 1's are represented by one significant condition
(usually a positive voltage) and 0's are represented by
some other significant condition (usually a negative
voltage), with no other neutral or rest condition. The
pulses have more energy than a RZ code. Unlike RZ, NRZ
does not have a rest state. NRZ is not inherently a
self-synchronizing code,
Binary & AMI Codes
AMI code was first devised by Barker, and became
popular when it was adapted by Bell Telephone Lab for
PCM working. In U.S.A., it is often termed as Bipolar
signal.
In this code, successive marks (bit 1) are alternatively of
positive and negative polarity and equal in amplitude.
Space (bit 0) is of 0 amplitude. AMI coded signal
corresponding to a binary signal is illustrated in Fig. The
disadvantage of the AMI code is the absence of
significant timing information for long sequence of
zeros. Otherwise, it meets the remaining requirements
for the line code. The realization of code is also simple.
Bipolar violation technique is used to detect errors in
the line signal. It is used in 24 channel PCM system.
HDB-3 (High Density Bipolar of Order 3) Code:
To overcome the shortcomings of AMI code, HDB-3 code
has been devised. It makes a substitution on binary
formations containing more than 3 zeros. This
substitution must obey the following rules.
¨ The fourth zero is converted to 1 (mark) with the same
polarity as immediately preceding mark, thus violation is
introduced. This bit is known as Violation (V) bit.
¨ The V bit, i.e., the 1 placed in place of 4th zero, must
be of opposite polarity to the previous V bit.
HDB-3 signal corresponding to a binary signal is shown in
Fig.
The steps for conversion of a unipolar binary signal into an
HDB ‑ 3 code are as under.

•Every 4th zero is replaced by V bit.

•If the number of 1’s between two V bits is even, the first zero
of 4 consecutive zeros will also be made 1, called ‘B' bit, if the
number of I's between two V bits is even. In other words, a
combination of 0000 is converted to B00V or 000V depending
upon whether the number of 1's between two V bits is even or
odd, respectively.

•Data bits and B bits follow one bipolar rule and V bit follow
separate bipolar rule.

As the long sequence of zero is avoided, more timing

information is available in the signal. Code violation technique
is employed to detect errors.
Example 1 of HDB3 encoding
The pattern of bits
"10000110"
encoded in HDB3 is
"+000V−+0"
(the corresponding encoding using AMI is " + 0 0 0
0 − + ").
Example 2 of HDB3 encoding
The pattern of bits
"1010000011000011000000"
encoded in HDB3 is " + 0 − 0 0 0 V 0 + − B 0 0 V − +
B 0 0 V 0 0 " which is:
"+0−000−0+−+00+−+−00−00"
(the corresponding encoding using AMI is " + 0 − 0
0 0 0 0 + − 0 0 0 0 + − 0 0 0 0 0 0 ")
Example 3 of HDB3 encoding
The pattern of bits
"101000010000110000111000011110
0 0 0 1 0 1 0 0 0 0"
encoded in HDB3 is "+ 0 − 0 0 0 V + 0 0 0 V − + B 0 0 V + −
+ 0 0 0 V − + − + B 0 0 V + 0 − B 0 0 V " which is:
"+0−000−+000+−+−00−+−+000+−+−+−0
0−+0−+00+"
(the corresponding encoding using AMI is " + 0 − 0 0 0 0
+0000−+0000−+−0000+−+−0000+0−00
0 0 ")
TYPES OF INFORMATION SIGNALS
 VOICE
 DATA

DATA SIGNALS ARE REQUIRED TO BE

STRUCTURED INTO EIGHT BIT SIGNALS. NO
NEED OF FILTERING, SAMPLING, QUANTIZING
AND ENCODING.
AFTER CONVERTING THE SIGNALS INTO EIGHT
BIT SIGNALS FROM EACH OF THE VOICE AND
DATA CIRCUITS THEY ARE STRUCTURED OR
ORGANISED IN A SEQUENTIAL ORDER INTO A
TIME FRAME, CALLED PCM FRAME. FOR THE
GENERATION OF PCM TIME FRAME TWO
SYSTEMS ARE IN USE.
T1 SYSTEM FOLLOWED BY USA, CANADA AND
JAPAN.
E1 SYSTEM FOLLOWED BY EUROPEAN
COUNTRIES AND INDIA.

T1 SYSTEM IS A MULTIPLEXING STRUCTURE OF

24 CHANNELS AND E1 SYSTEM IS 30 CHANNELS
 PCM Frame
The sampling pulse has a repetition rate of Ts secs. and
a pulse width of ts. When a sampling pulse arrives, the
sampling gate remains open during the time ts and
remains closed till the next pulse arrives.

It means that a channel is activated for the duration ts.

Since Ts is much larger than ts, a number of channels
may be sampled, each for a duration of ts within the time
Ts .

With reference to Fig. the first sample of the first channel

is taken by pulse 'a' encoded and is passed on to the
combiner. Then the first sample of the second channel is
taken by pulse ‘b’ encoded and passed on to the
Likewise, the remaining channels are also
sampled sequentially and are encoded
before being fed to the combiner. After the
first sample of the nth channel is taken and
processed, the second sample of the first
channel is taken, followed by second
sample of second channel, and so on.

The collection of all the samples taken

within the duration Ts, is called a "frame".
Thus the set of first samples of all channels
is one frame, the set of second samples is
second frame, and so on.
 2 Mbit/s Frame Structures

signalli
ng
inform
ation
encoded voice / data signals encoded voice / data signals
TS0 TS1 TS2 …. …… …… …… …… TS16 … … … … … TS30 TS31
. … … … … …
 Bit Rate
Sometimes, the system may also be designated by
its bit rate. It is denoted by the total number of bits
transmitted every second. For a 30 channel system,
there are 32 timeslots in each frame. Each timeslot
carries an eight bit word. Hence,
Total number of bits per frame = 32 x 8 = 256
As the sampling frequency is 8 kHz, the frequency of
frames is also 8000/sec.
Therefore, total number of bits in one second :
256 x 8000 = 2, 048,000 = 2048 k bits

Hence, a 30 channel PCM system is also designated

as 2048 k bps system or 2.048 Mbps system.
THE PCM TIME FRAME FOR E1 SYSTEM
CONSISTS OF 32 TIME INTERVALS WHICH
ENABLES TO MULTIPLEX 30 VOICE OR DATA
CIRCUITS OR A COMBINATION THERE OF.
EACH TIME INTERVAL IS CALLED A TIME SLOT.
THE DURATION OF TIME SLOT IS 3.9 MICRO-
SECONDS.
THE DURATION OF PCM TIME FRAME IS 125
MICRO-SECONDS.
EACH TIME FRAME IS A MULTIPLEXING
STRUCTURE OF 30 CIRCUITS.
OUT OF 32 TIME SLOTS 30 TIME SLOTS ARE
ALLOCATED FOR INFORMATION SIGNALS COMING
FROM 30 CIRCUITS AND TWO TIME SLOTS ARE
RESERVED EXCLUSIVELY FOR DEDICATED
SERVICES. THEY ARE:

 FRAME ALIGNEMENT SIGNAL OR WORD

(FAS/FAW)
 NOT FRAME ALIGNEMENT SIGNAL (NFAS)
 MULTI-FRAME ALIGNMENT SIGNAL OR WORD
(MFAW/MFAS)
 SIGNALLING INFORMATION OF 30 VOICE
CIRCUITS
 TS0 TS1 TS2 …. …… …… …… …… TS16 … … … … … TS30 TS31
. … … … … …

FRAME-0
ALLOCATION OF TIME SLOTS
TS-0 FOR FAS/FAW
TS-16 FOR MFAS/MFAW
TS-1 TO TS-15 AND TS-17 TO TS-31 ARE
FOR 1ST SAMPLES OF CH-1 TO CH-30
 TS0 TS1 TS2 …. …… …… …… …… TS16 … … … … … TS30 TS31
. … … … … …

FRAME-1
ALLOCATION OF TIME SLOTS
TS-0 FOR NFAS/NFAW
TS-16 FOR SIGNALLING INFORMATION
OF CH-1 AND CH-16
TS-1 TO TS-15 AND TS-17 TO TS-31 ARE
FOR 2ND SET OF SAMPLES OF CH-1 TO
CH-30
 TS0 TS1 TS2 …. …… …… …… …… TS16 … … … … … TS30 TS31
. … … … … …

FRAME-2
ALLOCATION OF TIME SLOTS
TS-0 FOR FAS/FAW
TS-16 FOR SIGNALLING INFORMATION
OF CH-2 AND CH-17
TS-1 TO TS-15 AND TS-17 TO TS-31 ARE
FOR 3RD SET OF SAMPLES OF CH-1 TO
CH-30
IN THIS MANNER A MULTIFRAME STRUCTURE IS
FORMED WHICH CONTAINS A SET OF 16 FRAMES.
IN THIS STRUCTURE TS-0 OF ALL EVEN NUMBERED
FRAMES WILL CARRY FAS/FAW SIGNAL AND ALL
ODD NUMBERED FRAMES WILL CARRY NFAS/NFAW
SIGNAL.
TS-16 OF FRAME ZERO WILL CARRY MFAS/MFAW
SIGNAL.
FRAME -1 TO FRAME-15 WILL CARRY THE
SIGNALLING INFORMATION OF ALL 30 CHANNELS
 TS0 TS1 TS2 …. …… …… …… …… TS16 … … … … … TS30 TS31
F-0 . … … … … …

TS0 TS1 TS2 …. …… …… …… …… TS16 … … … … … TS30 TS31

F-1 . … … … … …

TS0 TS1 TS2 …. …… …… …… …… TS16 … … … … … TS30 TS31

F-2 . … … … … …

.
.
.
.
.
.
.

TS0 TS1 TS2 …. …… …… …… …… TS16 … … … … … TS30 TS31

F-15 . … … … … …

MULTI-FRAME STRUCTURE
FAS
X 0 0 1 1 0 1 1
Bit 1: X Reserved for international use.
It is normally set to 1
NFAS
X 1 A Sa4 Sa5 Sa6 Sa7 Sa8

Bit 1: X Reserved for international use. It is

normally set to 1
Bit 2: is set to 1
Bit 3: A shows the remote alarm indication
Bits 4 to 8: are additional spare bits
Sa BITS
•CAN BE USED IN SPECIFIC POINT – TO - POINT
APPLICATIONS WITHIN NATIONAL BORDERS.
WHEN THESE BITS ARE NOT USED AND ON LINKS
CROSSING AN INTERNATIONAL BORDER THEY
SHOULD BE SET TO 1.
•BIT Sa4 MAY BE USED AS A MESSAGE-

BASED DATA LINK FOR OPERATIONS,

MAINTENANCE AND PERFORMANCE
MONITORING. THIS CHANNEL
ORIGINATES AT THE POINT WHERE THE
FRAME IS GENERATED AND
TERMINATES WHERE THE FRAME IS
SPLIT UP.
•THE MULTIPLEXER AT THE RECEIVING END WILL
SYNCHRONIZE ON TO THE INCOMING BIT STREAM
FROM THE MULTIPLEXER AT THE TRANSMITTING END
UNDER THE FOLLOWING CONDITIONS:
•CORRECT FAS 10011011, IS RECEIVED IN TIME SLOT 0
OF A FRAME.
•BIT 2 IN TIME SLOT 0 (NFAS) OF THE NEXT FRAME

RECEIVED MUST BE 1, i.e 1 1 A SA4 SA5 SA6 SA7 SA8

•FAS, 10011011, IS RECEIVED IN TIME SLOT 0 OF THE
SUBSEQUENT FRAME
THE MULTIPLEXER IS SYNCHRONIZED ON TO
THE INCOMING FRAMES ONLY IF ALL THE

THREE CONDITIONS ARE FULFILLED.

TS-16 of Frame Zero

0 0 0 0 X Y X X

MFAS/MFAW NMFAS/NMFAW
Multiframe alignment signal = 0 0 0 0
Not Multiframe alignment signal
X = reserved bit normally set to 1
Y = distant multiframe alarm bit
INTERCHANGE OF SIGNALING IN THE
FORWARD AND BACKWARD
DIRECTIONS IS ACCOMPLISHED USING
BITS THAT ONLY CHANGE STATE
SLOWLY. IT IS THEREFORE SUFFICIENT
TO TRANSMIT THESE RELATIVELY
STATIC SIGNALING BITS AT A RATE OF 2
Kbit/s FOR EACH CHANNEL.
AS A RESULT, THE 64KBIT/S CAPACITY
OF TIME SLOT 16 IS DIVIDED
BETWEEN 30 CHANNELS AND TWO
AUXILIARY CHANNELS FOR
SYNCHRONIZATION AND ALARMS. A
SIGNALING MULTIFRAME IS FORMED
WHICH COMPRISES 16 NORMAL PCM
FRAMES, NUMBERED AS F 0 TO F 15
EACH SIGNALING TIME SLOT OF THE
MULTIFRAME HAS A TRANSMISSION
CAPACITY OF 4 K bit/s. EACH OF
THESE TIME SLOTS IS SUBDIVIDED TO
INCLUDE TWO CHANNEL’S SIGNALING
INFORMATION, GIVING A SIGNALING
RATE PER CHANNEL OF 2 K bit/s.
 64 K bit/s: 16 SIGNALLING TIME SLOTS
= 4 K bit/s PER TIME SLOT

Signalling time slot

4 Kbit/s
Ch-N 2 Kbit/s CH-N+15 2 Kbit/s
FROM THE ABOVE DISCUSSION IT IS
CLEAR THAT THE INFORMATION SIGNALS ,
SIGNALLING INFORMATION, FAS, MFAS
AND NFAS ARE STRUCTED INTO A
MULTIFRAME. THIS MULTIFRAME
CONTAINS 4096 BITS AND IS
TRANSMITTED IN A DURATION OF 2 MILLI-
SECONDS AFTER PERFORMING LINE
CODING.
THEREFORE THE NUMBER OF BITS
TRANSMITTED IN A DURATION OF ONE
SECOND IS 2048000 i.e. 2.048 M bits/s
WHICH IS THE TRANSMISSION RATE OF
THE SYSTEM.
A SYSTEM WHICH IS CAPABLE OF
TRANSMITTING THE MULTIPLEXED
SIGNAL OF 30 INFORMATION SIGNALS AT
A RATE OF 2.048 M bits/s IS CALLED AS
30 CH PRIMARY MULTIPLEXING SYSTEM.
 Types of MUX Equipment
Primary MUX Equipment
The 30 channel PCM multiplexing equipment has
been designed to convert speech and signaling
information at the transmit end of 30 channels
(channel can be voice or data at 64 kbps or aggregate
of low-speed data channels < 64 kbps) into a single
digital output bit stream of 2048 K bits/sec.
 At the receiving end all the original information will
be extracted by proper De multiplexing operations
from the incoming digital bit stream. This system
provides the local /trunk exchanges with various
signaling capabilities for different types of exchange
equipment
The performance of 30 channel PCM multiplexing
equipment confirms to the ITU (T)
Recommendations G 703, G 711, G 712 and
G 732.
In primary MUX, there are two varieties :
1. Non-programmable terminal type
2. Programmable drop-insert type

Nowadays, all Primary MUX es being used are

Programmable Drop-Insert MUX es only.
THE PRIMARY MULTIPLEXING
SYSTEMS ARE CLASSIFIED INTO
TWO TYPES.
TERMINAL MULTIPLEXER
D/I MULTIPLEXER
TERMINAL MULTIPLEXER

A TERMINAL MULTIPLEXER
MULTIPLEXES ALL THE 30 VOICE/DATA
CIRCUITS INTO A STANDARD PCM
SIGNAL OF 2.048 M bit/s AND
INTERFACES ONE DIRECTION FOR
TRANSMISSION AND RECEPTION. THIS
TYPE OF MULTIPLEXING SYSTEM IS
USED AT THE END STATIONS.
 MUX 2.048 M bit/s

INTERNAL BUS

USER
INTERFACES

TERMINAL MULTIPLEXER
DROP-INSERT MULTIPLEXER

A DROP-INSERT MULTIPLEXER
MULTIPLEXES ALL THE 30 VOICE/DATA
CIRCUITS INTO TWO STANDARD PCM
SIGNALS OF 2.048 M bit/s EACH AND
INTERFACES TWO DIRECTIONS FOR
TRANSMISSION AND RECEPTION. THIS
TYPE OF MULTIPLEXING SYSTEM IS
USED AT THE INTERMEDIATE
STATIONS.
 2.048 M bit/s MUX 2.048 M bit/s
Aggregate Aggregate

INTERNAL BUS

30 analog or
USER digital or a
INTERFACES combination of
both channels

D/I MULTIPLEXER
 Drop Insert Mux:.
Drop-Insert MUX has two aggregate 2048 kbps
links. Each link has transmit and receive paths.
The 30 channels on the channel side can be
mapped to either of the two aggregate links.
Also mapping of channels from one aggregate
link to the other aggregate link is possible.
These mapping functions are otherwise known
as “Cross Connections”.
 Skip MUX
Skip MUX or 2/34 MUX multiplexes 4 E1s
to E2 and 4 E2s to E3 (34.368 Mbps).
Since outside access is not provided at E2
or 8.448 Mbps level, it is called Skip-MUX

SKIP
2.048Mbps channels MUX
SKIP MUX
34 Mbps
16 nos digital

Aggregate side
Channel side
Trans MUX
Trans MUX is used for converting analog
voice channels of 312 – 552 (one super
group) into PCM 2048 Kbps and vice
versa.

AUTO Trans Analog

PCM
EXCHANGE p MuxT A
Radio
MUX
 Higher hierarchical levels
As is the case with level 1 of the plesiochronous
digital hierarchy (2 Mbit/s), the higher levels also use
a frame structure that begins with a frame alignment
signal (FAS), with the difference that, at these levels,
multiplexing is carried out bit-by-bit (unlike the
multiplexing of 64 kbit/s channels in a 2 Mbit/s signal,
which is byte-by-byte), thus making it impossible to
identify the lower level frames inside a higher level
frame.
Recovering the tributary frames requires the
signal to be demultiplexed. The higher
hierarchical levels ( 2, 34 and 140 Mbit/s) are
obtained by multiplexing 4 lower level frames
within a frame whose nominal transmission rate
is more than 4 times that of the lower level in
order to leave room for the permitted variations
in rate (justification bits), as well as the
corresponding FAS and alarm and spare bits
 Digital Multiplexing Hierarchies
There are 3 generations
1. Plesiochronous Digital Hierarchy (PDH)
2. Synchronous Digital Hierarchy (SDH)
3. Optical Transport Hierarchy (OTH)
In Plesiochronous digital hierarchy, at each hierarchical
level, digital streams nominally at the same clock-rate
but with the range of variation within a certain
specified limits are multiplexed to form digital stream
of next hierarchical level
 PDH transmission is used on Digital MW Radio
networks as well as OFC networks. However,
PDH links on OFC are being replaced with SDH
links.
In synchronous digital hierarchy, at each
hierarchical level, synchronous transport module
is formed with information pay-load and
overhead bits and a synchronizing mechanism is
in-built to ensure all network elements work to a
master clock reference. In this hierarchy, the data
rate of next stage is exact multiple of previous
stage data rate. SDH transmission is used on OFC
links and in a very limited way on Digital Radios
In optical transport hierarchy, optical data units
and then optical transport units are formed as
data frames. Such units are transported on every
wavelength of the Wave Division Multiplexing
(WDM) plan on optical fiber.

In PDH, two systems are recommended in ITU-T

recommendation G.702, based on different first
level bit rates 2048 Kbps & 1544 Kbps. The
internationally agreed maximum level is level 4
for international interconnections. Levels higher
than this are not mentioned in the
recommendation
 PDH Systems Worldwide
Japan USA Europe

5. 397200 kbit/s 564992 kbit/s

x4 x4

4. 97728 kbit/s 274176 kbit/s 139264 kbit/s

x3
x3 x6 x4

3. 32064 kbit/s 44736 kbit/s 34368 kbit/s

x4
x5 x7
6312 kbit/s 8448 kbit/s

x4 x3 x4

2. order 1544 kbit/s 2048 kbit/s

x 24 x 30/31

64 kbit/s
primary rate
 Higher order PCM Systems used IN INDIA
Higher order PCM systems are designed for the trunk network, by
assembling primary blocks of 30 channels of 2.048 M b/s in a
hierarchical fashion similar to analogue groups, sub­groups and
super groups of FDM. Digital hierarchy, recommended by ITU-T, is
shown in Fig
 PDH Hierarchies
S. No. Order of Mux. Bit rates No. of Channels

1. First Order 2048kbit/s 30

2. Second Order 8448kbit/s 120

3. Third Order 34368kbit/s 480

4. Fourth Order 139264kbit/s 1920

5. Fifth Order 565Mbit/s` 7680

 PDH Europe

64 7680 ch Europe
kbits/s 1920 ch 564.992
480 ch 139.264 Mbit/s
34.368 Mb/s
120 ch Mb/s x4
30 ch 8.44Mb/s x4
x30 2.048 Mb/s x4
x
4
 Interleaving
• The multiplexing of several tributaries can be
achieved by either
• Bit by bit multiplexing (bit interleaving)
• Word by word multiplexing (byte interleaving)
 BIT INTERLEAVING
• There are four bit streams to be multiplexed.
One bit is sequentially taken from each
tributary so that the resulting multiplexed bit
stream has every fifth bit coming from the
same tributary. A specific no. of bits (usually
8), forming a word, are taken from each
tributary in turn.
BIT INTERLEAVING
 Byte Interleaving
• Byte interleaving sets some restraints on the
frame structure of the tributaries and require
great amount of memory capacity.
• Bit interleaving is much simpler because it is
independent of frame structure and also
requires less memory capacity.
BYTE INTERLEAVING

Word by Word MULTIPLEXING

 PDH Features
• Every tributary has its own clock. Every tributary is
timed with plesiochronous frequency, that is a
nominal frequency about which the shifts around it
within prefixed limits. For example, the primary
multiplexer output is 2.048 Mb/s +/- 50ppm.
• To account for the small variations of the tributaries
frequencies about the nominal value when
multiplexing four tributaries to the next hierarchy
level, a process known as positive stuffing (also
known as positive justification) is used.
 Positive Pulse stuffing or justification
• Pulse stuffing involves intentionally making the
output bit rate of a channel higher than the input
rate. The output channel therefore contains all the
input data plus a variable number of “stuffed bits’
that are not part of the incoming subscriber
information.
• The stuffed bits are inserted at the specific
locations, to pad the input bit stream to the higher
output bit rate. This stuffed bits must be identified
at the receiving end so that “de-stuffing” can be
done to recover the original bit stream.
 justification
• . This process is to enable the multiplexer and demultiplexer
to maintain correct operation, although the input signals of
the tributaries entering the multiplexer may drift relative to
each other. In positive justification the transmitted digit
rate per tributary is slightly higher than the nominal input
rate. If an input tributary is slower, a dummy (fictive), i.e. a
justification digit, is added to maintain the correct output
digit rate. If the input tributary speeds up, no justification
digit is added. The demultiplexer must remove the
justification digits, in order to send the correct sequence of
signal digits to the output tributary. Consequently, further
additional digits, called justification service digits, must be
added to the frame for the multiplexer to signal to the
demultiplexer whether a justification digit has been used
for each tributary.
In negative justification, instead of dummy digits being
inserted when the digit rate of a tributary is too slow, a
data digit is occasionally removed when a tributary is
too fast and is transmitted in a spare time slot. Another
option is to use both positive / zero / negative
justification. The European PDH uses only positive
justification.
 BIT INTERLEAVING
• SIMPLIFIED SDH MULTIPLEXING
SYNCHRONOUS BYE INTERLEAVING
(No Stuffing needed)

HIGR ORDER
MULTIPLEXER
 De-stuffing at Receive side
• At the receiving end the writing clock has the same
characteristics as those of the transmit reading clock.
That is, it has a frequency that is on average the
same as that of the tributary, but it presents periodic
spaces for the frame structure and random spaces
for the stuffing process. A phase lock loop (PLL)
circuit is used to reduce,
• Jitter caused by the frame structure
• Higher frequency jitter components (waiting time)
caused by stuffing
• Tributary signal jitter
• Jitter introduced by the 6.312 Mb/s link.
 What is jitter?

Jitter free
clock
(ideal)

jittered
clock

phase-
deviation

time
 What is jitter?

- Jitter are not constant short time variations of the

points of time compared with the equidistant,
ideal
points of time of digital signals, or more simple,
not constant phase variations of the clock signal.
 What is wander?
amplitude / dB

10 Hz
wander range jitter range

Hz MHz
frequency
 What is wander?

Physically wander is the same like a jitter, the only

difference is in the definition:

- Jitter with a frequency below 10 Hz are called
wander.
- Phase variations of clock signals are divided into

these two groups because low frequency

phase variations have different behavior in
networks.
 Which problems do jittered
signals cause in networks?

data bits 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

sampling 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
point of time

misinterpretation of information
 Which problems do jittered
signals cause in networks?
- Jittered signals cause misinterpretation of
information in digital networks.
- If the sampling point of time runs out of the maximal
tolerable value the bits will be misinterpreted either
by sampling one bit twice (7,8) or by leaving one bit
out (10,11). The consequence can be a immediate
loss of the synchronization of all following lower
multiplex levels and therefore a complete failure of
the following transmission network.
- As long as the deviation don’t trespass the critical
level, mistakes do not occur (critical factor:
deviation wander).
- The higher the transmission rate is the higher is the
jitter-sensitivity of a transmission system. Therefore
higher quality of the transport signal is required.
 Units

main values:
- amplitude
- frequency

Unit interval

1UI
 Units
Jitter is characterized by two main values:
- Amplitude: deflection of signal edge deviation (“how far”)
- Frequency: frequency of signal edge deviation (“how
fast”)
- The jitter unit of measuring the deviation of the
signal edge is UI (unit interval).
- The unit interval is a relative measurement unit
referring to the length of a single bit and is therefore
independent of signal type and bit rate.
- This fact is very important to make signals from
different hierarchies comparable.
 What causes jitter?

different influences different jitters

Jitter types:
1. Systematic jitter (pattern dependent)

2. Non systematic jitter (pattern independent)

3. System conditional:
- Pointer jitter
- Mapping jitter
- Stuffing and waiting time jitter
- Jitters are caused by all influences that lead to a
deviation of the edges of data signal and clock.

- Due to the fact that these influences may be very

different, jitters are divided into groups and
described by their causes.
 Summary
1. systematic jitter: phys. & opt. effects & bit string dependent
2. unsystematic jitter: phys. & opt. effects & bit string independent
3. system conditional jitter:
· stuffing & waiting time jitter:
- PDH world
- MUX/DEMUX interfaces
· mapping jitter:
- data-gaps sampling dropouts
- mapping/demapping interfaces
· pointer jitter:
- pointer carry can for “unsynchronity”
- data amount sampling rate
- pointer + mapping = combined
Accumulation and intrinsic jitter
NE systematic
with and non NE
jitterfre with
e signal intrin systematic intrinsic
sic jitter jitter
influences
jitter
systematic
and non
systematic
jitter
influences
NE
additive jitter increase with
intrinsic
jitter

additiv jitter =
systematic jitter
+ non systematic jitter
+ system conditional jitter
+ intrinsic jitter
Where are the jitter sources in a
transmission chain?

Po
MU MU

r
int
e
X i nt X

e
P o
r

PDH SDH PDH

mapping jitter pointer jitter Accumulation of jitter pointer jitter stuffing and waiting
time jitter
 Where are the jitter sources in a transmission chain?

- Mapping Jitter caused by justification processes.

- Pointer Jitter caused by pointer actions.
- Jitter gain caused by accumulation of Jitter.
- Stuffing and waiting time Jitter caused by
stuffing techniques.
 Interpretation of Jitter results
Jitter Source results in (tendency):
Noise high frequency
Pattern high frequency
i.e. 8 kHz for frame alignment
Mapping/Stuffing low frequency, low amplitude
Pointer low frequency, high amplitude
Crosstalk jitter peaks, high frequency
Reflections high frequency
 Wander influences

- Wander accumulation

- Extreme exactly synchronization signals (PRC)

What is the consequence for the user?

Problem List (protocol dependent)

Voice Audible click
Data Retransmitted and/or damaged data
Video Frozen and/or loss of image
Mobile Dropped calls
Phone
Internet Packet loss
 Wander influences
- Wander (low frequency jitter) which do not
trespass the critical level (no mistakes) can also
endanger the error free transmission, because it
has the property to accumulate in networks to
higher levels
(see accumulation slides).
- Accumulation of wander is higher than the
accumulation of jitter (PLL circuits).
- The more slower a phase variation is the harder it
is to detect. Jitter-reducing circuits are included in
today's network elements, but they don’t work
very well with slow wanders. Extreme exactly
synchronization signals (PRC) are necessary to
detect a wander.
 How to measure jitter and wander?

Standard tests are:

Jitter:
- Output jitter
- Maximum tolerable jitter
- Jitter transfer function
- Mapping jitter
- Pointer jitter
- Phase hit measurement

Wander:
- Wander tolerance
- Maximal tolerable wander
- Time interval error
- MTIE & TDEV
 Output jitter

ANT-20
DUT

jitter / UIpp jitter

amplitude
(peak-peak)

+ peak

time
- peak

measurement time
5MHz 1kHz

frequency
x y

real ideal
 Maximum tolerable jitter

jitter generator
ANT-20

jitter analyzer
DUT

UI Measuring Points

jitter frequency = jitter tolerance

jitter frequency
 Jitter transfer function

H(f) = 20 lg * ( output jitter / input jitter) dB

Wander measurement
Jitter & Wander in PDH Networks
Jitter is an unwanted variation of one or more
characteristics of a periodic signal.
Jitter and wander are defined respectively as the
short term and long term variations of the
significant instant of a digital signal from their ideal
positions in time
Jitter may be seen in characteristics such as
the interval between successive pulses, or the
amplitude, frequency, or phase of successive
cycles
Pictorial Representation Of Jitter And Its Effect On Digital Signal
This means that, if
The instantaneous jitter amplitude is
1 microsecond in a 100 KHz square wave
The period of frequency T=1/f = 1second / 100
KHz = 10  sec
For a timing signal to differentiate between what
is a mark and what is space, the Unit Interval
between the significant instants = 5  sec

Jitter Amplitude = 1 sec / 5  sec = 0.2 UI.

 Sources of Jitter

In a digital transmission system, jitter may take

place due to a variety of sources

The majority of these sources fall in the categories

as listed below:
•Very low frequency jitter:
•Variations in the propagation delays.
•Slowly changing temperature delays.
Low frequency jitter:
•Inherent instabilities of clock sources.
Noise induced jitter:
•Phase noise in crystal controlled oscillator circuits
used in clocks through out the system.
•Noise in logic circuits.
Multiplex induced jitter:
•Insertion and removal of justification bits and
framing digits.
•Jitter on the regenerated bit streams: Inter symbol
interference
•Regenerator Jitter: Imperfect timing recovery at
the regenerators.
Effects of Jitter
The accumulation of jitter should be
prevented. The equipment should be so
designed that its tolerance limits should be
able to accommodate, the jitter generated by
the preceding equipment and system. If it is
not done, the accumulated jitter can cause
the following impairments. ITU -T
recommendation G.823.
Jitter limits appropriate to digital equipments

For individual digital equipments, the jitter performance

is specified in three ways.

•Maximum output jitter in the absence of input jitter

(intrinsic jitter).

•Jitter and wander tolerance of digital input ports

(tolerable input jitter).

•Jitter transfer characteristic.

Jitter tolerance Of Digital Input Port

Graphical presentation of input jitter tolerance

 Jitter Transfer Characteristic
Jitter present at the input port of an equipment may in
many cases be partially transmitted to the output port. In
passing through the equipment the higher jitter
frequencies are usually attenuated, whereas the lower
frequency jitter may not be. The jitter transfer
characteristic provided in the ITU-T recommendations take
the form of a mask which indicates the permissible jitter
gain versus frequency for particular items of equipment or
systems
THANK YOU