EMBEDDED SYSTEM

DESIGN

Dr. Prameela Kumari N

 Embedded System ------ Definition

•Electronic/ ElectroMechanical System

•Designed to perform a Specific Function

•Combination of Both Firmware and Hardware

General Purpose Computing
System
Generic Hardware and General
purpose operating system for
executing a variety of
applications
General Purpose Operating
System
Applications are alterable by the
user…..
Reinstall OS
Add or Remove User applications
Performance is the key selection
Embedded System
Special purpose Hardware and
Embedded OS for executing a
specific set of applications
May or may not contain an
Operating system for functioning
Firmware is preprogrammed and
unalterable by the user
Application specific requirements
General Purpose Computing
System
Performance is the key selection
factor
Faster is Better
Not at all tailored towards reduced Highly tailored to take advantage
operating power requirements,
options for different levels of
power management
Response requirement are not
time critical
Embedded System
Application specific requirements
such as performance, power
requirement, memory usage are
the key deciding factors
of power saving mode supported
by the hardware and operating
system
Certain cases response
requirements are very critical
 Criteria for Classification of Embedded System

•Based on Generations

•Complexity and Performance Requirements

•Based on Deterministic Behaviour

(Real Time System response can )

•Based on Triggering
( Reactive Systems can be event or Time Triggered)
 Generation

•First Generation – 8 Bit Microprocessor

or 4 Bit Microcontroller
Firmware developed in assembly code
Eg: Digital Telephone Keypads

•Second Generation -- 16 Bit Microprocessor

or 8 or 16 Bit Microcontroller
Comparatively complex instruction sets
Eg: Data Acquisition System
 Generation

•Third Generation-- 32 Bit Microprocessor

16 Bit Microcontroller
Application and Domain Specific Processor
Controller
Eg: DSPs, ASICs
Complex Instrucion set
Instruction pipelining
Market flodded by processors of different vendors
 Generation

•Fourth Generation– System on Chips

Reconfigurable Processors
Multicore Processors
High Performance
Tight Integration
Miniaturisation
Eg: Smart Phones, Mobile Internet
Devices
 Classification based an Complexity and Performance

Small Scale Embedded Systems

• Simple in application needs

• Performance requirements are not time critical

• Low performance and Low cost

• 8 or 16 Bit Microprocessor/ Microcontroller

• May or May not contain an Operating System

•Keyboard controller , Washing Machine

Medium Scale Embedded Systems
• Slightly Complex in application needs

• Medium Performance requirements and Low cost

•8 or 16 Bit Microprocessor/ Microcontroller/ Digital Signal

Processor

• Contains an Embedded Operating System

•Eg : ASIC, DSP

Large Scale Embedded Systems

Highly complex hardware and firmware requirements

Mission critical applications demanding high performance

32-bit or 64-bit processors/controllers/RISC processors/

RSoC/ Multicore Processor / PLDs

RTOS for scheduling, prioritization and management

Eg: Decoding and Encoding media applications

Calssification Based on Deterministic Behaviour

Applicable to Real Time Embedded systems

1. Soft Real time Systems

Missing a deadline may not be critical
Can be tolerated to a certain degree

2. Hard Real time systems

Missing a program/task execution time deadline
can have catastrophic consequences
financial, human loss of life, etc…
Classification based on Triggering

Event Triggered
Activities within the system are dynamic
e.g. Task run-times
Depend upon the occurrence of different events

Time triggered
Activities within the system follow a statically computed schedule e.g.
Allocated time slots during which they can take place
By nature are predictable.
Stand alone embedded systems
Do not require a host system like a computer
It works by itself
It takes the input from the input ports either analog or digital
processes, calculates and converts the data
gives the resulting data through the connected Device
Which either controls, drives and displays the connected devices
Examples:
Mp3 players
Digital cameras
Video game consoles
Microwave ovens and temperature measurement systems
Real Time Embedded Systems
A system which gives a required o/p in a particular time
These systems follow the time deadlines for completion of a task
They are classified as
Soft real time
Hard real time systems
Networked Embedded Systems
Connected to a network to provide output to other systems
Resources are Network accessed
Network can be LAN, WAN or the Internet
Connection can be any wired or wireless
Fastest growing area in embedded system applications
The Embedded web server is a type of system
wherein
All embedded devices are connected to a web server
Accessed and controlled by a web browser
Example
LAN networked embedded system
Home security system
wherein all sensors are connected and run on the protocol TCP/IP
Mobile Embedded Systems

These are small-sized systems

That are designed to be portable
Example
Digital cameras
Major Application Areas of Embedded Systems

Consumer electronics: Camcorders, Cameras etc…

Household appliances: Television, DVD players, washing

machine, fridge, microwave oven etc…

House automation and security system: Air conditioners,

sprinklers, intruder detection alarms, closed circuit television
cameras, fire alarms
Automotive Industry: Anti-lock breaking systems, engine
control, ignition system, automatic navigation systems

Telecom: Cellular Telephones, Telephone switches, Handset

multimedia applications.

Computer Peripherals: Printers, scanners, fax machines

Computer Networking Systems: Network routers, Switches,

hub, Routers
Healthcare: Different kinds of scanners, EEG, ECG machines.

Measurement and Instrumentation: Digital Multi meters, digital

CROs, Logic Analyzers

Banking and Retail: Automatic Teller Machines, Currency

Counters, Point of Sales

Card Readers:Barcode, Smart Card Readers, Hand Held Devices

 Purpose of an Embedded Systems

•Data Collection/ Storage/ Representation

•Data Communication

•Data(Signal) Processing

•Monitoring

•Control

•Application Specific User Interface

•Data Collection Storage & Representation
• Designed for the purpose of data collection

• Performs acquisition of data from the external world

• Data collection is usually done for storage, analysis, manipulation

and transmission

• Data can be either analog (continuous) or digital (discrete)

• Embedded systems with analog data capturing techniques collect data directly in the form of

analog signal

• whereas embedded systems with digital data collection mechanism converts the analog signal

to the digital signal using analog to digital (A/D) converters and then collects the binary

equivalent of the analog data.

• If the data is digital, it can be directly captured without any additional interface by digital

embedded systems.

• A digital camera is a typical example of an embedded system with data

collection/storage/representation of data.

• Images are captured and the captured image may be stored within the memory of the camera.
Data Communication
Embedded systems communicate with the outside world via peripherals

Some popular communication protocols in embedded system include

•SPI (Serial Peripheral Interface) Protocol

•I2C (Inter-Integrated Circuit) Protocol

•USART (Universal Synchronous/Asynchronous Receiver/Transmitter) Protocol

•CAN (Control Area Network) Protocol

•USB (Universal Serial Bus) Protocol

Embedded Systems act as

Dedicated Transmission Unit,

Between the sending and receiving terminals.

Offers Sophisticated functionalities such as

Data Packetizing,

Encryption and Decryption,

Network Hubs, Routers and Switches.

Data Processing

Data – Voice, Image, Video, Electrical Signals and other measurable

quantities collected by embedded systems may be used for various kinds of data
processing.

ES with Signal Processing functionalities are employed in applications

demanding signal processing like speech coding, synthesis, audio video codec

transmission applications etc…

Digital Hearing Aid …

Data Monitoring

Medical Domain Embedded Systems

Determine the state of variables using input sensors

They cannot impose control over variables

Electrocardiogram to monitor the heartbeat

Data Control
Impose control over some variables according to the changes in input
variables
Contains both Sensors and Actuators
Air Conitioner –
Room Temperature Sensing Element
Thermistor or Handheld Device
Air Compressor – Actuator
Input Variable - Current Room Temperature
Desired Temperature Set by the user
Controlling Variable –Cool air flow by the compressor unit
If the controlled variable and input variable are not the same, Controlling variable
tries to Equalise.
Application Specific User Interface
Buttons
Switches
Keypads
Lights
Bell Display Units
Graphic LCD module
System Speaker
Vibration alert
Smart Shoes with Adaptive Cushioning
Senses the cushioning level, using a sensor and a magnet

It then understands whether the cushioning level is

too soft or too firm via a small computer

Adapts with a motor-driven cable system to provide the

correct cushioning throughout the run
The shoe constantly adapts its shock-absorbing characteristics
To customize its value to the individual runner,
Depending on running style,
pace,
body weight,
and running surface.
The shoe uses a magnetic sensing system to measure cushioning
level, which is adjusted via a DSP that controls a motor-driven
cable system.
A Hall effect sensor is positioned at the top of the "cushioning
element,"
and the magnet is placed at the bottom of the element.
As the cushioning compresses on each impact,
the sensor measures the distance from top to bottom of mid-sole
(accurate to 0.1 mm).
About 1000 readings per second are taken and relayed to the
shoe's microprocessor.
The MPU is positioned under the arch of the shoe.
It runs an algorithm that compares the compression
messages received from the sensor to a preset range of
proper cushioning levels,
so it understands if the shoe is too soft or too firm.
Then the MPU sends a command to a micromotor,
housed in the mid-foot.
The micromotor turns a lead screw to lengthen or shorten a
cable secured to the walls of a plastic-cushioning element
When the cable is shortened, the cushioning element is pulled
taut and compresses very little. A longer cable allows for a more
cushioned feel. A replaceable 3-V battery powers the motor and
lasts for about 100 hours of running.
The core of the embedded system falls into any one of the
following categories
General Purpose and Domain Specific Processors
Microprocessors
Microcontrollers
Digital Signal Processors

Programmable Logic Devices (PLDs)

Application Specific Integrated Circuits (ASICs)

Commercial off the shelf Components (COTS)

 General Purpose and Domain Specific Processors

•Almost 80% of the embedded systems are processor/ controller

based

•The processor may be microprocessor or a microcontroller or

digital signal processor, depending on the domain and
application
Microprocessor

A silicon chip

Representing a Central Processing Unit (CPU),

capable of performing arithmetic as well as logical operations

according to a pre-defined set of Instructions

which is specific to the manufacturer

A CPU contains

Arithmetic and Logic Unit (ALU)

Control Unit

Working registers

Dependant unit
Requires the combination of other hardware like Memory, Timer Unit,
and Interrupt Controller etc for proper functioning
Different Instruction Set and Architecture are available for
designing a Microprocessor

Two common system architecture for processor design are

1. Von-Neumann architecture

2. Harvard architecture
Von-Neumann architecture

Shares a single common bus for fetching both instructions and data.

Program instructions and data are stored in a common main memory.

Harvard architecture

Separate data bus and instruction bus

Data transfer and Program fetching occurs simultaneously on both buses

Data memory can be read and written while the program memory is being
accessed

“Pre-fetching” - one instruction to execute while the next instruction is fetched

Microcontroller
A highly integrated silicon chip containing a CPU,
Scratch pad RAM,
Special and General purpose Register Arrays,
On Chip ROM/FLASH memory for program storage,
Timer and Interrupt control units
Dedicated I/O ports
Considered as a super set of Microprocessors
Can be general purpose
Intel 8051, designed for generic applications and domains
Or
Application specific
Automotive AVR from Atmel Corporation. Designed specifically for automotive
applications

Contains all the necessary functional blocks for independent

working
Hence could easily dominate Microprocessors
Microcontrollers are cheap, cost effective and are readily
available in the market
General Purpose Processor (GPP) Vs Application Specific
Instruction Set Processor (ASIP)
GPP
Processor is designed for general computational tasks
Produced in large volumes and targeting the general market
Per unit cost is low due to the high volume production
Contains an Arithmetic and Logic Unit (ALU) & Control Unit
Application Specific Instruction Set processors (ASIPs)
Architecture and instruction set optimized to specific domain/application
requirements
Eg: Network processing, Automotive, Telecom, media applications, digital
signal processing, control applications etc.
Architectural spectrum is between GPP and ASIC
Need arises when the traditional GPP are unable to meet the increasing
application needs
Incorporate a processor and on chip peripherals demanded by the application
requirement, program and data memory.
Digital Signal Processor
Powerful special purpose 8/16/32 bit microprocessors
Designed specifically to meet the
Computational demands and power constraints
of today's embedded audio, video, and communications
applications
2 to 3 times faster than the general purpose microprocessors
in signal processing applications
Implements algorithms in hardware which speeds up the execution
whereas
General purpose processors implement the algorithm in firmware
Hence the speed of execution depends primarily on the clock for
the processors
DSP can be viewed as a microchip designed for performing
High speed computational operations for
Addition, Subtraction, Multiplication, Division
A typical Digital Signal Processor incorporates the following key units
Program Memory
Data Memory
Computational Engine
I/O Unit
Examples:
Audio video signal processing,
Telecommunication & Multimedia applications
Big-endian V/s Little-endian processors

Endianness specifies the order in which the data is stored in the

memory by processor operations in a multi byte system

Suppose the word length is two byte then data can be stored in
memory in two different ways
Big-endian V/s Little-endian processors
Little-endian
Lower-order byte of the data is stored in memory at the lowest
address
The higher-order byte at the highest address
Big-endian
Higher-order byte of the data is stored in memory at the lowest
address
The lower-order byte at the highest address
 Load Store Operation & Instruction Pipelining:

The RISC processor instruction set is orthogonal

It operates on registers
Memory access related operations are performed by the special
instructions load and store
If the operand is specified as memory location,
the content of it is loaded to a register using the load instruction
Instruction store stores data from a specified register to a specified
memory location
The conventional instruction execution by the processor follows the
fetch-decode execute sequence.

Fetch
Fetches the instruction from program memory or code memory
Decode
Decodes the instruction to generate the necessary control signal
Execute
Reads the operands, perform ALU operations and stores the result
Instruction pipelining
Refers to the overlapped execution of instructions
Application Specific Integrated Circuits
A microchip designed to perform a specific or unique application
Integrates several functions into a single chip
Thereby reduces the system development cost
Proprietary products
As a single chip,
ASIC consumes very small area in the total system,
Thereby helps
In the design of smaller systems with high capabilities/functionalities
 Pre-fabricated for a special application
Custom fabricated by using the components from a re-usable
building block library of components for a particular customer
application
Fabrication of ASICs requires a non-refundable initial investment
Non Recurring Engineering (NRE) charges
Costs for IP (Intellectual property),
masks, package design,
Test development, Debugging, and Hardware.
When the Non-Recurring Engineering Charges (NRE) are born by a third
party And
The Application Specific Integrated Circuit (ASIC) is made openly
available in the market
Then
ASIC is referred as Application Specific Standard Product (ASSP)
The ASSP is marketed to multiple customers just as a general-purpose
product ,
But to a smaller number of customers since it is for a specific application
Programmable Logic Devices (PLDs)
Logic devices provide specific functions, Including
Device-to-device interfacing,
Data communication,
Signal processing,
Data display,
Timing and control operations,
Almost every other function a system must perform
Logic devices can be classified into Two broad categories

 Fixed
 Programmable
The circuits in a fixed logic device are permanent
They perform one function or set of functions
once manufactured, they cannot be changed
Programmable logic devices (PLDs) offer customers a wide range of
Logic capacity,
Features,
Speed,
Voltage characteristics
These devices can be re-configured to perform any number of functions at any time
Designers can use inexpensive software tools to quickly
Develop,
Simulate,
Test their logic designs in PLD based design
The design can be
Quickly programmed into a device
Immediately tested in a live circuit
PLDs are based on re-writable memory technology
The device is reprogrammed to change the design
Programmable Logic Devices (PLDs) - CPLDs and FPGA
Field Programmable Gate Arrays
Complex Programmable Logic Devices
FPGA is an IC designed to be configured by a designer after
manufacturing
FPGAs offer the highest amount of logic density
The most features,
The highest performance
Logic gate is Medium to high density ranging from 1K to 500K system
gates
Advanced FPGA devices also offer features such as
Built-in hardwired processors
Substantial amounts of memory
Clock management systems
Support for many of the latest
Very fast device-to-device signaling technologies
FPGAs are used in a wide variety of applications ranging from
Data processing
Data storage,
Instrumentation
Telecommunication
Digital signal processing
Complex programmable logic device (CPLD)
It is a programmable logic device with complexity between that of PALs
and FPGAs
And Architectural features of both
CPLDs, by contrast, offer much smaller amounts of logic - up to about
10,000 gates
CPLDs offer
Very predictable timing characteristics
Are therefore ideal for critical control applications
CPLD consists of
Configurable Logic Block (CLB)
which consists of AND gate arrays and Interconnects
Logic Blocks are programmable AND, fixed OR devices
Macrocells
Flip-flop
Multiplexer
Tri-state buffer
Advantages of PLDs
They offer customer much
More flexibility during design cycle
• PLDSs do not require
Long lead times for prototype or production
PLDs are already on a distributor's self and ready for shipment
• PLDs do not require customers to pay for
Large NRE costs
Purchase expensive mask sets
• PLDs allow customers to order
Just the number of parts required when they need them
• PLDs are reprogrammable
Even after a piece of equipment is shipped to a customer
• The manufacturers are able to
add new features
or upgrade the PLD based products
That are in the field by uploading new programming file
Commercial off-the-shelf (COTS) product
It can be used “As-Is”
Designed to provide easy Integration and Interoperability with
existing system components
Remote Controlled Toy Car control unit
High performance, high frequency microwave electronics(2 to 200 GHz) High
bandwidth analog-to-digital converters,

Devices and components for operation at very high temperatures,

Electro-Optic IR imaging arrays
UV/IR Detectors etc…
A COTS component in turn contains a
General Purpose Processor (GPP) or
Application Specific Instruction Set Processor (ASIP)
or Application Specific Integrated Chip (ASIC)
Application Specific Standard Product (ASSP)
or Programmable Logic Device (PLD)
The major advantage of using COTS is that
They are readily available in the market,
Cheap
A developer can
Cut down his/her development time to a great extent
There is
No need to design the module yourself and write the firmware
Everything will be
Readily supplied by the COTs manufacturer
The major problem faced by the end-user is that
There are no operational and manufacturing standards
The major drawback of using COTs component in embedded design is
The manufacturer may withdraw the product
or
Discontinue the production of the COTs at any time if rapid change in
technology
This problem adversely affects a commercial manufacturer of the
embedded system which makes use of the specific COTs
 MEMORY

Computer memory is a physical device

used to store Data,
Information
Instruction
Temporarily or permanently
It is the collection of storage units that stores binary information in the
form of bits
 On Chip/Off Chip MEMORY
On-Chip Memory

Processors/ Controllers contain built-in memory

Off-Chip Memory

Processors/ Controllers requires external memory to be connected to

store the control algorithm
 Program Memory

Non Volatile Storage Memory

Retains its contents even after the power is turned off
Based on Fabrication, Erasing and Programming techniques they can be
classified as
MROM (Masked Read Only Memory)
PROM (Programmable Read Only Memory)
EPROM (Erasable and Programmable Read Only Memory)
EEPROM (Electrically Erasable and Programmable Read Only Memory)
Flash ROM(Image of Momentary flashing of Light)
MROM: Masked Read Only Memory
One-time programmable memory
Uses hardwired technology for storing data
Factory programmed by masking and metallization process
according to the data provided by the end user
Primary advantage is low cost for high volume production
MROM: Masked Read Only Memory
Different mechanisms are used for the masking process of the MROM
1.Creation of an enhancement or depletion mode transistor through
channel implant
2.By creating the memory cell either using a standard transistor or a
high threshold transistor
In the high threshold mode,
The supply voltage required to turn ON the transistor is above the
normal ROM IC operating voltage.
MROM: Masked Read Only Memory
This ensures that the transistor is always off
the memory cell stores always logic 0
The limitation with MROM based firmware storage is
The inability to modify the device firmware against firmware
upgrades
The MROM is permanent in bit storage,
It is not possible to alter the bit information
PROM-Programmable Read Only Memory
It is not pre-programmed by the manufacturer
The end user is responsible for Programming these devices
PROM/OTP has
Nichrome or Polysilicon wires arranged in a matrix
These wires can be functionally viewed as
Fuses
It is programmed by a PROM programmer which selectively burns the
fuses according to the bit pattern to be stored
PROM-Programmable Read Only Memory
Fuses which are not blown/burned represents a logic “1”
where as fuses which are blown/burned represents a logic “0”
The default state is logic “1”.
OTP is widely used for commercial production of embedded systems
whose proto-typed versions are proven and the code is finalized
It is a low cost solution for commercial production
OTPs cannot be reprogrammed
EPROM - Erasable Programmable Read Only Memory
Gives the flexibility to re-program the same chip
During development phase ,
Code is subject to continuous changes
Hence using an OTP is not economical
EPROM stores the bit information by charging the floating gate of an FET
Bit information is stored by using an EPROM Programmer
EPROM - Erasable Programmable Read Only Memory
Applies high voltage to charge the floating gate
EPROM contains a quartz crystal window for erasing the stored
information
If the window is exposed to Ultra violet rays for a fixed duration
The entire memory will be erased
Even though the EPROM chip is flexible in terms of re-programmability,
It needs to be taken out of the circuit board and needs to be put in a UV
eraser device for 20 to 30 minutes
Electrically Erasable Programmable Read Only Memory (EEPROM):
Provides the flexibility to re-program the same chip using electrical
signals
The information contained can be altered at the register/Byte level
They can be erased and reprogrammed within the circuit
Chip erase mode – Data can be erased in a few milliseconds
The only limitation is
Their capacity is limited when compared with the standard ROM
(A few kilobytes)
FLASH - A variation of EEPROM technology
It combines the re-programmability of EEPROM
and the high capacity of standard ROMs
Organized as sectors (blocks) or pages
Stores information in an array of floating gate MOSFET transistors
The erasing of memory can be done at sector level or page level without
affecting the other sectors or pages
Each sector/page should be erased before re-programming
The typical erasable capacity of FLASH is of the order of a few 1000 cycles
Read-Write Memory/Random Access Memory (RAM)
Data memory or working memory of the controller/processor
Volatile, meaning when the power is turned off, all the contents are
destroyed
A direct access memory, - we can access the desired memory location
directly without the need for traversing through the entire memory
locations to reach the desired memory position
(i.e. Random Access of memory location)
Static RAM
Stores data in the form of Voltage
They are made up of flip-flops
In typical implementation, an SRAM cell (bit) is realized using 6
transistors (or 6 MOSFETs)
Four of the transistors are used for building the latch (flip-flop) part of
the memory cell
And 2 for controlling the access.
Fastest form of RAM available
Dynamic RAM
Stores data in the form of charge
Made up of MOS transistor gates
Advantages of DRAM
High density and low cost compared to SRAM
Disadvantage
Information is stored as charge it gets leaked off with time and to
prevent this they need to be refreshed periodically
Special circuits called DRAM controllers are used for the refreshing operation. The refresh
NVRAM
Random access memory with battery backup
It contains Static RAM based memory and a minute battery for providing
supply to the memory in the absence of external power supply
The memory and battery are packed together in a single package
Used for the non volatile storage of results of operations or for setting
up of flags etc
The life span of NVRAM is expected to be around 10 years
DS1744 from Maxim/Dallas is an example for 32KB NVRAM
Factors to be considered while selecting a Memory Device
• Speed
• Data storage size and Capacity
• Bus width
• Power consumption
• Cost
Sensors
A transducer that converts energy from one form to another
Embedded system is in constant interaction
with the real world
Controlling/monitoring functions are executed
In accordance with the changes happening to the Real World

The changes in the system environment or variables are detected

by the sensors
Connected to the input port of the embedded system
Actuator
A form of transducer device, which converts signals to
corresponding physical action
If the embedded system is designed for any controlling purpose,
The system will produce some changes in the controlling variable
To bring the controlled variable to the desired value
This can be achieved through An actuator
connected to the out port of the embedded system
The I/O Subsystem

Facilitates the interaction of the embedded system with External world

Interaction happens through the sensors and actuators

Connected to the Input and output ports

respectively of the embedded system

Sensors may not be directly interfaced to the Input ports

Instead they may be interfaced through
Signal conditioning and Translating systems
like ADC, Optocouplers etc…
The I/O Subsystem – I/O Devices - Light Emitting Diode (LED)
 An output device for visual indication

 Used as an indicator for the status of various signals or situations

E.g. Indicating the presence of power conditions like

‘Device ON’,

‘Battery low’ or

‘Charging of battery’

for a Battery operated handheld embedded devices

 Vcc

R
GND
The I/O Subsystem – I/O Devices – 7-Segment LED Display

An output device for displaying alpha numeric characters

Contains 8 light-emitting diode (LED) segments

Arranged in a special form

Out of the 8 LED segments,

7 are used for displaying

alpha numeric characters( Named A-G)
1 for displaying the decimal Point( Named DP)
Available in two different configurations

Common anode

Common cathode

In the Common anode configuration

The anodes of the 8 segments are connected commonly

In the Common cathode configuration,

The cathodes of the 8 segments are connected commonly

The LED segment anode or cathode is connected to the Port of the
processor/controller in the order
‘A’ segment to the Least significant port Pin
DP segment to the most significant Port Pin

The current flow through each of the LED segments

should be Limited to the maximum value supported by the LED display unit
Typical value for the current falls within the range of 20mA

The current through each segment is limited

By connecting a current limiting resistor to the anode or cathode of each segment
The I/O Subsystem – I/O Devices – Optocoupler

A solid state device to isolate two parts of a circuit

Optocoupler combines

An LED

A photo-transistor in a single housing (package)

LED
I/O interface
I/O interface
Photo-transistor
In electronic circuits,

Optocouplers are used for

•Suppressing interference in data communication

•Circuit isolation Optocouplers can be used in

•High voltage separation Input circuits
•Simultaneous separation and intensification of signals or Output circuits
Vcc

LED AT89C51 LED

I/p interface Port Pin
O/p interface
Port Pin
Photo-transistor Photo-transistor

Opto-Coupler Microcontroller Opto-Coupler

IC MCT2M IC MCT2M
The reset vector can be relocated

to an address for processors/controllers supporting bootloader

The reset signal can be either

Active high
The processor undergoes reset when the reset pin of the processor is
at logic high

Active low
The processor undergoes reset when the reset pin of the processor is
at logic low
Other System Components – Real Time Clock (RTC)

System component responsible for keeping track of time

Holds information like current time

In hour, minutes and seconds

12 hour /24 hour format

Date, month, year, day of the week etc

Supplies timing reference to the system

RTC is intended to function even in the absence of power
The RTC Chip contains a microchip
For holding the time and date related information
Backup battery cell for functioning in the absence of power,
in a single IC package
Other System Components – Watch Dog Timer (WDT)

A timer unit for monitoring the firmware execution

Depending on the internal implementation,

The watchdog timer increments or decrements a free running

counter with each clock pulse

Generates a reset signal to reset the processor if the count reaches

zero for a down counting watchdog

or the highest count value for an up counting watchdog

If the watchdog counter is in the enabled state,

The firmware can write a zero to it (for up counting watchdog implementation)

Before starting the execution of a piece of code

(subroutine or portion of code which is susceptible to execution hang up) and

the watchdog will start counting.

If the firmware execution doesn’t complete due to malfunctioning, within

the time required by the watchdog to reach the maximum count, the
counter will generate a reset pulse and this will reset the processor
If the firmware execution completes before the expiration of the
watchdog timer
The WDT can be stopped from action
Most of the processors implement watchdog as a built-in component
and provides status register to control the watchdog timer
(enabling and disabling watchdog functioning)
and watchdog timer register for writing the count value
If the processor/controller doesn’t contain a built in watchdog timer,
It can be implemented using an external watchdog timer IC circuit.
 Microoprocessor/
Controller
Watchdog
Free Running
Reset Pin
Counter

Watchdog Reset

System Clock
Communication Interface

Essential for communicating with various subsystems of the embedded

system and with the external world

Can be viewed in two different perspectives

•Device/board level communication interface

(Onboard Communication Interface)

•Product level communication interface

(External Communication Interface)
Device/Board level communication interface
(Onboard Communication Interface):
The communication channel
which interconnects the various components within an
embedded product
Is referred to as Device/Board Level Communication Interface
Examples
Serial interfaces like
I2C, SPI, UART, 1-wire and Parallel bus interface
I2C (Inter Integrated Circuit) Bus
A Synchronous bi-directional half duplex

(one-directional communication at a given point of time)

Two wire serial interface bus ; Developed by Philips Semiconductors in the early 1980’s.

Provides an easy way of connection between

Microprocessor/Microcontroller---peripheral chips in Television sets

The I2C bus is comprised of two bus lines, namely;

•Serial Clock – SCL

•Serial Data – SDA

Sequence of operation for communicating with an I2C slave device is
 Master device pulls the clock line (SCL) of the bus to “HIGH”

 Master device pulls the data line (SDA) “LOW”, when the SCL line
is at logic “HIGH”
 This is the “Start” condition for data transfer
 Master sends - Address (7 bit or 10 bit wide) of the

“Slave” Device to communicate, over the SDA line

 Clock pulses - Generated at the SCL line for synchronizing the bit
reception by the slave device
 The MSB of the data is always transmitted first.

 The data in the bus is valid during the “HIGH‟ period of the clock
signal
 In normal data transfer, the data line only changes state when the
clock is low
 Master waits for the acknowledgement bit from the slave device
whose address is sent on the bus along with the Read/Write
operation command.
 Slave devices connected to the bus compares the address received
with the address assigned to them
 The Slave device with the address requested by the master device
responds by
 Sending an acknowledge bit (Bit value =1) over the SDA line
 Upon receiving the acknowledge bit, master sends the 8bit data to
the slave device over SDA line, if the requested operation is “Write to
device‟.
 If the requested operation is “Read from device”, the slave device
sends data to the master over the SDA line.
 Master waits for the acknowledgement bit from the device upon byte
transfer complete for a write operation and sends an acknowledge bit
to the slave device for a read operation
 Master terminates the transfer by pulling the SDA line “HIGH‟ when
the clock line SCL is at logic “HIGH‟ (Indicating the “STOP‟ condition)
The Serial Peripheral Interface Bus (SPI)
A synchronous
Bi-directional
Full duplex
Four wire
Serial interface bus
The concept of SPI is introduced by Motorola
SPI is a single master multi- slave system
SPI requires four signal lines for communication,
They are: Master Out Slave In (MOSI):
Signal line carrying the data from master to slave device
Also known as
Slave Input/Slave Data In (SI/SDI)
Master In Slave Out (MISO):
Signal line carrying the data from slave to master device.
It is also known as
Slave Output (SO/SDO)
The data out line (MISO) of all the slave devices by default floats at
high impedance
The serial data transmission through SPI Bus is fully configurable.
Set of registers : Hold these configurations
SPI Control Register holds the various configuration parameters

Master/slave selection for the device



Baud rate selection for communication



Clock signal control


During transmission from the master to slave
Data in the master’s shift register
Is shifted out to the MOSI pin
It enters the shift register of the slave device
Through the MOSI pin of the slave device
At the same time the shifted out data bit from the slave device’s shift
register enters the shift register of the master device through MISO pin
Universal Asynchronous Receiver Transmitter (UART)

An asynchronous form of serial data transmission

Serial communication settings:

• Baudrate
• No. of bits per byte
• Parity
• No. of start bits and stop bit
• flow control

for both transmitter and receiver should be set as identical

If parity is enabled for communication,
The UART of the transmitting device adds a parity bit
The UART of the receiving device calculates the parity of the bits
received
And compares it with the received parity bit for error checking
The UART of the receiving device
• Discards the ‘Start’, ‘Stop’ and ‘Parity’ bit from the received bit stream
• Converts the received serial bit data to a word
TXD TXD
UART UART
RXD RXD

TXD: Transmitter Line

RXD: Receiver Line
1-Wire Interface

An asynchronous half-duplex communication protocol

Developed by Maxim Dallas Semiconductor

Also known as Dallas 1-Wire® protocol

It makes use of only a single signal line (wire) called DQ for
communication

Follows the master-slave communication model

 Vcc

4.7K

DQ Slave 1
Port Pin
1-Wire Device
(Eg: DS2760 Battery
GND
monitor IC )
Master
(Microprocessor/
Controller) DQ Slave 2
1-Wire Device
(Eg: DS2431 1024
GND GND
Bit EEPROM )
The sequence of operation for communicating with a 1-Wire slave device is:

1.Master device sends a ‘Reset’ pulse on the 1-Wire bus.

2.Slave device(s) present on the bus respond with a ‘Presence’ pulse.

3.Master device sends a ROM Command (Net Address Command followed by the
64 bit address of the device). This addresses the slave device(s) to which it wants
to initiate a communication

4.Master device sends a read/write function command to read/write the internal

memory or register of the slave device.

5.Master initiates a Read data /Write data from the device or to the device
All communication over the 1-Wire bus is Master initiated
The communication over the 1-Wire bus is divided into timeslots of 60
microseconds
 The ‘Reset’ pulse occupies 8 time slots.
 For starting a communication,
The master asserts the reset pulse by pulling the 1-Wire bus ‘LOW’ for at least 8
time slots (480µs)
 If a ‘Slave’ device is present on the bus and is ready for communication
It should respond to the master with a ‘Presence’ pulse, within 60µs of the release
of the ‘Reset’ pulse by the master
The slave device(s) responds with a ‘Presence’ pulse by pulling the 1-Wire bus
‘LOW’ for a minimum of 1 time slot (60µs)
For writing a bit value of 1 on the 1-Wire bus, the bus master pulls the bus for 1 to
15µs and then releases the bus for the rest of the time slot
A bit value of ‘0’ is written on the bus by master pulling the bus for a minimum
of 1 time slot (60µs) and a maximum of 2 time slots (120µs)
To Read a bit from the slave device, the master pulls the bus ‘LOW’ for 1 to 15µs
If the slave wants to send a bit value ‘1’ in response to the read request from the
slave, it simply releases the bus for the rest of the time slot
If the slave wants to send a bit value ‘0’, it pulls the bus ‘LOW’ for the rest of the
time slot.
On-board Communication Interface – Parallel Interface
Parallel interface is normally used for communicating with peripheral
devices which are memory mapped to the host of the system
The host processor/controller of the embedded system contains a
parallel bus and the device which supports parallel bus can directly
connect to this bus system
The communication through the parallel bus is controlled by the
control signal interface between the device and the host
The ‘Control Signals’ for communication includes ‘Read/Write’ signal
and device select signal
The device normally contains a device select line and the device
becomes active only when this line is asserted by the host processor
The direction of data transfer (Host to Device or Device to Host) can
be controlled through the control signal lines for ‘Read’ and ‘Write’
Only the host processor has control over the ‘Read’ and ‘Write’ control
signals
 D0 to Data Bus
Dx-1 Peripheral Device
RD\ RD\ (Eg: ADC)
WR\ WR\
Host Control Signals CS\
(Microprocessor/
Controller) Chip Select

A0 to Address Bus Address De-coder

Ay-1 Circuit

x: Data bus width

y: Address Bus width
Charasteristics of Embedded Systems
1. Application and domain specific
2. Reactive and Real Time
3. Operates in harsh environments
4. Distributed, Small Size and weight
5. Power concerns
6. Single-functioned
7. Complex functionality
8. Tightly-constrained & Safety-critical
Application and Domain Specific
Each Embedded System is developed to do an intended function only
They cannot be used for any other purpose
Reactive and Real Time
Changes in the real world are captured by the sensors or input devices
in real time
Control algorithm running inside the unit reacts in a designed manner

To bring the controlled output variables to the desired level

Operates in Harsh Environments
The design of E.S should take care of the operating conditions of the area
where the system is going to be deployed.
Example
If the system needs to be deployed in a high temperature zone
Then all the components used in the system should be of high
temperature grade
Also proper shock absorption techniques should be provided to systems
which are going to be commissioned in places subject to high shock
Distributed
These embedded systems may be a part of a larger system
Many numbers of such distributed embedded systems form a single large
embedded control unit
Example:
Automatic vending machine.
It contains a card reader, a vending unit etc
Each of them are independent embedded units but they work together to
perform the overall vending function.
Small Size and Weight
Product aesthetics
size,
weight,
shape,
style, etc…
Is an important factor in choosing a product
It is convenient to handle a compact device than a bulky product.
Power Concerns
Power management is an important factor
that needs to be considered in designing embedded system
Embedded Systems should be designed
To minimize the overall heat dissipation by the system
Single Functioned
Dedicated to perform a single function
Complex Functionality
Needs the execution of a very Sophisticated algorithm or a combination
of multiple Sophisticated algorithms
Tightly-Constrained
Low Cost, Low Power, Small, Fast etc…
Safety Critical
Must not endanger human life and
Example:
In case of card reader throughput means how many transactions the
reader can perform
In a minute
or In an hour
or In a day.
Throughput is generally measured in terms of “Benchmark”.
A Benchmark is a reference point by which something can be measured
• MTBF
Gives the frequency of failures in hours/weeks/months.
• MTTR
Specifies how long the system is allowed to be out of
order following a failure.
For embedded system with critical application need,
It should be of the order of minutes
Non-Operational Attributes - Testability
• Testability deals with how easily one can test the design
or an application
and by which means it can be done.
• It is applicable to both the embedded hardware and firmware
Embedded hardware testing ensures that
The peripherals and total hardware functions in the desired
manner, Firmware testing ensures that
The firmware is functioning in the expected way
Debug-ability

A means to debug the product from unexpected behavior in the system

Debug-ability is a two level process
1.Hardware level 2.software level

Hardware level
It is used for finding the issues created by hardware problems

Software level
It is employed for finding the errors created by the flaws in the
software
Evolvability
• It is a term which is closely related to Biology
• It is referred as the non-heritable variation

• For an embedded system evolvability refers to

The ease with which
The embedded product can be modified
To take advantage of new firmware or hardware technologies.
Time-to-Prototype and Market
It is the time elapsed between the conceptualization of a product
and the time at which the product is ready for selling.
The commercial embedded product market is highly competitive
and time to market the product is a critical factor
in the success of commercial embedded product.
There may be multiple players in embedded industry who develop
products of the same category
Example Mobile phone Market Competition by different Manufacturers).
Traditional Embedded System Development Approach

The hardware software partitioning is done at an early stage

Engineers from the software group take care of the software architecture development and implementation, and engineers from the hardware group are responsible for
building the hardware required for the product

There is less interaction between the two teams and the development happens either serially or in parallel and once the hardware and software are ready, the
integration is performed

Hardware Software Co-design Approach for Embedded System Development

The product requirements captured from the customer are converted into system level needs or processing requirements rather than partitioning them to either h/w
or s/w

The system level processing requirements are then transferred into functions which can be simulated and verified against performance and functionality

The Architecture design follows the system design. The partition of system level processing requirements into hardware and software takes place during the this phase

Each system level processing requirement is mapped as either hardware and/or software requirement

The partitioning is performed based on the hardware-software trade-offs