Embedded Systems (Class)

Embedded Systems
Abrham Debasu /Assistant Professor/
Abrham Debasu (Assistant Professor)

Assessment modality
 Assessments (min. of 3): 25%

 Mid exam: 25%
 Final Exam………….50%


Chapter 1
Introduction to Embedded System

Outline
 What is a system?
 What is embedded system

 Building blocks of ES
 Characteristics of ES
 ES architecture
 Basic block diagram of MP & MC

What is a System?

What is an Embedded System ?
User Interfaces
Software
&
Input variables Hardware Output variables
MP or MC

Building blocks of ES
Where?
Sensor
Buttons PSU
LED
Touch pads LCD
IR
OUTPUT
INPUT
CONTROLLER
FREQUENCY
GENERATOR

Application of ES
Medical area:-
CT scans, Wearable Devices, MRI…
Agricultural areas:- IoTs…
Banking:- ATMs…
Military:- Radar…
Building area:- Elevators…
etc
Characteristics of ES
 Real time operation
 Low manufacturing cost
 Low power consumption
 Application dependent processor
 Restricted memory
ES architecture
 Von Neumann
 Harvard Architecture

By referring CAO how von Neumann machine works?
How many registers found in von Neumann machine?
How von Neumann machine works?
When Fetching cycle is completed?

How IBR increase computational time?
Von Neumann ES Architecture
MC
Memory
Program/Instruction
Bus
Data

Harvard Architecture block diagram
Instruction/ Program
MC
Data

Microprocessor
&
Microcontroller

What is Microprocessor ?

Ad
de 8086 Microprocessor
r
AX EU BIU
BX
CS
CX
DS
DX
ES
SI,BP
DI,SP SS
IP
Instruction queue
U
AL
Flags

What is microcontroller ?
MC Memory
I/O port
BUS
Timer A/D converter Serial I/O Others

Microcontroller type
Based on
 Bit operation
 Instruction set

 Bit operation
 8 bit MC
(Intel’s 8031,8051, Atmel AVR)
 16 bit MC
(Intel 8096)
 32 bit MC
(AVR32, ARM)

 Instruction Set
 CISC (Complex instruction set computer)

 RISC (Reduced instruction set computer)
CISC (Complex instruction set computer)

 A single instruction can be used in more than one task
RISC (Complex instruction set computer)

 It reduce the operational time per instruction because
a single instruction is used for a single task
Criteria for choosing microcontroller
 Bit operation (8bit, 16bit and 32 bit)

 Speed (what is the highest speed that MC supports
 Power consumption (for battery )
 Amount of RAM and ROM
 The number of I/O pins
 Cost

Chapter 2
AVR Microcontroller

Outline
 Introduction to AVR family
 AVR family classification
 Simplified view of AVR architecture

Introduction
AVR Microcontroller
 Was first developed by Atmel in 1996
 Known as Advanced Virtual RISC.
 Based on Harvard architecture
 An 8 bit that contain code ROM,

Data RAM, Timers & I/O on a
single chip

AVR Microcontroller family
01 02 03 04
@ @
Mega
Special purpose Classic
Tiny 8
13 16
AT90CAN… AT90S2313
25 32
AT90WM… AT90S2323
44 64
AT90USB… AT90S4433
84 1280
Page 48-52 reading assignment

Mega families
MC families Code ROM Data RAM DATA I/O pins

EPROM
AT mega8 8K 1K 0.5K 23
AT mega16 16K 1K 0.5K 32
AT mega 32 32K 2K 1K 32

Program ROM(Flash memory)
 Used to store program or instruction
 From 1K to 256K
Data RAM (SRAM)

 Used to store data
 A maximum of 64K
 It has three components (GPR, I/o Memory and SRAM)
I/O pins
 8 to 100 pins for I/O

Register organization in AVR Microcontroller
32 X 8
General Purpose Registers
for alu operations
Status Register

GPR (General purpose registers)
R0-R31

SREG
LDI R16,8 LDI R16,128

LDI R17,8 LDI R17,128
Add R16,R17 Add R16,R17
Which flag register is
affected??? Page 71-74 reading assignment

Not directly accessible register
PC (program counter) @ next instruction

AVR Microcontroller Architecture
I/O Status Register

……..
Program PC
memory Register file
ALU
32KB Data
Memory
Instruction
register
Instruction
Decoder
LDI R16,128
LDI R17,128
Add R16,R17

Cycles of AVR Microcontroller
Instruction Fetching Cycle (IF)

Execution Cycle
Similar with IAS or Von Neumann machine

Instruction Fetching Cycle (IF)
Program counter
Program
Memory
Read Update
Instruction Register
Instruction Decoder

Execution Cycle
Write Write
ALU
Register File Memory
Process Write
 Register operand fetch (ROF)

 ALU execution
 Result write back (RWB)

RAM architecture
RAM is volatile in nature so,

To store permanently we use
EPROM
$FFFF EPROM
ROM reading assignment
Review questions
1. What is the basic difference between Von Neumann and Harvard architecture of
embedded system?
2. What is the difference between microcontroller and microprocessor?
3. Draw the building block of an embedded system and briefly explain the working
principle?
4. One of the characteristics of an embedded system is restricted memory. So, why

memory is restricted ?
5. Explain in detail about the working principle of AVR microcontroller?

Chapter 3
Addressing Mode

Addressing Modes
What is addressing mode ?
 A mechanism by which the microcontroller get an operand
The AVR microcontroller supports addressing modes for access to the

Program memory (Flash) and Data memory (SRAM, Register file, I/O
Memory, and Extended I/O Memory).

 Immediate Mode
 Register Mode
 Data Direct Mode
 Data Indirect Mode
 Data indirect with displacement
 Read about data indirect pre increment and decrement

Immediate Mode
Constant value is in the instruction

Stored with program code in memory

Data Indirect Mode
registers are 8 bit size. How ?

X, Y and Z registers
X-register 7 0 7 0
R27 R26
Y-register 7 0 7 0
R29 R28
7
Z-register 0 7 0
R31 R30
Used for indirect addressing for accessing flash memory

Register Mode
15 0
f1 Register File
OP

Data Direct Mode
31 16
Inst Memory
Data Memory
15 0
OP

Data Indirect Mode
15 0
Inst Register Memory
@ OP

Data indirect with displacement
15 0
f2 f1 DMEM
Register File
OP

Instruction Set

What is an instruction set?
A binary pattern inside ALU to perform a specific task
But incase of Von Neumann it is decimal pattern

AVR Data Types
 It has only 8 bit data type as all the register are 8 bits
AVR data format representation
 Bytes in AVR can be represented in four ways
 HEX numbers
 Ex:-
 0X15 or $15
 Binary numbers  Decimal numbers
 Ex:-  Ex:-
 0b01110011  15
 0B01110011  16 etc
 ASCII

AVR has the following classes of
instructions:
Data transfer
Arithmetic and Logic
Program control
Bit and Others
• Bit and Bit test
• MCU Control

AVR instruction sets
 Data transfer instruction

LDI, MOV…
 Arithmetic instruction
ADD, SUB, MUL, INC, DEC….

Data transfer instruction (LDI)
 Copies 8-bit data into the general purpose register
 Syntax
LDI RD,K
 RD must be R16-R31
Note: We cannot load values into registers R0-R15 using LDI instruction

LDS(Load direct from data space)
 Tells the CPU to load or copy from an address of data memory to GPR
 Syntax
LDS RD,K where K (0-31)
STS(Store direct to data space)

 Tells the CPU to load or copy from GPR to address of data memory
 Syntax
STS K,RD where K (0*0000-0*3FFF)
Note: you cannot copy or store an immediate value directly to SRAM. You must be
done via the GPRs

MOV
The MOV instruction is used to copy data among GPRs (R0-R31)
Syntax
MOV Rd,Rs
Read about IN and OUT…

IN
IN Rd, A ; Load an I/O location to any of the GPR

GPR (R0-R31)
A (0-63)
It can copy the content in hex
For example
IN R20,0 X 16 copy the content of port 16 in Hex to R20

 Arithmetic instruction
ADD, SUB, MUL, INC, DEC….

Bit and Bit test
LSL
LSR
ROL
ROR

Program control

Reading assignment about call and recall

Reading assignment about call and recall

Timer
 A Timer is actually a counter that counts every time the

microcontroller executes an instruction
 Used to generate precise time delay and also used as a counter
 It can be used as PWM(pulse weight modulation)
 The AVR timers are 8 bits and 16 bits

 Basically T0,T1 and T2 timer for AVR but we have 1-6 timer for MC

A general view of AVR Timer
0
Oscillator
16Mhz
Timer/Counter Register
1
External
PIN Flags
0/1

Timer 0
7 0 7 0
TOV0 TCNT0 OCR0
==
Comparator
Normal mode Clear Timer on

Compare Match
Flags
(CTC mode)
(OCF0)
Group Assignment about T1 and T2 for both oscillator and external input
Draw the architecture of T1 and T2Abrham
of AVR timers
Debasu and
(Assistant briefly discuss the working principles
Professor)
Page 348 ~
Real-time operating system (RTOS)
What is a Real-Time Operating System (RTOS)?
Real-time operating system (RTOS) is an operating

system intended to serve real time application that
process data as it comes in, mostly without buffer delay.

Why use an RTOS?
• It offers priority-based scheduling, which allows you to separate

analytical processing from non-critical processing.
• The Real time OS provides API functions that allow cleaner and
smaller application code.
• Abstracting timing dependencies and the task-based design results
in fewer interdependencies between modules.
• An RTOS is event-driven with no time wastage on processing
time for the event which is not occur

Components of RTOS

Types of RTOS
Hard Real Time
Soft Real Time
Firm Real time

Factors for selecting an RTOS
Performance
Middleware
Error-free
Task shifting

Difference between in GPOS and RTOS

Chapter 5
PIN CONFIGURTION
Reading assignment

Pinout Description of AVR Microcontroller

Chapter 5
Branch, Call and Delay loop

Laboratory session

Basics of Arduino UNO
Is a microcontroller (open source hardware) for prototyping)
It uses a simplified version of c++ language

Major components of Arduino UNO

Microcontroller
It is the brain of the Arduino

Consists of 28 pins
It uses Atmega 328P (microcontroller produced by Atmel

Atmega 328P Microcontroller
Has the following components
Flash Memory
RAM
CPU
EEPROM
Atmega328P

Working with ultrasonic sensor

How Does it Work?

Materials
 HC-SR04 ULTRA SONIC SENSOR
 JUMPER WIRES
 ARDUINO UNO
 ARDUINO IDE SOFTWARE

Working with ultrasonic sensor and LED light
 HC-SR04 ULTRA SONIC SENSOR

 ARDUINO UNO
 JUMPER WIRES
 ARDUINO IDE SOFTWARE
 LED LIGHT FOR NOTIFICATION

Seven segment display

Hardware Required
•1 x seven segment display (common cathode)
•1 x Arduino
•1 x breadboard
•Regulators
•jumper wires

How to read from RAM ?
How to Write to RAM ?
4004, 8085, 8086, ….

8086 MP portioned as
EU
BIU
EU is used for execution
BIU is used for fetching

Why partitioned as EU and BIU?
What will happen if IP is located at EU?

Ad
r
AX EU
BX
CX
DX ?
SI,BP
DI,SP
Memory
U
AL
Flags

Ad
r
AX EU BIU
BX
CS
CX
DS
DX
ES
SI,BP
DI,SP SS
IP
Instruction queue
U
AL
Flags

Instruction Set
Data transfer instruction
MOV
IN
OUT… etc.

MOV
Syntax
MOV Dest, Src
Rule
 Must be the same size
 Both can not be memory
 An immediate value can not be directly move
to segment

IN
Syntax
IN AX/AL, <port #>
OUT
Syntax
OUT <port #>, AX/AL

Bit transfer instruction
Shift and Rotate instruction

SHR : Shift Right
SHL : Shift Left
ROL : Rotate Left
ROR : Rotate Right

SHR : Shift Right
SHL : Shift Left

ROL : Rotate Left
ROR : Rotate Right

Embedded Systems (Class)

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Embedded Systems

Abrham Debasu /Assistant Professor/

Abrham Debasu (Assistant Professor)

 Assessments (min. of 3): 25%

Abrham Debasu (Assistant Professor)

Introduction to Embedded System

Abrham Debasu (Assistant Professor)

 What is embedded system

Abrham Debasu (Assistant Professor)

Abrham Debasu (Assistant Professor)

Abrham Debasu (Assistant Professor)

Abrham Debasu (Assistant Professor)

CT scans, Wearable Devices, MRI…

Agricultural areas:- IoTs…

Building area:- Elevators…

 Real time operation

 Low manufacturing cost

 Low power consumption

 Application dependent processor

Abrham Debasu (Assistant Professor)

How many registers found in von Neumann machine?

How von Neumann machine works?

When Fetching cycle is completed?

Abrham Debasu (Assistant Professor)

Abrham Debasu (Assistant Professor)

Abrham Debasu (Assistant Professor)

Abrham Debasu (Assistant Professor)

Abrham Debasu (Assistant Professor)

Abrham Debasu (Assistant Professor)

Timer A/D converter Serial I/O Others

Abrham Debasu (Assistant Professor)

Abrham Debasu (Assistant Professor)

Abrham Debasu (Assistant Professor)

 CISC (Complex instruction set computer)

CISC (Complex instruction set computer)

RISC (Complex instruction set computer)

 Bit operation (8bit, 16bit and 32 bit)

Abrham Debasu (Assistant Professor)

Abrham Debasu (Assistant Professor)

 Introduction to AVR family

 AVR family classification

 Simplified view of AVR architecture

Abrham Debasu (Assistant Professor)

 Was first developed by Atmel in 1996

 Known as Advanced Virtual RISC.

 Based on Harvard architecture

 An 8 bit that contain code ROM,

Abrham Debasu (Assistant Professor)

Page 48-52 reading assignment

Abrham Debasu (Assistant Professor)

MC families Code ROM Data RAM DATA I/O pins

AT mega16 16K 1K 0.5K 32

Abrham Debasu (Assistant Professor)

Data RAM (SRAM)

Abrham Debasu (Assistant Professor)

Abrham Debasu (Assistant Professor)

Abrham Debasu (Assistant Professor)

LDI R16,8 LDI R16,128

Abrham Debasu (Assistant Professor)

Abrham Debasu (Assistant Professor)

I/O Status Register

Abrham Debasu (Assistant Professor)

Instruction Fetching Cycle (IF)

Similar with IAS or Von Neumann machine