Operating System

Virtual Memory
• The combined size of
 Program
 Data
 Stack
• May exceed the amount of Physical memory
available (RAM)
• VM can work is multiprogramming
 Bits and pieces of many programs in RAM at once

2
 Virtual Memory
• A program generates Virtual addresses of
Virtual Address Space
• Which are then mapped to Physical addresses
of Physical Address Space
• In VM Virtual Address Space can be larger
than Physical Address Space

3
 Paging
• The Address space can be non-contiguous in
Physical Memory
• Virtual Address Space is divided into units
called Pages or Virtual Pages
• Physical Address Space is divided into units
called Frame or Page Frames
• Pages and Frames are always of the same
size

4
 Paging
• Permits the
Frame
address space to
Number
be non-contiguous
0
• Physical memory Page 0
is divided into Page 1 1 Page 0
same sized blocks
called Frames Page 2 2
• Logical memory is Logical Memory 3 Page 1
divided into same (Process)
sized blocks called 4 Page 2
Pages 5

Physical Memory (RAM)

5
 Paging
• We need to keep
Frame
track of which
Number
Page is loaded in
which Frame 0 1 0
Page 0
1 3
Page 1 1 Page 0
2 4
Page 2 Page Table 2
Logical Memory 3 Page 1
(Process)
4 Page 2

Physical Memory (RAM)

6
 00000 Virtual Address Physical Address
00000
00001
000 00010
Space Size = 32 B Space000 00001
00010
00011 Page Size = 4 B 00011
00100 Fi Fi
00100
00101 rs # of Pages? 32/4 = 8 00101rs
001 t3 001 th t 3
00110
th 00110
e
00111
01000
e Bit
Vi s
00111
01000
Ph Bits
010
01001
Nu rtua rep 010
01001Nu ysic rep
La mb l Pa ese
r La mb al P rese
01010 01010
01011 01011
01100 st er ge nt st
01100 er ag nt
01101 th 2 B th 2 B
01101 e
011 e 011 e
01110
Pa its 000 111 01110
Pa its
ge rep
01111 01111
10000 ge rep 001 010 10000
100 10001 O res 010 000 100 10001 O res
f fs e f fs e
et nt
10010 10010
10011 et nt 011 011 10011
10100 10100
101 10101
10110
100 101 101 10101
10110
10111 101 110 10111
11000 11000
11001 110 100 11001
110 11010 110 11010
11011 111 001 11011
11100 11100
11101 Page Table 11101 7
111 11110 111 11110
11111 11111
 00000 Virtual Address Physical Address
00000
00001
000 00010
Space Space 000 00001
00010
00011 00011
00100
CPU 00100
00101 00101
001 00110 001 00110 Add x,y,z
00111 00111
01000 11101 00101. 01000
01001 01001
010 01010 010 01010
01011 01011
01100 01100
01101 01101
011 01110
000 111 011 01110
01111 01111
10000 001 010 10000
100 10001
10010 010 000 100 10001
10010
10011 10011
10100
011 011 10100
101 10101
10110
100 101 101 10101
10110
10111 101 110 10111
11000 11000
11001 110 100 11001
110 11010 110 11010
11011 111 001 11011
11100 11100
11101 Add x,y,z Page Table 11101 8
111 11110 111 11110
11111 11111
CPU Paging Hardware
Virtual Address Physical Address

p d f d f0000
.

0 f1111

p f

Physical Memory
Page Table 9

MMU
 0k – 4k X Vi
Virtual
Paging be rtua
Address 4k – 8k X Ad la l A
Space dr rge dd
8k –12k X es r t re
s ha ss
12k-16k X Sp n S
ac Ph pa
Physical e ysi ce c
14k-20k 0
20k-24k X ca a
Address Space l n
24k-28k 2
28k-32k X
32k-36k X 0 0k – 4k
36k-40k X 1 4k – 8k
40k-44k 4 2 8k –12k
44k-48k 3 3 12k-16k
48k-52k 7 4 14k-20k
52k-56k 1 5 20k-24k
56k-60k 6 6 24k-28k
60k-64k 5 7 28k-32k 10
 Paging
• Only 16 pages are mapped
• What if a Virtual Address between 8k – 12k is
generated?
• A Present/Absent bit is kept for each Page
• Present/Absent bit = 1
 Page is Present in Physically Memory
• Present/Absent bit = 0
 Page is not Present in Physically Memory

11
 0k – 4k X 0
Virtual
Address 4k – 8k X 0 Paging
Space 8k –12k X 0
12k-16k X 0
14k-20k 0 1
Physical
20k-24k X 0 Address Space
24k-28k 2 1
28k-32k X 0
32k-36k X 0 0 0k – 4k
36k-40k X 0 1 4k – 8k
40k-44k 4 1 2 8k –12k
44k-48k 3 1 3 12k-16k
48k-52k 7 1 4 14k-20k
52k-56k 1 1 5 20k-24k
56k-60k 6 1 6 24k-28k
60k-64k 5 1 7 28k-32k 12
 Paging
• If the Program generates the Virtual Address
of a page that is unmapped
 Present/Absent bit = 0
• MMU generates an Interrupt called Page Fault
• This invokes the Operating System
 OS swaps out one of the Page from RAM
 Swaps in the required page
 Updates the Page Table

13
 Multiprogramming with
Paging
1
P2 4
P3 12k-16k
20k-24k 0 1 8k –12k X 0
14k-20k X 0 4k – 8k 7 1
12k-16k 2 1 0k – 4k X 0
Physical
8k –12k X 0 Address Space
4k – 8k X 0
0k – 4k X 0 0 0k – 4k
1 4k – 8k
2 8k –12k
14k-20k 3 1 3 12k-16k
P1 12k-16k X 0 4 14k-20k
8k –12k 2 1 5 20k-24k
4k – 8k 6 1 6 24k-28k
0k – 4k 5 1 7 28k-32k 14
 Where is the Page Table Stored?

Page Table Base Register

(PTBR)
Po ble o ocess
Ta Pr
int f R
s to un
the ning
Pa
ge

15
Operating System
 Page Table
• The only hardware required is a register
• Points to the starting address of the Page table
• Whenever, there is a context switch
• The register points to the starting address of
the new process’s page table

16
 Page Table
• Two major issues are:
 The Page table entries can be extremely large
 The mapping must be fast

17
 Addresses
• CPU generates address for
 Fetching/Storing Variables
 Fetching Instructions
 Jumping to labels (in case of loops)
 etc
• Each address generated by CPU now requires
two memory references
 1. To access the Page Table
 2. To access the actual address of the
instruction/variable/label
18
 RAM Vs. Registers
• Remember!!!
• If referring to RAM is like walking
• Then referring a Register is like flying an aero
plane

19
 Solution
• Keep a number of fast hardware registers
• When a process starts
• OS loads the registers with the Process’s
entire Page table
• Process’s Page table is available in RAM
• During execution no memory references are
required for Page tables
• But is expensive, if page size is large

20
 Translation Look-aside Buffer
(TLB)
• A better solution is TLB:
 A special, small, fast-lookup Hardware cache
• The TLB contains a few Page-Table entries
• Whenever, a virtual address is generated:
• The page number is presented to the TLB
• If the entry is found
 Its used to access memory
• Else (TLB miss)
 The actual Page table stored in RAM is used
 We may would like to add this Page Table entry into TLB
21