DSP C5000

Chapter 20 Polyphase FIR Filter Implementation for Communication Systems

Copyright 2003 Texas Instruments. All rights reserved.

Multirate Processing 1 of 2


Multirate processing arises in many fields of digital signal processing:



Digital audio: sampling frequency conversion (32 kHz, 44.1kHz, 48kHz), sharp cut-off of FIR cutfilter, Signal processing for digital communications: symbol rate processing, bit rate processing, sample rate processing, Speech processing: 3G speech codec (Adaptive Multi Rate), fractionnal pitch estimation, ...

ESIEE, Slide 2

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Multirate Processing 2 of 2


Involves two actions on the digital signal:



Downsampling: resampling downwards the digital signal in the digital domain. M Fe/M
Retain one sample over M and discard the M-1 others, every M samples.

Fe

Upsampling: resampling upwards the digital signal in the digital domain. L LFe
Insert L-1 zeros between each sample

Fe

ESIEE, Slide 3

Copyright 2003 Texas Instruments. All rights reserved.

Downsampling 1 of 2
x(n) M y(m)
x n ! mM , ( n) if y( m ) ! 0 else.

1 1 y( m ) ! x( mM ) ! x ( n)H ( n  mM ) ! x ( n)  M M m ! g
ESIEE, Slide 4

g

M 1

x(n)e
k !1

j 2T

k n M

Folding term
Copyright 2003 Texas Instruments. All rights reserved.

Downsampling 2 of 2


AntiAnti-aliasing Filter
fc : (Fe/M)/2

x(n)

H(z) Fe

M Fe/M

y(m)

Noble identity for decimation

H(zM)

H(z)

ESIEE, Slide 5

Copyright 2003 Texas Instruments. All rights reserved.

Upsampling 1 of 2
x(m) L y(n)
x n ! mL, ( m ) if y( n) ! 0 else.

g

g n

Y ( z) !
ESIEE, Slide 6

y( n) z
n ! g

x(m ) z L
m ! g

m

! X zL

Copyright 2003 Texas Instruments. All rights reserved.

Upsampling 2 of 2


Interpolating Filter
fC : (Fe/L)/2

x(m) Fe

H(z) LFe

y(n)

 L
ESIEE, Slide 7

Noble identity for upsampling

H(zL) H(z) L

Copyright 2003 Texas Instruments. All rights reserved.

Polyphase Implementation of FIR Filters Decimation Case 1 of 4

H(z) M
H z !
Let n=lM+k
mM 1

E(zM)
h( n) z  n
n! 0

H z !

M 1 k !0

z k Ek z M

with

E k z !

N / M 1 l !0

hlM  k z  l

ESIEE, Slide 8

Copyright 2003 Texas Instruments. All rights reserved.

Polyphase Implementation of FIR Filters Decimation Case 2 of 4

Processing load (MAC/s)

H(z)

E0(zM) z-1 E1(zM) z-1

M-1 filter evaluation over M MTe Time

EM-1(zM) Fe
ESIEE, Slide 9

M Fe/M

are discarded. N filter length

Copyright 2003 Texas Instruments. All rights reserved.

Polyphase Implementation of FIR Filters Decimation Case 3 of 4



Using noble identity

Processing load (MAC/s) N

M z-1 M z-1 M Fe

E0(z) E1(z)

EM-1(z) Fe/M

MTe

Time

No more useless computations, but one sampling period over M, CPU is burdned with N MAC/s.
ESIEE, Slide 10 Copyright 2003 Texas Instruments. All rights reserved.

Polyphase Implementation of FIR Filters Decimation Case 4 of 4



Equivalent commutator model

E0(z) E1(z)
N/M Processing load (MAC/s)

EM-1(z) Fe Fe/M

MTe

Time

Commutator runs at Fe,. At each input sample only one component is computed and accuaccumulated with the result of the previous one. The result is output when the last component is reached and accumulator is reset. This spreads the processing load over MTe.
ESIEE, Slide 11 Copyright 2003 Texas Instruments. All rights reserved.

Polyphase Implementation of FIR Filters Interpolation Case 1 of 5

L H(z)
H z ! h( n) z  n
n! 0 lL 1

R(zL)

Let n=mL+L-1-k n=mL+L-

H z ! z ( L1 k ) Rk z L
k !0

L 1

with

Rk z !

N / L 1 m !0

hmL  L  1  k z  m

ESIEE, Slide 12

Copyright 2003 Texas Instruments. All rights reserved.

Polyphase Implementation of FIR Filters Interpolation Case 2 of 5

Processing load (MAC/s)

H(z)
N

R0(zL) R1(zL)

z-1
Te/L Time

z-1 RM-1(zL) Fe
ESIEE, Slide 13

L-1 multiplications by 0 over L For each filter evaluation. N filter length.

LFe
Copyright 2003 Texas Instruments. All rights reserved.

Polyphase Implementation of FIR Filters Interpolation Case 3 of 5



Using noble identity

R0(z) R1(z)

L L

z-1

At each output sampling instant, only one component is non zero

z-1 RM-1(z) Fe
ESIEE, Slide 14

L LFe
Copyright 2003 Texas Instruments. All rights reserved.

Polyphase Implementation of FIR Filters Interpolation Case 4 of 5



Equivalent commutator model

Processing load (MAC/s)

R0(z) R1(z)

N/L

RM-1(z)
Te/L Time

Fe

LFe

For each output sampling instant one polyphase component is computed. When we reach again the first component (M-1) a new input sample is inputed (M in the delay line of each polyphase component.
ESIEE, Slide 15 Copyright 2003 Texas Instruments. All rights reserved.

Polyphase Implementation of FIR Filters Interpolation Case 5 of 5


z-1 hL-1 h2L-1 2Lz-1 h1 hL+1 z-1 h0
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Linear Periodically Varying Time system

z-1 h3L-1 3Lz-1 z-1

z-1 h2L+1 z-1 h2L

Copyright 2003 Texas Instruments. All rights reserved.

h0 h1 hL-1

hL hL+1 h2L-1 2L-

h2L h2L+1 h3L-1 3L-

hL

Case Study

Shaping filters for a QPSK modem :

 

Emitter: interpolation case. Receiver: decimation case

Efficient Algorithm Implementation :

 

Good ordering of computations, Efficient memory organization and management.

ESIEE, Slide 17

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Emitter 1 of 4
s(t)=1/2[cos(2Tfot).cos(J(Ak,Bk))-sin(2Tfot).sin(J(Ak,Bk))]

QPSK modulator
Ak bits Bk JO: Phase
computation

JO

Cos()

RCF

DAC

Sin()

RCF

DAC

Fb
Bit frequency

Fs
Symbol frequency

Fe
Sample frequency

ESIEE, Slide 18

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Emitter 2 of 4



Let Fe=16Fs (16 sample / symbol)

Define a raised cosine filter with:
 

6 symbols length. Roll_off : 0.5 h=RCOSFIR(0.5,3,16,1);

Matlab command


Equivalent system 16 H(z)

In red: ideal interpolating filter In blue: actual RC filter

ESIEE, Slide 19 Copyright 2003 Texas Instruments. All rights reserved.

Emitter 3 of 4
 The 16 Polyphase filters are defined by : Filter length is 97, impulse response is padded with 0 to reach 112=7*16

Rk z !

N / L 1 m !0

hmL  L  1  k z

m

With N=112 and L=16

r0 m ! _  , h31 , h47 , h63 , h79 , h95 , h111 h 15 a r1 m ! _  , h30 , h46 , h62 , h78 , h94 , h110 h 14 a / / r15 m ! _ 0 , h , h32 , h48 , h64 , h80 , h96 h 16 a

ESIEE, Slide 20

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Coefficients
h(0) h(16) h(32) h(48) h(64) h(80) h(96) h(1) h(17) h(33) h(49) h(65) h(81) h(97)

Emitter 4 of 4

Symbols
x(0) x(1) x(2) x(3) x(4) x(5) x(6)

Shuffle coefficients
R=flipud(reshape(h,8,12)); R=round(R*2^15); fid=fopen('coef.inc','wt'); for p=1:8 fprintf(fid,'\t.word\t%d\n,R(p,:)) end

1st sample 2nd sample 15th sample

h(15) h(31) h(47) h(63) h(79) h(95) h(111)

fclose(fid);

When coefficient pointer reaches this address a new symbol will be input at the next output sample period
Copyright 2003 Texas Instruments. All rights reserved.

ESIEE, Slide 21

Emitter (C callable)
.sect "coefs2" Ncomp coefs2 coefsfin: coefsize Lfil filbufQ .text _firinit: ST STM RPT STL RET #coefs2,*(adbufQ) #filbufQ,AR2 #Lfil-1 #LfilA,*AR2+ ;pointer to current coefs pointer ;zeroed initial buffer condition .set coefsfin-coefs2 coefsfin.set coefsize/Ncomp ;polyphase component length ;data buffer .usect "filtre2",Lfil .set 16 ;number of polyphase component "coefpoly2.inc" .include

ESIEE, Slide 22

Copyright 2003 Texas Instruments. All rights reserved.

_firTxQ: LD STM MVDM STM STM STL RPTZ MAC MVMD SFTA SFTA CMPM BC MAR RPT endTxQ: RET
ESIEE, Slide 23

;context save #var,DP #coefsize,BK adbufQ,AR2 #1,AR0 #filbufQ,AR3 A,*AR3 A,#Lfil-1 A,#Lfil*AR2+0%,*AR3+,A AR2,adbufQ A,-16 A,A,-1 A,@adbufQ,#coefs2 endTxQ,NTC *+AR3(-2) *+AR3(#Lfil-2 #Lfil;output of RCF can be greater than 1 ! ;test if delay symbols is needed ;jump if not necessary ;save new current coefs pointer ;symbol buffer ;new sample (guess hold during 16 samples) ;compute one polyphase component ;current coefs pointer

DELAY *AR3*AR3;context restore

Copyright 2003 Texas Instruments. All rights reserved.

Symbol vs Sample Output

Symbol output Sample output

Fe: 16 khz Fs: 1 khz (JTconstant for each symbol (JTconstant

f= Fs/8=125 Hz

ESIEE, Slide 24

Copyright 2003 Texas Instruments. All rights reserved.

Receiver 1 of 2

Bit

Symbol

processing processing ADC RCF

ADC

RCF

Fe

Fb

Fs

ESIEE, Slide 25

Copyright 2003 Texas Instruments. All rights reserved.

Receiver 2 of 2


Receiver structure is quite similar, except that:

 

Each polyphase component has its own delay tap Each polyphase output has to be accumulated for M polyphase computations and accumulator is outputed every M input sample and reset.

E0(z) E1(z)

EM-1(z)
ESIEE, Slide 26 Copyright 2003 Texas Instruments. All rights reserved.

Follow on Activities


Laboratory 10 for the TMS320C5416 DSK



Illustrates the effects of decimation and antiantialiasing filters. Illustrates the effects of interpolation and antiantiimaging filters. Uses interpolation and decimation to produce sharper cut-offs FIRs than would be obtained cutotherwise.

Laboratory 11 for the TMS320C5416 DSK



Application 9 for the TMS320C5416 DSK



ESIEE, Slide 27

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Reference


digital signal processing.

Digital Signal Processing a Practical Approach by Emmanuel C. Ifeachor and Barrie W. Jervis. Chapter 9. Multirate

ESIEE, Slide 28

Copyright 2003 Texas Instruments. All rights reserved.