CMOS Circuit Design, Layout And Simulation

Albert Gunadhi, Electrical And Electronic Engineering Department, Widya Mandala Catholic University, Surabaya - Indonesia

Modern Equipment

CMOS IC

Advantages of CMOS IC
High noise immunity Low static power consumption

CMOS Circuit
Complementary Metal-Oxide Semiconductor PMOS NMOS PMOS = NMOS

CMOS Circuit

CMOS Circuit
Inverter Gate Nand Gate Nor Gate Compound Gate Transmission Gate Or Pass Gate

CMOS Circuit
Inverter Gate

CMOS Circuit
Nand Gate

CMOS Circuit
Nand Gate

CMOS Circuit
Nor Gate

CMOS Circuit
Nor Gate

CMOS Circuit
Compound Gate

CMOS Circuit
Transmission Gate Or Pass Gate

CMOS Circuit
Or Gate

CMOS Layout
Stick Diagram Lambda Rules N-Well Process Time Rise = Time Fall Abutting Contact

CMOS Layout
Inverter Gate

CMOS Layout
Inverter Gate
Wp=3,28873Wn

CMOS Layout
Nand Gate

CMOS Layout
Nand Gate
Wp= 3,28873 Wn 3 Wp=1,28873Wn

CMOS Layout
Nor Gate

CMOS Layout
Nor Gate
Wp=3,28873x3Wn Wp=9,86619Wn

CMOS Layout
And Gate

CMOS Layout

CMOS Simulation
Using Microwind 2 Software It s a Free Software Design Rule Checker (DRC) Run Simulation The examples based on lesson at WMCUS

CMOS Simulation
Inverter Gate 2 Input Nand Gate 2 Input And Gate