DE2 -115


DE2-115 Dr. Stephen
Brown

Quartus II CAD
Qsys SDRAM

DE2-115

( )
2012 3


DE2-115

FPGA

DE2-115 !

Altera DE2 DE2-115 DE3 DE4 DE5

IP
Altera 40 28 FPGA
Altera 40Gbps FPGA 1066Mhz DDR3
FPGA
FPGA

20
FPGA (
600 ) DRAM SRAM
USB RS-232

FPGA



Verilog
Altera DE2-115

TimeQuest Timing Analyzer
SDRAM
IR
Qsys

Cyclone IV FPGA

Quartus II
Quartus II

DE2-115

Quartus II

 Verilog

Verilog

 Altera DE2-115

DE2-115
DE2-115
DE2-115

DE2-115
DE2-115

DE2-115

DE2-115

DE2-115

SPI
Quartus II SPI ModelSim

SPI ModelSim
SPI DE2-115 LTM-4.3
Signal Tap II
I2C
Quartus II I2C ModelSim

I2C ModelSim
I2C DE2-115
I2C Audio CODEC Signal Tap II

 (Master) SPI

 (Master)I2C

 TimeQuest Timing Analyzer

GUI TimeQuest Timing
Analyzer
Setup Time Hold Time
Report Timing Critical Path

Chip Planner FPGA

 TimeQuest Timing Analyzer

 SDRAM


SDRAM Verilog
SDRAM

SDRAM

SDRAM

SDRAM

 FPGA 16-bit

DE2-115

 Qsys

NoC
Qsys
My First Nios II
Qsys SOPC
DE2-115
Qsys
DE2-115 SDRAM

IP

 Qsys
SDRAM

Qsys

Qsys

SDRAM

 (Master) SPI

(Master) SPI

I2C (Master)

(Master)I2C

Verilog

IR

IR

IR

IR

IR

SDRAM

SDRAM

DE2-115

TimeQuest Timing Analyzer

 TimeQuest Timing Analyzer

 OK

OK

 OK

OK

PS/2

PS/2

USB

USB

USB

USB

DE2-115 USB

DE2-115 USB

DE2-115 USB

DE2-115 USB

SD

SD

SD

SD

SD

SD

SD

Nios II