November 23, 2009 [TALHA MAQSOOD]

Application of JFET’s
1) JFET as a switch
2) JFET as a Chopper
3) JFET as a Current source
4) JFET as a Amplifier
5) JFET as a Buffer

1. JFET as a switch
The field-effect transistor may be used as an on/off switch controlling electrical
power to a load. Let's begin our investigation of the JFET as a switch with our familiar
switch/lamp circuit:

Remembering that the controlled current in a JFET flows between source and drain, we

substitute the source and drain connections of a JFET for the two ends of the switch  in the
above circuit:

If you haven't noticed by now, the source and drain connections on a JFET  look identical on
the schematic symbol. Unlike the bipolar junction transistor where the emitter is clearly
distinguished from the collector by the arrowhead, a JFET's source and drain lines both run
perpendicular into the bar representing the semiconductor channel. This is no accident,
as the source and drain lines of a JFET are often interchangeable in practice! In other words,
JFETs are usually able to handle channel current in either direction, from source to drain or
from drain to source.
Now all we need in the circuit is a way to control the JFET's conduction. With zero applied
voltage between gate and source, the JFET's channel will be "open," allowing full current to

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the lamp. In order to turn the lamp off, we will need to connect another source of DC
voltage between the gate and source connections of the JFET like this:

Closing this switch will "pinch off" the JFET's channel, thus forcing it into cutoff and turning
the lamp off:

Note that there is no current going through the gate. As a reverse-biased PN junction, it
firmly opposes the flow of any electrons through it. As a voltage-controlled device, the
JFET requires negligible input current. This is an advantageous trait of the JFET over the
bipolar transistor: there is virtually zero power required of the controlling signal.
Opening the control switch again should disconnect the reverse-biasing DC voltage from the
gate, thus allowing the transistor to turn back on. Ideally, anyway, this is how it works. In
practice this may not work at all:

Why is this? Why doesn't the JFET's channel open up again and allow lamp current through
like it did before with no voltage applied between gate and source? The answer lies in the
operation of the reverse-biased gate-source junction. The depletion region within that

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junction acts as an insulating barrier separating gate from source. As such, it possesses
a certain amount of capacitance capable of storing an electric charge potential. After this
junction has been forcibly reverse-biased by the application of an external voltage, it will
tend to hold that reverse-biasing voltage as a stored charge even after the source of that
voltage has been disconnected. What is needed to turn the JFET on again is to bleed off that
stored charge between the gate and source through a resistor:

This resistor's value is not very important. The capacitance of the JFET's gate-source junction
is very small, and so even a rather high-value bleed resistor creates a fast RC time constant,
allowing the transistor to resume conduction with little delay once the switch is opened.
Like the bipolar transistor, it matters little where or what the controlling voltage comes
from. We could use a solar cell, thermocouple, or any other sort of voltage-generating
device to supply the voltage controlling the JFET's conduction. All that is required of a
voltage source for JFET switch operation is sufficient voltage to achieve pinch-off of the
JFET channel. This level is usually in the realm of a few volts DC, and is termed the pinch-
off or cutoff voltage. The exact pinch-off voltage for any given JFET is a function of its unique
design, and is not a universal figure like 0.7 volts is for a  silicon BJT's base-emitter junction
voltage.

2. JFET as a Chopper
 A direct-coupled amplifier can be built by leaving out the coupling and bypass
capacitors and connecting the output of each stage directly to the input of next
stage. Thus direct current is coupled, as well as alternating current. The major
drawback of this method is occurrence of drift, a slow shift in the final output voltage
produced by supply transistor, and temperature variations. The drift problem can be
overcome by employing chopper amplifier as illustrated in figure.

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Chopper Amplifier

(a). Here input dc voltage is chopped by a switching circuit. The output of chopper is a
square wave ac signal having peak value equal to that of input dc voltage, V DC. This ac signal
can be amplified by a conventional ac amplifier without any problem of drift. Amplified
output can then be ‘peak detected’ to recover the amplified dc signal.

Square wave is applied to the gate of a FET analog switch to make it operate like a chopper,
as illustrated in other figure. The gate square wave is negative-going swing from 0 V to at
least VGS(off)- This alternately saturates and cuts-off the JFET. Thus output voltage is a square
wave varying from +VDC to zero volt alternately.

If the input signal is a low-frequency ac signal, it gets chopped into the ac waveform as
shown in last figure (c). This chopped signal can now be amplified by an ac amplifier that is
drift free. The amplified signal can then be peak-detected to recover the original input low
frequency ac signal. Thus both dc and low frequency ac signals can be amplified by using a
chopper amplifier.

Design Options for the FETS Chopper Line

Fast chopper chops 3 bunches, during that time the slow chopper rises to full voltage and
chops for 240 ns-0.1 ms, chopped beam is collected on the plates of the slow chopper, to
minimise heat load 2 units of fast/slow choppers were employed.

Chopped beam from the slow chopper is collected in subsequent period in a dedicated
dump ! _ 30% of original plate voltage required (6 kV ! 1.7 kV), ! faster rise time for slow
chopper, now fast chopper only needs to chop 2 bunches, ! smaller bandwidth required for
fast chopper which should improve performance of fast chopper pulser (droop, rise time),

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dedicated beam dump can be designed to take full beam power ! no need for 2 identical
chopper sections.

3. JFET as a Current source

The combination of low associated operating voltage and high output impedance makes
the FET attractive as a constant-current source. An adjustable-current source (Figure 1)
may be built with a FET, a variable resistor, and a small battery. For optimum thermal
stability, the FET should be biased near the zero temperature coefficient point.

Whenever the FET is operated in the current saturated region, its output conductance is
very low. This occurs whenever the drain-source voltage VDS is at least 50% greater than
the cut-off voltage VGS(off). The FET may be biased to operate as a constant-current source
at any current below its saturation current IDSS.
For a given device where IDSS and VGS(off) are known, the approximate VGS required for a
given ID is

where k can vary from 1.8 to 2.0, depending on device geometry. If K = 2.0, the series
resistor RS required between source and gate is

A change in supply voltage or a change in load impedance, will change ID by only a small
factor because of the low output conductance goss

The value of goss is an important consideration in the accuracy of a constant-current

source where the supply voltage may vary. As goss may range from less than 1µS to
more than 50µS according to the FET type, the dynamic impedance can be greater than
1 MΩ to less than 20 kΩ. This corresponds to a current stability range of 1µA to 50µA per

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volt. The value of goss also depends on the operating point. Output conductance goss
decrease approximately linearly with ID. The relationship is

So as VGS →VGS(off), goss →Zero. For best regulation, ID must be considerably less than IDSS.

A current source based on a JFET

The circuit schematic below (which has been entered into the PSpice circuit simulator)
shows a simple way of doing this using a JFET.The negative terminal of the supply V1
(battery symbol) is connected to Ground, also known as Node 0, and represents the
reference point for any measurements we might make.  Although the battery voltage is
indicated as 5V, PSpice will let us vary this experimentally over any required range.  The
current developed by the circuit flows in the drain circuit, and is in fact I D.  For this
application a light-emitting diode LED is shown as the load, in which the constant current
flows.  This is a very typical usage for this kind of circuit;  the LED works most consistently
(giving a steady light output) if the current passing through it can be maintained constant,
even if the supply voltage changes - for example, as the battery discharges.

The circuit can be described as a self-biased JFET: the source resistor R determines the gate
source voltage through the relationship VGS = -VS0 = -ID R

This allows a range of currents to be achieved, since the operating conditions of the JFET can
be chosen by selecting the value of R, which determines the relative values of I D and VGS . 

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Using PSpice to predict the behavior of the circuit

PSpice can help us to predict many aspects of the circuit design's behaviour before we
construct it.  In order to model the voltage-current characteristic of a non-linear device like
a FET, PSpice can use a number of different mathematical models.  For this application, the
JFET is modelled using an expression based on a binomial approximation for the
dependence of ID on VDS and VGS.  Different JFET types require different coefficients to be
used in the expression, and these can be incorporated. Here the PSpice simulator has been
used to predict the performance of the circuit as the supply voltage is varied over a range.  If
the design is working correctly, we expect to find the current to be independent of V1. 
PSpice has been used to predict the circuit's behavior with different values of R, from 0
ohms to 1000 ohms.  We expect to see the current change as different values of R are
introduced.

The family of curves shown above represent the pSpice output.  The expected value of
ID (the current in the LED) is plotted against the supply voltage V1, for various different
values of R.

We can see that provided the supply voltage V1 lies within the range 5 volts to 25 volts
approximately, the current hardly varies with V1: it is effectively constant.  However, when
V1 falls below about 5 volts the circuit is seen to fail, as the current drops rapidly.The
selection of the value for R can be seen to have a considerable effect on the constant
current obtained. By suitable choice of R, a constant current anywhere in the range of about
2 - 12 mA can be obtained.  Looking at the curve for R=0, we can see how the circuit on page
85 of the notes will behave.  Under these condition we know from the transfer charact
eristic that the JFET will operate with a drain current equal to IDSS .  The disadvantage of this
very simple circuit is that you are stuck with the value of IDSS for the particular transistor you
have chosen, and this can vary considerably from transistor to transistor.  Including R gives
the circuit much greater versatility.

Although the JFET can provide a simple solution for the design of a current source, it is not
the best solution obtainable. Much better designs can be achieved using bipolar transistors,

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or by using operational amplifiers By use of suitable mathematical models for these

components, PSpice can also predict the performance of these different approaches, and is
therefore a powerful ally for the electronic circuit designer.  However, it is important to
remember that the results obtained are only as accurate as the numerical models used to
represent the devices being simulated.  In a real circuit, manufacturing tolerances and other
variables (e.g. temperature) may cause the real circuit to operate quite differently from the
simulation.  A good designer will always take these possibilities into account. 

4. JFET as a Amplifier

Small signal amplifiers can also be made using Field Effect Transistors or FET's. These
devices have the advantage over bipolar devices of having an extremely high input
impedance along with a low noise output making them very useful in amplifier
circuits using very small signals. The design of an amplifier circuit based around a
JFET (n-channel FET for this example) or even a MOSFET is exactly the same principle
as that for a bipolar device and for a Class A amplifier as we looked at in the previous
tutorial. A suitable Quiescent point still needs to be found for the correct biasing of
the amplifier circuit with amplifier configurations of Common Source, Common Drain
and Common Gate available for FET devices. In this tutorial we will look at the JFET
Amplifier as a common source amplifier as this is the most widely used design.
Consider the Common Source JFET Amplifier circuit below.

Common Source JFET Amplifier

The circuit consists of an N-channel JFET, but the device could also be an equivalent
N-channel Depletion-mode MOSFET as the circuit diagram would be the same, just a
change in the FET. The JFET Gate voltage Vg is biased through the potential divider
network set up by resistors R1 and R2 and is biased to operate within its saturation

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region which is equivalent to the active region of the BJT. The Gate biasing
voltage Vg is given as:

Note that this equation only determines the ratio of the resistors R1 and R2, but in
order to take advantage of the very high input impedance of the JFET as well as
reducing the power dissipation within the circuit, we need to make these resistor
values as high as possible, with values in the order of 1 to 10MΩ being common.

The input signal, (Vin) is applied between the Gate terminal and 0v with the Drain
circuit containing the load resistor, Rd. The output voltage, Vout is developed across
this load resistance. There is also an additional resistor, Rs included in the Source
lead and the same Drain current also flows through this resistor. When the JFET is
switched fully "ON" a voltage drop equal to Rs x Id is developed across this resistor
raising the potential of the Source terminal above 0v or ground level. This voltage
drop across Rs due to the Drain current provides the necessary reverse biasing
condition across the Gate resistor, R2. In order to keep the Gate-source junction
reverse biased, the Source voltage, Vs needs to be higher than the gate voltage, Vg.
This Source voltage is therefore given as:

Then the Drain current, Id is also equal to the Source current, Is as "No Current"
enters the Gate terminal and this can be given as:

This potential divider biasing circuit improves the stability of the common source
JFET circuit when being fed from a single DC supply compared to that of a fixed
voltage biasing circuit. Both Resistor, Rs and Capacitor, Cs serve basically the same
function as the Emitter resistor and capacitor in the Common Emitter Bipolar
Transistor amplifier circuit, namely to provide good stability and prevent a reduction
in the signal gain. However, the price paid for a stabilized quiescent Gate voltage is
that more of the supply voltage is dropped across Rs.

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The basic circuit and characteristics of a common source JFET amplifier are very

similar to that of the Common Emitter amplifier. A DC load line is constructed by
joining the two points relating to the Drain current, Id and the supply
voltage, Vdd intersecting the curves at the Q-point as follows.

JFET Amplifier Characteristics Curves

As with the Common Emitter circuit, the DC load line produces a straight line
equation whose gradient is given as: -1/(Rd + Rs) and that it crosses the
vertical Id axis at a point equal to Vdd/(Rd + Rs). The other end of the load line crosses
the horizontal axis at a point equal to Vdd. The actual position of the Q-point on the
DC load line is determined by the mean value of Vg which is biased negatively as the
JFET as a depletion-mode device. Like the bipolar common emitter amplifier the
output of the Common Source JFET Amplifier is 1800 out of phase with the input
signal.

One of the main disadvantages of using Depletion-mode JFET is that they need to be
negatively biased. Should this bias fail for any reason the Gate-source voltage may

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rise and become positive causing an increase in Drain current resulting in failure of
the Drain voltage, Vd. Also the high channel resistance,Rds(on) of the JFET, coupled
with high quiescent steady state Drain current makes these devices run hot so
additional heatsink is required. However, most of the problems associated with using
JFET's can be greatly reduced by using enhancement-mode MOSFET devices instead.

5. JFET as a Buffer
Buffers present a high impedance to the guitar pickup and have a low impedance
output drive with a gain close to unity (unity gain = 1). This is an excellent addition in
front of a vintage wah-wah or other circuit that can rob the signal of high frequency
response. Buffers are simple, easy and cheap to construct.
Before we see the circuits let us look at a circuit fragment that may be required for some
of the buffer variations. As shown to the left, the resistor/capacitor network provides a
reference voltage that may be used to bias the transistor or opamp into the best
operating range. The point marked "Vr" is connected to the point also notated as "Vr"
on the buffer schematic. If there is a reference voltage already established in a circuit to
which you are planning to add a buffered input, the existing Vr can
be tapped and used for the buffer's reference. 

Probably the easiest buffer is the basic jfet common drain amplifier. The input impedance is
determined by the value of R1 and is 1M as shown in this example. The value of R2 is not
too critical and may be any value from 3.3k to 10k without much change in the sound. I
prefer to use lower values since this allows more drive on the negative portion of the audio
cycle where the only pull-down is the source resistor. This configuration has the least
number of parts but is limited in that if the input voltage exceeds the gate-source forward
voltage plus the bias voltage at the source, the signal will be clipped. This configuration is
not normally useful with bipolar or mosfet transistors, which require a positive bias voltage
(for N-type devices). Input impedance is approximately
the value of R1. The output impedance will depend on
the jfet but is on the order of a few hundred ohms. 

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The basic jfet buffer shown in the last paragraph may be improved upon by connecting the
gate resistor to a bias voltage instead of to ground. This allows the gate voltage to set the
bias at the source to a higher vlaue which increases the headroom and allows a large signal
input before clipping. The Vr point on this circuit connects to a bias voltage source as shown
in the first paragraph. Input impedance is again approximately the value of R1. It could
easily be increased to 10M or more for a cleaner
sound with high impedance signal sources such as high-
output humbuckers or piezo sensors with only a slight
incerase in the thermal noise contributed by the higher value
of R1. 

If you do not have a bias source available for Vr and you

want to keep down the parts count, the gate bias can be set
by a pair of resistors as
shown in this example. The
input impedance is
the value of R1 paralleled by R3, or 500k ohms in this
example, but you could easily increase their values to 2M
to maintain the 1M input Z.

A bipolar transistor may also be pressed into service if

the input impedance does not have to be as high as that
available from jfets. The advantage is that the bipolars
usually have a lower output impedance and are generally easier to find. The disadvantage is
the lower input impedance available as compared to fets. 

An alternate configuration is shown here that uses the voltage bias on the input in the same
manner as the second jfet example above. This is the buffer used in the TS-series distortion
boxes. 

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If you substitute a mosfet transistor into the circuit of the last example and tweak the
source and gate resistor values, it is essentially the AMZ Mosfet Booster in buffer mode.
(See how these building blocks are useful?) A 9v zener diode (D1) is used for static
protection on the mosfet gate. Mosfets have high capacitances between its electrodes and
though there is no Miller Effect to multiply those capacitances, their value can nonetheless
be high enough to cause high frequency rolloff depending on the characteristics of the
individual mosfet transistors.

It is also possible to use a pair of 10M resistors to provide the bias voltage to the gate of the
mosfet similar to the earlier Dr. Quack buffer. 

An opamp is an even better buffer amplifier, though

many believe they are somewhat colder sounding
and more sterile than the transistor versions.
The opamp gain is exactly unity and the output
impedance is quite low; typically measured in tens
of ohms instead of hundreds as with the
transistors. It also has the lowest parts count of
any of the simple buffers presented here. 

Voltage divider biasing is also possible with the opamp

and the input impedance is calculated the
same way as with the transistor versions similarly
biased. 

This opamp buffer inverts the signsignal, which is useful when used in conjunction with
following gain stages that also invert the signal and therefore would make the output non-
inverted when compared to the input. This is important if the signal is mixed with other
signals from the same source since cancellation could occur otherwise. The gain is unity and
is set by R2/R1. The small 5pF capacitor is optional and gradually rolls off the high
frequencies above the audible range. The input impedance of this circuit is the value of R1. 

Miscellaneous: Selection of the jfet or bipolar type is not critical, almost any transistor will
work fine without problems. The gain of the transistor versions is slightly less than 1,
probably 0.9 to 0.96. Transistors with higher hfe will be slightly closer to unity gain.

The transistor circuits have very poor power supply noise rejection. Battery power works
well with them but if used with an AC adapter, it must be well filtered and hum-free or the
noise will be combined with the signal.

For the jfet or mosfet circuits that use a single resistor on the gate for bias, you can increase
the value of R1 to provide a higher input impedance. I typically use jfets on inputs and
bipolars for output buffers where their better drive characteristics are needed.

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