CU TRC VI X L V VI IU KHIN

PHAN HI PHONG Khoa Vt L Trng H Khoa Hc Hu haiphongphan@gmail.com

M u

1971: tp on Inter gii thiu 8080.

Sau cc tp on nh Motorola, MOS-Technology, Zilog cng gii thiu cc b vi x l tng t: 6800, 6520, Z80...

1976: Inter gii thiu b vi iu khin 8748, chip u tin trong h VK MCS-48.

8748 bao gm: 1 CPU, 1Kb EPROM, 64 Byte RAM, 27 chn xut nhp v mt b nh thi 8 bit.

1980: Inter cng b 89C51, VK u tin ca h MSC-51.

89C51 cha trn 60000 transistor bao gm 4Kb ROM, 128 byte RAM, 32 ng IO, 1 port ni tip, 2 b nh thi 16 bit.

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Chng I

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S khi mt h vi x l

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Vi x l (P)

Thc hin cc thao tc tnh ton trn d liu a ra tn hiu iu khin hot ng cho ton b h thng Gm cc mch l-gc thc hin lin tc vic np lnh v thc hin lnh Hot ng theo mt chui cc lnh my c sn -> chng trnh

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Phn loi vi x l

Theo s bit c th c x l ng thi: 4 bit, 8 bit, 16 bit, 32 bit Theo tp lnh:

tp lnh phc hp (CISC: Complex Instruction Set Computer) tp lnh thu gn (RISC: Reduced Instruction Set Computer) kin trc Von Neumann: vng nh d liu v chng trnh khng c phn chia c lp (truy cp trn cng mt ng a ch) kin trc Harvard: vng nh cho chng trnh v cho d liu c phn bit r rng

Theo kin trc:

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Cu trc mt vi x l

Lung d liu (Datapath): lu gi v x l (tnh ton) d liu, tc ng trc tip trn thng tin n v iu khin (Control Unit): a ra nhng tn hiu iu khin iu khin hot ng ca Datapath Hai thnh phn ny cng c xy dng t cc mch dy v mch l-gc t hp

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Kin trc chung ca vi x l

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Cu trc Datapath

Khi tnh ton s hc l-gc (ALU: Arithmetic Logic Unit): x l thng tin (thc hin cc php ton trn d liu) Khi nh: lu tr d liu u vo, u ra, cc bin tm thi, cc tham s ng bus d liu: vn chuyn d liu gia cc phn t nh v t cc phn t nh n khi tnh ton

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Khi tnh ton s hc v logic

Gm:

B cng B tr B ghi dch Khi thc hin php ton l-gc B nhn chia

Cc mch tnh ton l mch l-gc t hp (khng cha cc phn t nh) => ng vo ca cc ton hng v li ra cho kt qu/trng thi lun phi c thm cc mch cht lu cc gi tr ny.

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10

Khi nh

Cc thanh ghi (register) chung: lu d liu tm thi Cc thanh ghi c chc nng c bit:

thanh ghi lnh (instruction register): lu tr m lnh ca lnh (opcode) thanh ghi b m chng trnh (Program counter): cung cp a ch hin ti m vi x l ang truy nhp ti b nh chng trnh thanh ghi con tr cha a ch d liu (DPTR: Data Pointer) a ch vng ngn xp (SP: Stack Pointer)

Cc thanh ghi c nh a ch v c qun l nh mt vng nh c bit.

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11

Cu trc v hot ng ca n v iu khin

c thc thi bng mt my trng thi (SM), kt hp vi cc mch logic iu khin.

Tn hiu ra ca SM: iu khin Datapath Tn hiu vo ca SM: cc lnh iu khin

Lnh c lu trong b nh chng trnh Qu trnh thc thi mt lnh:

Np lnh Gii m lnh Thc hin lnh

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12

Qu trnh np lnh

n v iu khin a ni dung ca b m chng trnh ln bus a ch ca b nh chng trnh v cho php c b nh ny. D liu c c ra t b nh chng trnh s c a ln bus li vo ca vi x l. D liu ny chnh l m lnh (opcode). Opcode c cht vo thanh ghi lnh ca vi x l v b m chng trnh c tng ln mt n v, tr ti byte m chng trnh tip theo.

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13

Hot ng bus cho chu k tm np lnh

Bus a ch N B m chng trnh Bus d liu Opcode Thanh ghi lnh RAM N+2 N+1 Clock Read Opcode N N-1

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B nh bn dn

Cc chng trnh v d liu c lu gi trong b nh. Cc b nh c truy xut trc tip bi CPU: ROM, RAM, flash. RAM:

B nh c th c/ghi Mt ni dung khi mt ngun nui. Chng trnh v d liu ca ngi dng s c np vo RAM thc thi. B nh ch c Khng mt ni dung khi khng c ngun nui.

ROM:

Flash: B nh c/ghi, khng mt d liu khi mt ngun nui

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BUS: a ch, d liu v iu khin

Bus: tp cc dy dn mang nhng thng tin c cng mt mc ch. Vic truy cp n mt mch quanh CPU s dng ba bus: bus a ch, bus d liu, bus iu khin. Thao tc c/ghi:

CPU xc nh v tr ca d liu bng cch t mt a ch ln bus a ch Xut tn hiu iu khin ln bus iu khin xc nh thao tc l c hay ghi Ly byte d liu t b nh a ch xc nh, t byte ny ln bus d liu. CPU c d liu v a vo cc thanh ghi ni hoc CPU xut d liu ln bus d liu

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Cu trc chung ca mt VK
Bus a ch

Bus d liu

CPU
Bus iu khin

Mch giao tip RAM ROM

Thit b ngoi vi

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17

Chng II

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Tng qut

Vi mch c trng ca h MSC-51 l chip 89C51.

4 KB b nh Flash 128 byte RAM 4 port xut nhp 8 bit 2 b nh thi 16 bit Mch giao tip ni tip UART Khng gian nh chng trnh ngoi 64Kbyte Khng gian nh d liu ngoi 64Kbyte B x l bit 210 v tr nh c nh a ch, mi v tr 1 bit

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S chn ca VK 89C51

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S khi tng qut ca chip 89C51

External interrupts Interrupt Control On-chip ROM for program code
Timer/Counter

On-chip RAM

Timer 1 Timer 0

Counter Inputs

CPU
Serial Port

OSC

Bus Control

4 I/O Ports

P0 P1 P2 P3

TxD RxD

Address/Data

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S khi chi tit ca chip 89C51

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Cc cng vo ra ca VK 89C51

Port 0 (cc chn t 32-39): lm nhim v xut/nhp hoc lm bus a ch v bus d liu a hp (byte thp ca bus a ch). Port 1 (cc chn t 1-8): lm nhim v xut/nhp giao tip vi thit b ngoi. Port 2 (cc chn t 21-28): lm nhim v xut/nhp hoc lm byte a ch cao ca bus a ch 16-bit. Port 3 (cc chn t 10 n 17): Nu khng lm chc nng xut nhp th mi chn ca port 3 c nhng chc nng ring khc nhau

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Chc nng cc chn ca P3 v P1

Bit P3.0 P3.1 P3.2 P3.3 P3.4 P3.5 P3.6 P3.7 P1.0 P1.1 Tn RxD TxD /INT0 /INT1 T0 T1 /WR /RD T2 T2EX a ch bit B0h B1h B2h B3h B4h B5h B6h B7h 90h 91h Chc nng Nhn d liu ca port ni tip Pht d liu ca port ni tip Ng vo ngt ngoi 0 Ng vo ngt ngoi 1 Ng vo ca b nh thi/m 0 Ng vo ca b nh thi/m 1 iu khin ghi b nh d liu ngoi iu khin c b nh d liu ngoi Ng vo ca b nh thi/m 2 Np li/thu nhn tn hiu ca b nh thi 2

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Chn cho php b nh chng trnh PSEN

Cho php truy xut b nh chng trnh ngoi. Chn ny thng c ni vi chn cho php xut OE ca EPROM (hoc ROM) cho php c cc byte lnh. C mc tch cc thp. Khi thc hin chng trnh RAM ni, chn ny c duy tr mc logic 1.

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Chn cho php cht a ch ALE

Xut tn hiu cho php cht a ch gii a hp bus d liu v bus a ch. Khi port 0 c dng lm bus a ch/ d liu a hp, chn ALE xut tn hiu cht a ch v mt thanh ghi ngoi trong sut chu k u ca chu k b nh. Sau , cc chn ca port 0 s xut nhp d liu hp l trong chu k tip theo. ALE c f=1/6 fclock.

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Chn truy xut ngoi EA

Nu mc logic 1 th VK thc thi chng trnh trong ROM ni. Nu mc logic 0 th VK thc thi chng trnh trn b nh ngoi.

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Cc chn khc

Chn Vcc (chn 40) ni vi ngun +5V Chn GND (chn 20) ni vi t Chn RESET (chn 9) dng thit lp li trng thi ban u cho h thng.

Khi c treo logic 1 trong thi gian ti thiu 2 chu k my, cc thanh ghi bn trong 89C51 c np li cc gi tr thch hp cho vic khi ng li h thng

Chn XTAL1 v XTAL2 (chn 18-19) ni vi thch anh cung cp dao ng ngoi cho VK, hoc l nhn dao ng t ngun xung clock TTL.

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Mch dao ng

89C51

89C51

Dao ng TTL

XTAL1

XTAL1

XTAL2
Ghp vi mch dao ng TTL ngoi

XTAL2

Ghp vi mch dao ng thch anh

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T chc b nh

B nh ni ca chip 89c51 bao gm ROM v RAM RAM trn chip bao gm:

Vng RAM a chc nng Vng RAM nh a ch bit Cc dy thanh ghi Cc thanh ghi chc nng c bit
Cc thanh ghi v cc port xut/nhp c nh a ch theo kiu nh x b nh v c truy xut nh mt v tr trong b nh. Vng Stack thng tr trong RAM ni thay v trong RAM ngoi nh i vi vi x l

Hai c tnh cn ch :

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S a ch RAM ni
7Fh

Vng RAM a mc ch

30h 2Fh

Vng RAM nh a ch bit

20h 1Fh
18h 17h 10h 0Fh 08h 07h 00h

Bank 3 Bank 2 Bank 1 R0 R7

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Vng RAM a mc ch

Gm 80 byte t a ch 30h n 7Fh Vng RAM t a ch 00h n 2Fh: vng c th nh a ch n tng bit. Vic truy xut mt v tr nh c thc hin bng cch s dng kiu nh a ch trc tip hoc gin tip. V d: c ni dung ti a ch 5Fh ca RAM ni vo thanh ghi A

nh a ch trc tip: MOV A,5Fh nh a ch gin tip: MOV R0, #5FH MOV A,@R0
32

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Vng RAM nh a ch bit

89C51 cha 210 v tr bit c nh a ch trc tip:

128 bit c cha trong cc byte t 20h n 2Fh. Phn cn li nm trong cc thanh ghi c bit (trong khong a ch t 80h n FFh). Vic nh a ch n tng bit cho php cc bit c th c t v xa...bng mt lnh. Cc port ca 89C51 cng c nh a ch bit Nu khng c nh a ch bit (vi vi x l) th ta phi dng lnh
MOV A,2Ch OR A,#10000000b MOV 2Ch,A

V d: set bit 67h ta dng lnh: SETB 67h

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Cc dy thanh ghi

Cha trong 32 v tr thp nht ca RAM, gm 4 dy thanh ghi. Mi dy gm 8 thanh ghi t R0 n R7. Lnh s dng cc thanh ghi trong dy l lnh ngn v thc hin nhanh hn so vi kiu nh a ch trc tip. V d: lnh c ni dung ti a ch 05h vo thanh cha A
hoc: MOV A,R5 MOV A,05h ;lnh 1 byte ;lnh 2 byte

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34

Cc dy thanh ghi

Dy thanh ghi ang hot ng c gi l dy thanh ghi tch cc v c th thay i bng cch thay i cc bit chn dy trong thanh ghi t trng thi chng trnh PSW. Dy thanh ghi mc nh sau khi reset h thng l dy 0. V d: gi s dy 3 ang tch cc, lnh ghi ni dung ca thanh cha A vo v tr 18h l
MOV R0,A

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Cc thanh ghi chc nng c bit (SFR)

VK 89C51 c 21 thanh ghi c bit SFR chim phn trn ca RAM ni t a ch 80h n FFh (Ch : khng phi tt c cc a ch u c nh ngha).

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Thanh ghi t trng thi chng trnh PSW

Bit PSW.7
PSW.6 PSW.5 PSW.4 PSW.3

K hiu a ch CY
AC F0 RS1 RS0

M t C nh
C nh ph C 0 Chn dy thanh ghi (bit 1) Chn dy thanh ghi (bit 0) 00 = bank 0: a ch t 00h 01 = bank 1: a ch t 08h 10 = bank 2: a ch t 10h 11 = bank 3: a ch t 18h C trn D tr C kim tra chn l

D7h
D6h D5h D4h D3h

07h 0Fh 17h 1Fh

PSW.2 PSW.1 PSW.0

OV P

D2h D1h D0h

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Thanh ghi B

a ch: F0h F7h Thanh ghi B c a ch F0h c dng chung vi thanh ghi A trong cc php ton nhn, chia. Lnh MUL AB: nhn hai s 8 bit khng du cha trong A v B. Kt qu 16 bit c cha trong cp thanh ghi B:A (thanh ghi A cha byte thp, thanh ghi B cha byte cao). Lnh DIV AB:chia A bi B, thng s ct trong thanh cha A v d s ct trong thanh ghi B.

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Con tr Stack

Con tr Stack (Stack pointer SP) l 1 thanh ghi 8 bit a ch 81h. SP cha a ch ca d liu hin ang nh ca Stack. Nu ta khng khi ng SP, ni dung mc nh ca thanh ghi ny l 07h.

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Con tr d liu DPTR

Con tr d liu DPTR (data pointer) c dng truy xut b nh chng ngoi hoc b nh d liu ngoi. DPTR l 1 thanh ghi 16 bit c a ch l 82h (DPL, byte thp) v 83h (DPH, byte cao). V d: ghi gi tr 55h vo a ch 1000h RAM ngoi
MOV A,#55h MOV DPTR,#1000h MOV @DPTR,A

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40

Cc thanh ghi cng

Cc port xut nhp ca 89C51 bao gm: port 0 (a ch 80h), port 1 (a ch 90h), port 2 (a ch A0h), port 3 (a ch B0h). Cc port 0, 2, 3 khng c dng xut/nhp nu ta s dng b nh ngoi hoc cc chc nng c bit ca 89C51. Cc port u c nh a ch tng bit.

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Cc thanh ghi nh thi

89C51 c 2 b nh thi/m 16 bit:

B nh thi 0 c a ch 8Ah (TL0 byte thp) v 8Ch (TH0 byte cao). B nh thi 1 c a ch 8Bh (TL1 byte thp) v 8Dh (TH1 byte cao).

Hot ng ca b nh thi c thit lp bi:

Thanh ghi ch nh thi TMOD (time mode register) a ch 89h. Thanh ghi iu khin nh thi TCON (time control register) a ch 88h.

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Cc thanh ghi ca cng ni tip

Thanh ghi m d liu ni tip SBUF (serial data buffer):

C a ch 99H. Ni lu d liu truyn i v d liu nhn v

Thanh ghi iu khin port ni tip SCON (serial port control register) a ch 98H.

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Cc thanh ghi ngt

89C51 c mt cu trc ngt vi 2 mc u tin v 5 nguyn nhn ngt. Ngt b v hiu ha khi reset h thng v sau c cho php bng cch ghi vo thanh ghi cho php ngt IE (interrupt enable register - A8h). Mc u tin ngt c thit lp thng qua thanh ghi u tin ngt IP (interupt priority register - B8h).

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Thanh ghi iu khin ngun PCON (87h)

Bit 7 6 5 4 3 2 1 0

K hiu SMOD GF1 GF0 PD IDL

M t Tng gp i tc baud Khng nh ngha Khng nh ngha Khng nh ngha Bit c a mc ch 1 Bit c a mc ch 2 Ch ngun gim Ch ngun ngh

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B nh ngoi

Cu trc ca MCS-51 cho php m rng khng gian b nh v khng gian d liu ln n 64 Kbyte. Khi s dng b nh ngoi, port 0 tr thnh bus a ch (A0-A7) v bus d liu (D0-D7) a hp. Port 2 thng c dng lm byte cao ca bus a ch.

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a hp v khng a hp
Chu k my A0-A15 a ch

D0-D7

D liu Khng a hp Chu k my

A8-A15

a ch a ch a hp (Multiplex) D liu

AD0-AD7

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c ROM (1)
PSEN ALE P0.0 P0.7 Address D0 EA P2.0 P2.7 D7 1. Send address to ROM

2. 74373 latches the address and send to OE ROM OC G 74LS373 A0

D

A7

A8 A15

89C51

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ROM

48

c ROM (2)
PSEN ALE P0.0 P0.7 2. 74373 latches the address and send to ROM
G D

74LS373

OE OC A0 A7

Address

D0 EA P2.0 P2.7 D7 3. ROM send the instruction back A8 A15

89C51

ROM

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c RAM
ALE P0.0 P0.7
G D

74LS373
A0 A7

Address

D0 EA P2.0 P2.1 RS WR D7 A8 A9 OE W CS

89C51

RAM

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Chng 3

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Cc kiu nh a ch

Thanh ghi (register) Trc tip (direct) Gin tip (indirect) Tc thi (immediate) Tng i (relative) Tuyt i (absolute) Di (long) Ch s (indexed)

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nh a ch thanh ghi

Lnh s dng kiu nh a ch thanh ghi c m ha bng cch dng 3 bit thp nht ca m lnh (opcode) ch ra mt thanh ghi bn trong khng gian a ch logic M lnh v a ch ton hng (3 bit) kt hp thnh 1 lnh ngn (1 byte) Truy xut trc tip 8 thanh ghi R0 R7

V d: ADD A,R7 00101: lnh cng 111: thanh ghi R7

(opcode: 00101111b)

opcode

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nh a ch trc tip

c s dng truy xut cc bin nh hoc cc thanh ghi trn chip M lnh v a ch ton hng kt hp thnh 1 lnh 2 byte V d: chuyn ni dung ca thanh ghi A vo a ch 90h (P1) MOV P1,A (opcode: 10001001 - 10010000) 10001001: opcode 10010000: a ch ca P1 (90h)

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nh a ch gin tip

Cc thanh ghi R0 v R1 hot ng nh l cc con tr Ni dung ca chng ch ra a ch trong RAM, ni d liu c c hoc ghi. Bit c ngha thp nht trong opcode xc nh thanh ghi c dng lm con tr. c nhn bit nh vo k t @ t trc R0 hoc R1. V d: nu R1 cha 40h v a ch 40h cha 55h, lnh:
MOV A,@R1 Np 55h cho A

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nh a ch tc thi

Dng khi ton hng ngun l mt hng s thay v mt bin. Nhn bit nh vo k t # t trc ton hng. V d: MOV A, #12; Np gi tr 12 (0Ch) vo thanh ghi A

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Cc loi lnh

Nhm lnh s hc Nhm lnh logic Nhm lnh di chuyn d liu Nhm lnh x l bit Nhm lnh r nhnh

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Mt s phng php nh a ch

nh a ch thanh ghi: truy xut trc tip cc thanh ghi t R0 R7 nh a ch trc tip: truy cp n a ch c tr bi ton hng. nh a ch gin tip:

a ch ca ton hng s c cha trong mt thanh ghi con tr (R0 hoc R1 i vi RAM trong, DPTR i vi RAM ngoi). Nhn bit bng k t @ t trc thanh ghi Gi tr ca ton hng c nu ra r rng ngay trong cu lnh. c im : lun km theo k t # pha trc ton hng. MOV A, 4Fh (Ram o 4Fh ang c 14h)
58

nh a ch tc thi:

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V d

MOV R0, #4Fh; ang cha 14h MOV A,@R0 ; A cha 14h

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59

C php
[Nhn]: [Lnh] [Ton hng ch],[Ton hng ngun] ;[ch thch] V d:

Lenhcong: ADD A,#30H ; cong thanh ghi A voi gia tri 30H

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Cc lnh tnh ton s hc

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61

Cc lnh tnh ton s hc

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62

Cc lnh thc hin cc php ton lgic

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63

4Fh: ni dung 03h;11 A: ni dung 02h; trong RAM 02h c 01h ANL 4Fh, @A -> 4Fh:02h; ANL 4Fh,#01 -> 01

A: 00000001b RL A -> 0011 1011b SWAP A -> 1011 0011b

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Cc lnh thc hin cc php ton lgic

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65

Cc lnh trao i d liu

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66

Cc lnh trao i d liu

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67

Cc lnh trao i d liu

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Cc lnh thao tc x l i s Boolean

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69

Cc lnh r nhnh

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Cc lnh r nhnh chng trnh

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Cc lnh r nhnh chng trnh

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72

Chng trnh ASM mu

#include <sfr51.inc> ; u chng trnh, khai bo file cha a ch ca cc thanh ghi SFR ; nh ngha tn gi cho cc chn cng vo/ra (nu mun) #define led1 P1.0 #define led2 P1.1 ... ; khai bo cc bin dng byte (nu c) var1 data 0x30 var2 data 0x31 ...

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Chng trnh ASM mu (tt)

; khai bo cc bin dng bit (nu c) flag1 bit 0x00 flag2 bit 0x01 ... ; nh ngha cc hng s (nu c) constant1 equ 123 constant2 equ 456

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Chng trnh ASM mu (tt)

org 0x0000 ; to m t ti a ch reset ajmp main ; to m t ti cc vector ngt (nu s dng ngt) org 0x0003 ljmp ChuongTrinhXuLyNgatNgoai0 org 0x000B ljmp ChuongTrinhXuLyNgatTimer0 ...

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Chng trnh ASM mu (tt)

; t a ch u cho chng trnh chnh org 0x0030 main: ; bt u vit cc lnh cho chng trnh chnh t y mov SP,#0x6F ; vit cc th tc khi to h thng ... ; vit thn chng trnh chnh (vng lp chnh) main_loop: ... sjmp main_loop

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76

Chng trnh ASM mu (tt)

; vit cc chng trnh con v cc chng trnh x l ngt (nu c) ChuongTrinhCon1: ; cc lnh x l ca chng trnh con 1 ... ; kt thc bng lnh ret ret ChuongTrinhCon2: ; cc lnh x l ca chng trnh con 2 ... ret ; kt thc bng lnh ret

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...

77

Chng trnh ASM mu (tt)

; nh ngha cc bng hng s lu sn trong b nh chng trnh Bang1: db 0,1,0x02,0x86 Bang2: db 156,235,8,9 ... ; ch dn bo hiu kt thc ton b on chng trnh end

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Chng trnh ASM mu (tt)

ChuongTrinhXuLyNgatNgoai0: ; cc lnh x l ca chng trnh x l ngt ngoi 0 ... ; kt thc bng lnh reti reti ChuongTrinhXuLyNgatTimer0: ; cc lnh x l ca chng trnh x l ngt timer 0 ... ; kt thc bng lnh reti reti ...

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Chng 4

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80

Gii thiu

89C51 c 2 b nh thi 16 bt, mi b c 4 ch hot ng Cc b nh thi c dng :

nh thi trong mt khong thi gian. m s kin. To tc baud cho port ni tip ca chip 89C51

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B nh thi 3-bit
TIMER FLIP-FLOPS (3 bit)
FLIP-FLOP C

XUNG NHP

/Q Q0

/Q Q1

/Q Q2

/Q Q c

S logic
XUNG NHP Q0 Q1 Q2

Gin thi gian

FLAG

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Cc SFR ca b nh thi
Thanh ghi Mc ch a ch nh a ch bit

TCON
TMOD TL0 TL1

iu khin
Chn ch Byte thp ca b nh thi 0 Byte thp ca b nh thi 1

88H
89H 8AH 8BH

C
Khng Khng Khng

TH0
TH1

Byte cao ca b nh thi 0

Byte cao ca b nh thi 1

8CH
8DH

Khng
Khng

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83

Thanh ghi ch nh thi (TMOD)

Bit 7 Tn GATE B nh thi M t 1 Bit iu khin cng. Khi c set ln 1, b nh thi ch hot ng trong khi INT1 mc cao v TRx = 1. 1 Bit chn chc nng m hoc nh thi: 1 = m s kin 0 = nh thi trong mt khong thi gian. M1 M0 GATE 1 Bit chn ch th nht. 1 Bit chn ch th hai. 0 Bit iu khin cng cho b nh thi 0.

5 4 3

2
1 0

0 Bit chn chc nng m hoc nh thi cho b nh thi 0.

M1 M0
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0 Bit chn ch th nht. 0 Bit chn ch th hai.

84

Thanh ghi iu khin nh thi (TCON)

Bit TCON.7 TCON.6 TCON.5 TCON.4 TCON.3 TCON.2 K Hiu TF1 TR1 TF0 TR0 IE1 IT1 a ch bit 8FH 8EH 8DH 8CH 8BH 8AH M t C trn ca b nh thi 1. Bit iu khin hot ng ca b nh thi 1. C trn ca b nh thi 0. Bit iu khin hot ng ca b nh thi 0. C ngt bn ngoi 1 (kch khi cnh). C ngt bn ngoi 1 (kch khi cnh hoc mc).

TCON.1
TCON.0

IE0
IT0

89H
88H

C ngt bn ngoi 0 (kch khi cnh).

C ngt bn ngoi 0 (kch khi cnh hoc mc).
85

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Cc ch hot ng

M1 M0 Ch M t 0 0 0 Ch nh thi 13 bit
0 1 1 Ch nh thi 16 bit

1
1

0
1

2
3

Ch t ng np li 8 bit Ch nh thi chia s

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86

Ch nh thi 13 bit

Byte cao THx c ghp vi 5 bit thp ca TLx to thnh b nh thi 13-bit. Khi c xung clock n, b nh thi m ln t gi tr m c np. Trn s xut hin khi chuyn s m t 2000H xung 0000H v set c trn TFx bng 1.

Time clock

TLx

THx

(5 bit) (8 bit)

TFx

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87

Ch nh thi 16 bit

C cu hnh ging ch nh thi 13 bit Thanh ghi nh thi TLx/THx c th c c/ghi ti bt k thi im no

Time clock

TLx

THx

(8 bit) (8 bit)

TFx

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88

Ch t np li 8 bit

Byte thp ca b nh thi (TLx) hot ng nh thi 8 bit. Byte cao TFx lu gi gi tr np li. Khi s m trn t FFH xung 00H, c trn c set v gi tr trong THx c np vo TLx.

Time clock

TLx (8 bit)

TFx

THx (8 bit)

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89

Ch nh thi chia s

B nh thi 0:

c chia thnh 2 b nh thi 8 bit TL0 v TH0. Mi b s set c trn tng ng l TF0 v TF1. Khng hot ng ch 3 nhng c th chuyn qua ch khc. C trn TF1 khng b nh hng.

B nh thi 1:

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90

Ch nh thi chia s Time clock

Time clock Time clock

TL0
(8 bit) TH0

TF0

(8 bit) TL1
TH1

TF1

(8 bit) (8 bit)

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91

Ngun xung clock nh thi

C/T = 0:

Ngun xung clock do mch dao ng trong chip to ra. c dng nh mt khong thi gian. c cp xung clock t ngun ngoi (trn 2 chn P3.4 v P3.5) c dng m s kin. Cc thanh ghi nh thi tng khi c chuyn trng thi t 1 ->0 ng vo Tx.

C/T = 1:

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92

iu khin cc b nh thi

S dng bit TRx trong thanh ghi TCON:

TRx = 1: khi ng TRx = 0 : dng Khi INTx mc cao, b nh thi nhn xung clock. Khi INTx mc thp, b nh thi b kho, khng nhn xung na.

S dng bit GATE v ng vo INTx:

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93

V d

MOV ng MOV MOV SETB ..... CLR TR1 CLR TF1

TMOD,#xxxxH

;thit lp ch hot

TL1,#xxH TH1,#XXH TRx

;ghi gi tr m vo TLx ;ghi gi tr m vo THx ;b nh thi hot ng

;ngng b nh thi ;xo c trn

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94

c b nh thi ang hot ng

Sai pha c th xy ra khi c 2 thanh ghi nh thi, do khng th c 2 thanh ghi bng 1 lnh Gii php:

c byte cao c byte thp c li byte cao Nu byte cao i gi tr th thc hin li thao tc c trn

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95

V d

LAP:

MOV A,TH1 MOV R6, TL1 CJNE A,TH1,LAP MOV R7,A

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96

Chng 5

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97

M u

Chip 89C51 c 1 cng ni tip vi 4 ch hot ng khc nhau. Vic truy xut port ni tip c thc hin thng qua chn TxD v RxD c trng ca port ni tip l kh nng hot ng song cng (full duplex) Cc thanh ghi lin quan:

SBUF: c dng truy xut gi tr trn cng ni tip SCOM: c dng iu khin port ni tip. PCON: s dng bit PCON.7 (SMOD) xc nh tc truyn

SMOD = 0: truyn vi tc thng SMOD = 1: truyn vi tc gp i

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98

S khi port ni tip

TxD SBUF (write only) CLK Baud rate clock (transmit) Q RxD D Shift register CLK

Baud rate clock (receive)

SBUF (read only)

89C51 internal bus

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99

Thanh ghi iu khin port ni tip SCON

Bit K hiu a ch M t

SCON.7
SCON.6 SCON.5

SM0
SM1 SM2

9FH Bit 0 chn ch ca port ni tip

9EH Bit 1 chn ch ca port ni tip 9DH Bit 2 chn ch ca port ni tip, cho php truyn thng a x l ch 2 v 3. 9CH Cho php nhn d liu. Phi bng 1 nhn k t 9BH Bit d liu th 9 c pht ch 2 v 3 (9 bit) 9AH Bit d liu th 9 trong trng hp nhn 9 bit 99H C ngt pht, c set ngay khi kt thc vic pht mt khung d liu 98H C ngt nhn, c set ngay khi kt thc vic nhn mt khung d liu

SCON.4 SCON.3 SCON.2 SCON.1 SCON.0

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REN TB8 RB8 TI RI

100

Cc ch hot ng
SM0 0 0 SM1 0 1 Ch 0 1 M t ng b 8 bit UART 8bit Tc baud C nh (fOSC/12) Thay i (thit lp bi b nh thi)

1
1

0
1

2
3

UART 9bit
UART 9bit

C nh (fOSC/32 hoc fOSC/64)

Thay i (thit lp bi b nh thi)

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101

Ch 0

L ch truyn ng b duy nht. Chn RxD s l tn hiu truyn/nhn d liu, chn TxD l tn hiu xung nhp. Bit LSB (bit 0) ca d liu c pht u tin Tc baud c nh v bng fOSC/12 Pht d liu c khi ng bng mt lnh ghi d liu vo SBUF Nhn d liu c khi ng khi bit REN mc 1 v RI mc 0.

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102

Ch 1

Port ni tip hot ng nh mt b thu pht khng ng b UART D liu gm 10 bit:

1 bit start (mc 0) 8 bit d liu 1 bit stop (mc 1)

Khi thu, bit stop c a n RB8 ca SCON Vic pht c khi ng bng cch ghi vo SBUF Tc baud c thit lp bi tc trn ca b nh thi 1.

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103

Ch 2 v 3

D liu gm 11 bit:1 bit start, 8 bit d liu, 1 bit stop, 1 bit lp trnh c (bit th 9) Khi pht, bit 9 l bit c t vo TB8 ca SCON Khi thu, bit 9 nhn c s t vo RB8 Tc baud bng fOSC/32 hoc fOSC/64

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104

Bit cho php thu

Bit REN trong thanh ghi SCON phi set bng 1 cho php nhn k t Lnh: SETB REN Hoc MOV SCON,#xxx1xxxxB

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105

Bit d liu th 9

Bit d liu th 9 c pht ch 2 v 3 phi c np cho bit TB8 bng phn mm Bit d liu th 9 thu c phi t vo bit RB8 ca SCON

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106

Bit chn l

Bit th 9 thng c dng lm bit chn l (s dng bit P ca PSW) Lnh pht 8 bit vi bit kim tra chn:
MOV C,P MOV TB8,C MOV SBUF,A

Lnh pht 8 bit vi bit kim tra l:

MOV C,P CPL C MOV TB8,C MOV SBUF,A

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107

Cc c ngt

C ngt thu RI c set khi kt thc nhn k t v ch ra b m thu y

WAIT: JNB RI,WAIT CLR RI MOV A,SBUF

C ngt pht TI c set khi kt thc vic pht 1 k t v b m pht rng

WAIT: JNB TI,WAIT CLR TI MOV SBUF,A

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108

Truyn thng a x l

Cc ch 2 v 3 c ng dng to thnh mt mi trng mng s dng nhiu VK 89C51 sp xp theo m hnh master/slaver
I/O I/O

89C51 Master

89C51 Slaver 1

89C51 Slaver 2

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109

Tc baud ca port ni tip

Mode 0: Baud rate = fOSC/12

Mode 2:
Baud rate = (2SMOD/64)*fOSC Mode 1,3:

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110

S dng cng ni tip

Chn ch cho cng ni tip (ng b/d b, 8bit/9bit...), t chn c gi tr cho cc bit trong thanh ghi SCON. Lu xa cc bit TI v RI. Chn tc truyn mong mun, t tnh ra gi tr ca thanh ghi TH1. Cho timer1 chy ch Auto Reload 8bit (khng dng ngt trn timer1). t mc u tin ngt v cho php ngt cng ni tip nu mun.

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111

S dng cng ni tip

Bt u qu trnh truyn d liu bng mt lnh ghi d liu mun truyn vo thanh ghi SBUF. Qu trnh truyn kt thc th c TI s t ng t ln 1. Khi mt khung d liu c nhn y , c RI s t ng t ln 1 v ngi lp trnh lc ny c th dng lnh c thanh ghi SBUF ly d liu nhn c ra x l.

11/7/2012

112

Khi ng port ni tip

Baud rate = 2400 S dng b nh thi 1 cp xung clock

SM0 SM1 1 C/T 0 TR1 1 1 SM2 0 M1 1 TF0 0 1 REN 1 M0 0 TR0 0 1 TB8 0 GTE 0 IE1 0 0 RB8 0 C/T 0 IT1 0 0 TI 1 M1 0 IE0 0 1 RI 0 M0 0 IT0 0 1

SCON TMOD TCON TH1

0 GTE 0 TF1 0 1

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113

Lnh khi ng port ni tip

ORG INIT: MOV MOV MOV SETB END 8100H SCON,#52H TMOD,#20H TH1,#F4H TR1 ;port ni tip, ch 1 ;b nh thi 1, ch 2 ;gi tr np li c 2400 baud ;b nh thi 1 hot ng

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114

Chng 6

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115

Gii thiu

Ngt l vic xy ra mt s kin lm cho chng trnh hin hnh b tm ngng trong khi mt iu kin khc c thc hin.
time

Main program
Chng trnh khng c ngt

ISR

ISR

ISR

Main
time

Main

Main

Main

Chng trnh c ngt

116

11/7/2012

T chc ngt

89C51 c 5 nguyn nhn ngt:

2 ngt ngoi 2 ngt do b nh thi 1 ngt do port ni tip S chui vng S hai mc u tin

C 2 s x l ngt:

11/7/2012

117

Thanh ghi cho php ngt (IE)

Mi nguyn nhn ngt c cho php hoc khng thng qua thanh ghi cho php ngt IE c a ch 0A8H
Bit IE.7 IE.6 IE.5 K hiu EA ET2 a ch AFH AEH ADH M t Cho php/khng cho php ton cc Khng s dng Cho php ngt do b nh thi 2

IE.4
IE.3 IE.2 IE.0 IE.1
11/7/2012

ES
ET1 EX1 EX0 ET0

ACH
ABH AAH A8H A9H

Cho php ngt do port ni tip

Cho php ngt do b nh thi 1 Cho php ngt t bn ngoi (1) Cho php ngt t bn ngoi (0) Cho php ngt do b nh thi 0
118

u tin ngt

Mi nguyn nhn ngt c lp trnh c mt trong hai mc u tin ngt thng qua thanh ghi u tin ngt IE c a ch 0B8H
Bit K hiu a ch M t

IP.7
IP.6 IP.5 IP.4 IP.3 IP.2 IP.1 IP.0

PT2 PS PT1 PX1 PT0 PX0 BDH BCH BBH BAH B9H B8H

Khng s dng
Khng s dng u tin ngt do b nh thi 2 u tin ngt do port ni tip u tin ngt do b nh thi 1 u tin ngt t bn ngoi (1) u tin ngt do b nh thi 0 u tin ngt t bn ngoi (0)

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119

Chui vng

Chui vng xc nh ngt no c u tin phc v trc. Mc u tin:

Ngt ngoi 0 Ngt do b nh thi 0 Ngt ngoi 1 Ngt do b nh thi 1 Ngt do port ni tip

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120

X l ngt

Qu trnh x l ngt:

Hon tt vic thc thi lnh hin hnh B m chng trnh PC c ct vo stack Trng thi ca ngt hin hnh c lu gi li Cc ngt c chn li mc ngt B m chng trnh PC c np a ch vector ca trnh phc v ngt ISR ISR c thc thi

Vic thc thi ISR kt thc khi gp lnh RETI.Lnh ny ly li gi tr c ca b m chng trnh PC t stack v phc hi trng thi ca ngt c

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121

Cc vector ngt

Gi tr c np cho b m chng trnh c gi l vector ngt. Vector ngt chnh l a ch bt u ca trnh phc v ngt ca nguyn nhn tng ng Khi trnh gy ngt c tr ti, c gy ngt t ng b xa bi phn cng, ngoi tr c RI v TI

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122

a ch cc vector ngt
Ngt Reset h thng Ngt ngoi 0 B nh thi 0 Ngt ngoi 1 B nh thi 1 Port ni tip RST IE0 TF0 IE1 TF1 RI hoc TI C a ch 0000H 0003H 000BH 0013H 001BH 0023H

11/7/2012

123

Chng trnh s dng ngt

ORG LJMP ... ORG MAIN: ... 000H ;im nhp sau khi reset MAIN ;cc im nhp ca ISR 0030H ;im nhp chng trnh chnh ;chng trnh chnh bt u

11/7/2012

124

Trnh phc v ngt kch thc nh

Cc trnh phc v phi c bt u gn y ca b nh. Ch c 8 byte gia cc im nhp ca trnh phc ngt -> trnh phc v ngt tng ng c di khng qu 8 byte. V d: ngt do b nh thi 0 ORG 0000H ; reset LJMP MAIN ORG 000BH ; im nhp ca ngt do b nh thi 0 T0_ISR: ;bt u ISR cho b nh thi 0 RETI ;tr v chng trnh chnh MAIN:

11/7/2012

125

Trnh phc v ngt kch thc ln

Vi trnh phc v ngt ln hn 8 byte, ta phi chuyn chng trnh ny n mt ni khc trong b nh chng trnh hoc ln qua im nhp ca ISR khc V d: kho st b nh thi 0
ORG LJMP ORG LJMP ORG MAIN: T0_ISR: RETI 0000H MAIN 000BH T0_ISR 0030H ;reset

;im nhp b nh thi 0

;pha trn cc vector ngt

;ISR ca b nh thi 0 ;quay v chng trnh chnh

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126

Ngt do port ni tip

Xut hin khi c ngt pht TI hoc c ngt thu RI c set bng 1

Ngt pht xut hin khi vic pht mt k t ghi vo SBUF hon tt(SBUF rng). Ngt thu xut hin khi mt k t c thu y v ang trong SBUF (SBUF y).

C ngt do port ni tip gy ra khng c xa bi phn cng. Nguyn nhn ngt phi c xc nh trong trnh phc v ngt v c ngt phi c xa bi phn mm

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127

Cc ngt ngoi

Ngt ngoi xy ra khi c mc thp hoc cnh m trn chn /INT0 v /INT1 C to ra cc ngt: bit IE0 v IE1 ca thanh ghi TCON

C to ra ngt c xa bi phn cng nu l ngt thc loi tc ng cnh. Nu ngt thuc loi tc ng mc, nguyn nhn ngt s iu khin mc ca c.

Vic chn loi tc ng ngt l cnh hay mc c thc hin thng qua bit IT0 v IT1 ca TCON

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128