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1. For the combinational logic circuit shown below: a) analyze the circuit for: #G, #Gio & Gdel with worst case path b) obtain the Logic Equation directly from the schematic c) obtain dLogic Equation as SOP using Boolean theorems & postulates d) obtain the Truth Table A e) obtain the Canonical form SOP f) obtain the Minterm representation
2. For the following logic equation: C Y = KL+LM+KM a) draw the complete Logic Diagram directly from the logic equation b) give the complete Truth Table c) give the Canonical form SOP & POS d) give the Minterm & Maxterm representations
ELEC 2200 Spring 2013
A
C
AC
B
B
Z
Z=AC +BC BC
c) SOP directly from logic equation (any valid SOP is fine) Z = (AC + BC) = (AC) (BC) by DeMorgans theorem = (A + C) (B + C) by DeMorgans theorem = (A + C) (B + C) by involution theorem = AB + AC + BC + CC by distributivity postulate (this is a valid SOP) = AB + AC + BC + 0 by complement postulate (another valid SOP) = AB + AC + BC by null elements theorem (another valid SOP) = AC + BC by consensus theorem (this is a minimized SOP)
ELEC 2200 Spring 2013
ELEC 2200
c) Canonical form (from truth table) 7 SOP: Y=KLM + KLM + KLM + KLM POS: Y=(K+L+M)(K+L+M)(K+L+M)(K+L+M)
ELEC 2200
Spring 2013