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Instruction Set of 8085
Instruction Set of 8085
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Instruction Byte.
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destination.
While copying, the contents of source are not
modified.
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memory.
If the operand is a memory location, its location is
Operand
16-bit address
Description
Load Accumulator
location.
The contents of either the register pair or the memory location Example: LDAX B
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This instruction loads 16-bit data in the register pair. Example: LXI H, 2034 H
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register H.
Example: LHLD 2040 H
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memory location.
Example: SHLD 2550 H
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contents of register D.
The contents of register L are exchanged with the
contents of register E.
Example: XCHG
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This instruction loads the contents of H-L pair into SP. Example: SPHL
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The contents of register pair are copied onto stack. SP is decremented and the contents of high-order registers
The contents of top of stack are copied into register pair. The contents of location pointed out by SP are copied to
port.
Example: OUT 78 H
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Arithmetic Instructions
These instructions perform the operations like:
Addition Subtract Increment Decrement
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Addition
Any 8-bit number, or the contents of register, or the
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Subtraction
Any 8-bit number, or the contents of register, or the
form.
No two other 8-bit registers can be subtracted directly.
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Increment / Decrement
The 8-bit contents of a register or a memory location
incremented or decremented by 1.
Increment or decrement can be performed on any
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Arithmetic Instructions
Opcode ADD R M Operand Description Add register or memory to accumulator
accumulator.
The result is stored in accumulator. If the operand is memory location, its address is specified by H-L pair. All flags are modified to reflect the result of the addition. Example: ADD B or ADD M
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Arithmetic Instructions
Opcode ADC R M Operand Description Add register or memory to accumulator with carry
The contents of register or memory and Carry Flag (CY) are added to
The result is stored in accumulator. If the operand is memory location, its address is specified by H-L pair. All flags are modified to reflect the result of the addition. Example: ADC B or ADC M
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Arithmetic Instructions
Opcode ADI Operand 8-bit data Description Add immediate to accumulator
The 8-bit data is added to the contents of accumulator. The result is stored in accumulator.
addition.
Example: ADI 45 H
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Arithmetic Instructions
Opcode ACI Operand 8-bit data Description Add immediate to accumulator with carry
The 8-bit data and the Carry Flag (CY) are added to the
contents of accumulator.
The result is stored in accumulator. All flags are modified to reflect the result of the addition. Example: ACI 45 H
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Arithmetic Instructions
Opcode DAD Operand Reg. pair Description Add register pair to H-L pair
Example: DAD B
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Arithmetic Instructions
Opcode SUB R M Operand Description Subtract register or memory from accumulator
The result is stored in accumulator. If the operand is memory location, its address is specified by H-L pair. All flags are modified to reflect the result of subtraction. Example: SUB B or SUB M
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Arithmetic Instructions
Opcode SBB R M Operand Description Subtract register or memory from accumulator with borrow
The contents of the register or memory location and Borrow Flag (i.e.
The result is stored in accumulator. If the operand is memory location, its address is specified by H-L pair. All flags are modified to reflect the result of subtraction. Example: SBB B or SBB M
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Arithmetic Instructions
Opcode SUI Operand 8-bit data Description Subtract immediate from accumulator
accumulator.
The result is stored in accumulator. All flags are modified to reflect the result of subtraction. Example: SUI 45 H
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Arithmetic Instructions
Opcode SBI Operand 8-bit data Description Subtract immediate from accumulator with borrow
The 8-bit data and the Borrow Flag (i.e. CY) is subtracted
Arithmetic Instructions
Opcode INR R M Operand Description Increment register or memory by 1
incremented by 1.
The result is stored in the same place.
Arithmetic Instructions
Opcode INX R Operand Description Increment register pair by 1
The contents of register pair are incremented by 1. The result is stored in the same place.
Example: INX H
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Arithmetic Instructions
Opcode DCR R M Operand Description Decrement register or memory by 1
decremented by 1.
The result is stored in the same place.
Arithmetic Instructions
Opcode DCX R Operand Description Decrement register pair by 1
The contents of register pair are decremented by 1. The result is stored in the same place.
Example: DCX H
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Logical Instructions
These instructions perform logical operations on data
XOR operation
Rotate
Each bit in the accumulator can be shifted either left or
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Compare
Any 8-bit data, or the contents of register, or memory
Less Than
Complement
The contents of accumulator can be complemented. Each 0 is replaced by 1 and each 1 is replaced by 0.
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Logical Instructions
Opcode CMP R M Operand Description Compare register or memory with accumulator
Logical Instructions
Opcode CMP R M Operand Description Compare register or memory with accumulator
if (A) < (reg/mem): carry flag is set if (A) = (reg/mem): zero flag is set
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Logical Instructions
Opcode CPI Operand 8-bit data Description Compare immediate with accumulator
accumulator.
The values being compared remain unchanged. The result of the comparison is shown by setting the
Logical Instructions
Opcode CPI Operand 8-bit data Description Compare immediate with accumulator
if (A) < data: carry flag is set if (A) = data: zero flag is set
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Logical Instructions
Opcode ANA R M Operand Description Logical AND register or memory with accumulator
The contents of the accumulator are logically ANDed with the contents
of register or memory.
The result is placed in the accumulator. If the operand is a memory location, its address is specified by the
Logical Instructions
Opcode ANI Operand 8-bit data Description Logical AND immediate with accumulator
Logical Instructions
Opcode ORA R M Operand Description Logical OR register or memory with accumulator
The contents of the accumulator are logically ORed with the contents of the register or memory. The result is placed in the accumulator. If the operand is a memory location, its address is specified by the contents of H-L pair. S, Z, P are modified to reflect the result. CY and AC are reset. Example: ORA B or ORA M.
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Logical Instructions
Opcode ORI Operand 8-bit data Description Logical OR immediate with accumulator
Logical Instructions
Opcode XRA R M Operand Description Logical XOR register or memory with accumulator
The result is placed in the accumulator. If the operand is a memory location, its address is specified by
S, Z, P are modified to reflect the result of the operation. CY and AC are reset. Example: XRA B or XRA M.
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Logical Instructions
Opcode XRI Operand 8-bit data Description XOR immediate with accumulator
8-bit data.
The result is placed in the accumulator.
Logical Instructions
Opcode RLC Operand None Description Rotate accumulator left
position.
Bit D7 is placed in the position of D0 as well as in the Carry
flag.
CY is modified according to bit D7. S, Z, P, AC are not affected. Example: RLC.
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Logical Instructions
Opcode RRC Operand None Description Rotate accumulator right
position.
Bit D0 is placed in the position of D7 as well as in the Carry
flag.
CY is modified according to bit D0. S, Z, P, AC are not affected. Example: RRC.
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Logical Instructions
Opcode RAL Operand None Description Rotate accumulator left through carry
Logical Instructions
Opcode RAR Operand None Description Rotate accumulator right through carry
Logical Instructions
Opcode CMA Operand None Description Complement accumulator
The contents of the accumulator are complemented. No flags are affected. Example: CMA.
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Logical Instructions
Opcode CMC Operand None Description Complement carry
The Carry flag is complemented. No other flags are affected. Example: CMC.
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Logical Instructions
Opcode STC Operand None Set carry Description
The Carry flag is set to 1. No other flags are affected. Example: STC.
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Branching Instructions
The branching instruction alter the normal sequential
flow.
These instructions alter either unconditionally or
conditionally.
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Branching Instructions
Opcode JMP Operand 16-bit address Description Jump unconditionally
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Branching Instructions
Opcode Jx Operand 16-bit address Description Jump conditionally
location specified by the 16-bit address given in the operand based on the specified flag of the PSW.
Example: JZ 2034 H.
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Jump Conditionally
Opcode JC JNC JP JM JZ JNZ JPE JPO
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Description Jump if Carry Jump if No Carry Jump if Positive Jump if Minus Jump if Zero Jump if No Zero Jump if Parity Even Jump if Parity Odd
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Branching Instructions
Opcode CALL Operand 16-bit address Description Call unconditionally
CALL (the contents of the program counter) is pushed onto the stack.
Example: CALL 2034 H.
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Branching Instructions
Opcode Cx Operand 16-bit address Description Call conditionally
location specified by the 16-bit address given in the operand based on the specified flag of the PSW.
Before the transfer, the address of the next instruction
after the call (the contents of the program counter) is pushed onto the stack.
Example: CZ 2034 H.
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Call Conditionally
Opcode CC CNC CP CM CZ CNZ CPE CPO
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Description Call if Carry Call if No Carry Call if Positive Call if Minus Call if Zero Call if No Zero Call if Parity Even Call if Parity Odd
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Branching Instructions
Opcode RET Operand None Description Return unconditionally
the program counter, and program execution begins at the new address.
Example: RET.
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Branching Instructions
Opcode Rx Operand None Description Call conditionally
subroutine to the calling program based on the specified flag of the PSW.
The two bytes from the top of the stack are copied into
the program counter, and program execution begins at the new address.
Example: RZ.
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Return Conditionally
Opcode RC RNC RP RM RZ RNZ RPE RPO
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Description Return if Carry Return if No Carry Return if Positive Return if Minus Return if Zero Return if No Zero Return if Parity Even Return if Parity Odd
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Branching Instructions
Opcode RST Operand 07 Description Restart (Software Interrupts)
Restart Address 0000 H 0008 H 0010 H 0018 H 0020 H 0028 H 0030 H 0038 H
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Control Instructions
The control instructions control the operation of
microprocessor.
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Control Instructions
Opcode NOP Operand None No operation Description
operation is executed.
Example: NOP
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Control Instructions
Opcode HLT Operand None Halt Description
state.
Example: HLT
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Control Instructions
Opcode DI Operand None Description Disable interrupt
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Control Instructions
Opcode EI Operand None Enable interrupt Description
are enabled.
No flags are affected.
Control Instructions
Opcode RIM Operand None Description Read Interrupt Mask
status of interrupts 7.5, 6.5, 5.5 and read serial data input bit.
The instruction loads eight bits in the accumulator
RIM Instruction
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Control Instructions
Opcode SIM Operand None Description Set Interrupt Mask
implement the 8085 interrupts 7.5, 6.5, 5.5, and serial data output.
The instruction interprets the accumulator contents as
follows.
Example: SIM
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SIM Instruction
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