ECE 4200/5200 POWER ELECTRONICS FALL 2013 PROJECT #4 DUE: 11/11/2013 Consider the three-phase two-level source inverter

circuit of Fig. 1(a) (see Fig. 6.6(a) on pp. 297 of textbook). The inverter is connected to a three-phase balanced Y-connected R-L load, and its dc voltage is 1220 V. The inverter is connected to 690 V/50 Hz and delivers 2.3 MW to the R-L load with 0.8 power factor lagging. The inverter is modulated by a selective harmonic elimination scheme and its simulation algorithm is given in Fig. 1(b). 1) Design (a) Determine the three-phase load instantaneous grid voltages. (b) Determine the three-phase load instantaneous grid currents. (c) Select the resistive and inductive values to meet the load requirements. (d) Using Fourier series, perform harmonic analysis of the simulation algorithm given in Fig. 1(b). (e) Determine the harmonics eliminated in 1(d). Verification of Design. Simulate your circuit in SPICE to verify that it meets the specifications given and the design in 1). Use SPICE to (a) determine the THD, (b) determine the DF, (c) determine the HF and DF of the LOH, (d) determine the average transistor current IQ(av), (e) determine the rms transistor current IQ(rms). (f) determine the average diode current ID(av), and (g) determine the rms diode current ID(rms). Use SPICE to plot the following: (a) the line-to-neutral voltages van, vbn, and vcn on the same sheet, (b) the line currents ia, ib, and ic on the same sheet, (c) the transistor Q1 voltage vQ1, (d) the transistor Q1 current iQ1. (e) the diode D6 voltage vD6, and (f) the diode D6 current iD6.

2)

3)

4)

a Z n Z b c Fig. 1(a) Switching Angle Z = R + jL Z

v(t) Vr

1 2 3 3

Degrees 1.11 4.01 18.26 23.60

/3-1 2/3+1 -1

1 2 3 4
/6 /3-3 /3-4 /3-
2

/3 2/3 2/3+2 2/3+3 Fig. 1(b)

5/6

-2

-4 -3 2/3+4