32LC837HT

SERVICE MANUAL
8M29B CHASSIS
Description:
MODEL.
Engineering Dept:
Artwork By:
Checked By:
Approved By:
Brand Name:
JOB NO.
Date:
Date:
Date:
SERVICE MANUAL 8M29B
2011-5-23
SKYWORTH
SIZE:A5
Design and specifications are subject to change without prior notice.
(Only Referrence)
Content-------------------------------------------------------------------------------2
-2-
Technical Specification-----------------------------------------------------------3-14
8M29 Block Diagram -------------------------------------------------------------15
List of key parts---------------------------------------------------------------------16
IC BLOCK Diagram----------------------------------------------------------------17-31
MAIN PCB-TOP--------------------------------------------------------------------32
MAIN PCB-BOT--------------------------------------------------------------------33
Circuit Diagrams--------------------------------------------------------------------34-42
-3-
LCD 8M29B chassis.
105
140
For 32LED
For 42LED
-4-
4.
5.
Base on different order
FOR 32LED
FOR 42LED
93
400
95 97
93 95 97
450
For 42LED
For 42LED
-5-

9800
12500
12500(266, 276)
9800(280, 290)
6500(313, 329)
40
40
3
2
1
4.2
50
0.5
80
40
12000
-6-
24
6
1080
1920
uv
uv
40
YES
8
6
46
46
NO
NO
Standard
English
Standard
20
Middle
-7-
For 42LED
For 42LED
Base on different order
No
"Low" in some status
-8-
4
-9-
DTV-PRODUCTOINS SPECIFICATION
Model # 32"46"
Country( West Eu./East Eu./Russia/AP/US/S.A./Japan/
)
Brazil & Argentina
Brand Skyworth/ODM
Category (Monitor/TV/Combo/Portable TV) TV
Panel technology (LCD / PDP) LCD/LED
Market Position (High/Mid/Access,,,) Class
Cabinet Design (Example: 01,23 series ) K06/E60
Product Nb -
Chassis solution MSD309
Chassis name 8M29B
Chassis PCB Standard Skyworth RGB New Standard
Predecessor (replace) -
MP date requested (ETD) 2011.1
MP date confirmed by supplier (ETD/ETA) -
Status( Pre./Finish ) -
Regional requirement
Homologation (Gostandard/CE/MPTT/CB/) CB
RoHS Yes
Power supply(100-240V AC +/-10%/...) 100-240V AC (-20%,+10%)
Power consumption working / Annual -
Power consumption standby <1W
Power plug(VDE/UL/BS/) UCIEE/2pins
Picture display
Screen size : diagonale (inch) 32",42", 46"
Aspect ratio (16/9 // 4/3 // 15/9) 16:9
1st panel supplier : panel suppliers LG
1st panel supplier : panel reference
Panel Display Type(MVA/PVA/IPS/) TFT LCD
1st panel supplier : resolution 32:1366x768.42/46:1920x1080
Dynamic contrast ratio >100001
Video signal process
Comb Filter (2D/3D) 3D
Noise Reduction (adaptative/3D/) 3D
Picture improvement ( LTI/CTI,BLE,WLE,...) LTI/CTI
Color process (Gama correction/Skin correction /... ) Follow main IC
-10-
Colour preset (Cool/Normal/Warm/Personal) Medium, Cool, Warm and Personal in PC mode
Picture control ( Bright/Con./Sharpness/Color/Tint/) Yes
Picture presets : Standard / Bright / Soft / User Standard / Mild / Film / Dynamic / Personal
Picture freeze Yes
Multi picture : PIP ( AV )/POPAV No
Dynamic Backlight Control No
LED Backlight Yes
Deinterlacer (No/linerar/motion adaptive/motion
compensative)
3D motion adaptive
Film mode / reverse 3:2/2:2 pull down Yes / Yes
Full HD support ( 1080P ) Yes
Single scan / Dual scan ( 120HZ ) 32:Single scan,42/46:Dual scan(only for LED)
Zoom type : 4/3 format Yes
Zoom type : 14/9 Zoom Yes
Zoom type : 16/9 Zoom 16/9 ZOOM 1
Zoom type : 16/9 Zoom up/down 16/9 ZOOM 2
Zoom type : Cinerama Yes
Zoom type : 16/9 Format Yes
Zoom type : Auto ( by SCART Pin8 and WSS ) Yes
Picture Auto adjustment (PC mode) Yes
3D Panel Type(PR / SG)
3D Mode
3D To 2D (Y/N)
2D To 3D (Y/N)
Left / Right Swap (For PR Panel)
Sound
Sound type ( Mono/AV stereo/Stereo ) stereo
Music Power (Watt)/RMS Power (Watt) 2 x 8W
Tone control ( Bass&Treble / Graphic Equalizer ) Bass&Treble
Special sound effect ( AVL / WIDE / Pseudo / ) AVL
Suround system ( Dolby / VD / SRS / BBE / ) Built-in Surround
Sound control ( Volume , Balance , Mute ) Volume, Balance, Mute
Sound presets (User/Speech/News/Standard) Standard / Music / Movie / Sport / Personal
Headphone volume control ( Separated / linked ) Yes(Linked)
Sound quality ( High / Mid / Low ) Mid
Reception and Decoding capability
RF rangeATV 54MHz864MHz
RF rangeDTV VHF 177-213 MHZ, UHF 473-803 MHZ
Color System (PAL/SECAM/NTSC/PAL M,N ) PAL M,PAL N,NTSC M
Audio Standard ( B/G/H/D/K/K'/I/L/L' ) M,N
Stereo audio system ( Nicam,MTS,A2,.) BTSC,SAP
Video standard NTSC 3.58 / 4.43 (AV)/PAL 60 NTSC 3.58/4.43 , PAL
-11-
DTV SD support (DVB-T/S/C , ATSC , QAM , ) ISDB-T
DTV HD Support MPEG2,MPEG4,H.264
MHEG5 No
HD capability with YPbPr Yes (720p; 1080i; 1080p@24/50/60Hz; 480i/p; 576i/p)
PC capability (up to maximum format) Up to 1280X1024 60Hz
HDMI capability AV/PC Format) Up to 1080P 24/50/60HZ
Compatible video format if DVD/USB:
DviX/VCD/SVCD/JPEG/AVI/MPEG2/WMV- HD/SD
JPEG/MPEG2/MPEG4/H.264/DivX (depending on license)
Compatible audio format if DVD/USB:
MP3/WMA/AAC/MPEG1/
MP3/WMA(depending on license)
Playable Discs (CD/CD-R(RW)/CD-ROM/DVD+R/+RW/-
R/-RW)
No
Card reader format compatibility No
Macrovision Yes
PVR YesFOR USB
Network No
User convenience
OSD Language* English/Spanish/Portuguese/French
OSD Positioning No
OSD Transparency Adjust No
OSD Timeout Adjust No
Customer Brand name(LOGO) Yes
IB languages English
ATV Program Numbers (example: 99+3AV input ) 99+7AV
DTV Program Numbers 600
Program edit ( naming , sorting , skip , swap . ) Naming / Skip / Swap
Auto Naming/Auto Sorting No
TV Guide(DTV EPG) EPG(next Seven-day)
Favorite program Yes
Number of buttons on cabinet (Power; Vol+/-; Pr+/-,
Menu )
Vol+/-; Pr+/-, Menu ,Source,Power(optional)
Main switch button (yes/No) Yes
CCDClosed Caption)/V-CHIP Yes/No
Text Standard: (Top, FLOF,,,) No
Teletext Level: 2.5 / 1.5 -
Pages for teletext -
Teletext character sets **** -
DVB-T teletext -
Real clock From DTV
Sleep timer 10-240 Min.
Timer Turn On / Off, Program Switch
Parent Control -Source and Channel lock (Input code for
certain channel)
Yes
Parent Control - Child lock (set the lock of the keyboard,
only the RCU can control the TV)
No
-12-
Parent Control - Kid pass (preset the ontime, channel for
each day of the week)
No
Parent Control - Channel lock (For digital transmission
and DVD program, to filter some programms)
Yes
Calendar / Games No
No program auto switch off 15 mins.
Hotel mode (Y/N) T.B.D
DVD player (No/slot/tray) No
Tuner FM (yes/No) No
software download(RS232/CI/USB/OAD) USB
Factory reset Yesin factory menu,reset the setting to shipment state )
Screen saver Yes
Blue Back No
LED indicator(Power on/Standby) Blue / Red
Connectors -Rear
RF Input (Antenna): Air/ Cable/ 2in1 Air+Cable
Scart : CVBS in&out / RGB / S-VIDEO No
CINCH video in / outAV1 No
CINCH audio in / out (No volumpe control on Audio
out/can be jack 3,5mm)
No
S-video in No
Component Video Input (YCrCb/YPrPb) No
Component Audio Input (YCrCb/YPrPb) No
VGA in / Audio L/R in / Jack audio in 3.5mm VGA + dia. 3.5mm for audio in
HDMI 2
DVI No
Audio input for DVI No
CINCH subwoofer out / Coaxial out (S/PDIF) No
Headphone output connector (mm) No
RS232 ( Y/N , VGA or DB9 port ) No
Card Readers No
USB slot (No/1.1/2)
1 (Software update, JPEG, MP3, WMA, RMVB, DivX) Multimedia
depends on license
DVB-CI (common interface) No
External power converter input No
Connectors -Side
HDMI 1
AV-IN 1
AV-OUT No
-13-
Component Video Input (YCrCb/YPrPb) 1
Component Audio Input (YCrCb/YPrPb) 1 with cable adapter
Headphone output connector (dia.mm) 13.5mm)
CINCH subwoofer out / Coaxial out (S/PDIF) S/PDIF out ( optical
USB slot (No/1.1/2)
1 (Software update, JPEG, MP3, WMA, RMVB, DivX) Multimedia
depends on license
DVB-CI (common interface) No
DLNA No
UI/RC
UI design (font/pixel, 2D/3D graphic engine..)
SOD Standard
RC Model
YK76B3 ( Toshiba )
RC system
RGB Standard
RC # of keys
Accessories included
Carton (English/French/Spanish) English
IB English
Circuit diagram No
Batteries Yes
Product registration Card YesEnglish)
AC Cable Length 1.8m
Audio Cord (Jack 3.5mm) Yes(For component audio in)
VGA Cord No
Wallmount frame Optional
Antenna Cable No
6 in 1( YPbPr & CVBS) cable adapter No
3D Glasses No
General Data
Size (W x H x D, with stand) in mm -
Size (W x H x D, without stand) in mm -
Package Size (W x H x D, without stand) in mm -
Net Weight in kg -
Gross Weight in Kg -
Design / Mechanical
Wallmount VESA compatible (standard reference) Yes
Adaptor for VESA wallmount compatibility (accessory
ref)
Yes
Desktop Stand (included/optionnal + ref/No) included
Panel Tilt (Fowards/Backwards/Rotation) No
Swivel function desktop stand (yes/No) + motorized? No
Docking station (yes/No) No
Floor Stand (included/optionnal + ref/No) No
Glass shield (yes/No) No
Finish on Front -
Finish on side -
Finish on back -
Finish on stand -
number of colors on carton box 2
Brand logo Customer Inlet
Other logo No
External AC/DC Power with DC power cord (yes/No) No
Handle (yes/No) No
Detachable speaker (yes/No) No
Rating Label langages English
-14-
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List of key parts
No. Name Position Type P/N
1 IR U29 HS0038B4 5300-140038-0010
Bass SL-R3018H-3E 5600-106154-0060
2 Speaker
Treble YDG3040-2 5600-708254-00
Y2 49U3H 4900-125453-R000
3 Crystal
Y1 HC-49U/S 4900-124053-R000
4 Tuner U10 VA1P1BF8405 5202-45733D-7H10
5 Saw U30 F4401 4900-744015-0X00
U3 MP1482DS 476A-M14820-0080
U5 MP1482DS 476A-M14820-0080
|0 MP1482DS 476A-M14820-0080
|! MP1482DS 476A-M14820-0080
U9 W9751G6JB-25 4737-W97511-0840
U15 W9751G6JB-25 4737-W97511-0840
U24 EN25F32-100HIP 471R-N25321-0080
U55 TC90517FG 4701-T90510-0640
U37 AS1117L-3.3 47B6-A11170-03
U38 AS1117L-3.3 47B6-A11170-03
N1 AS1117L-3.3 47B6-A11170-03
N2 AS1117L-1.2 47B6-A11175-0300
U54 TPA3121D2PWPR 4722-T31210-0240
6
IC
U2 MSD309PX-LF-Z1-SB 475C-M30900-5230

-16-
IC Block Diagram
-17-
L Package
(SOT-223)
T Package
) 2 5 2 - O T ( ) 0 2 2 - O T (
Pin Configurations---AS1117L-3.3
INPUT
OUTPUT
ADJ/GND
V
OUT
INPUT
OUTPUT
ADJ/GND
V
OUT
INPUT
OUTPUT
ADJ/GND
V
OUT
1
2
3
1
2
3
1
2
3
U Package
ADJ/GND
OUTPUT
INPUT
V
OUT
S Package
(TO-263)
R Package
INPUT
OUTPUT
ADJ/GND
(SOT-89)
1
2
3
1
2
3
V
OUT
IC Block Diagram
-18-
Pin Configurations---AS1117L-ADJ
L Package
(SOT-223)
INPUT
OUTPUT
ADJ/GND
V
OUT
1
2
3
PIN ASSIGNMENT
The package of AX3113 is SOP-8L; the pin assignment is given by:
Name Description
FB Feedback pin
EN
Power-off pin
Hnormal operation(Step-down)
LStep-down operation stopped
(All circuits deactivated)
OCSET
Add an external resistor to set max
switch output current.
V
CC IC power supply pin
SW
Switch pin. Connect external
inductor & diode here.
( Top View )
1
2
3
4
8
7
6
5
FB
Ocset
SOP8L
AX3113
Vcc
EN
Vss
Vss
SW
SW
V
SS GND pin
IC Block Diagram
-19-
LM4558
MP1482DS
BS
IN
SW
GND
SS
EN
COMP
FB
1
2
3
4
8
7
6
5
TOP VIEW
IC Block Diagram
-20-
MST6M20S-LF
IC Block Diagram
-21-
W25X40BVSNIG
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
PVCCL
SD
PVCCL
MUTE
LIN
RIN
BYPASS
AGND
AGND
PVCCR
VCLAMP
PVCCR
PGNDL
PGNDL
LOUT
BSL
AVCC
AVCC
GAIN0
GAIN1
BSR
ROUT
PGNDR
PGNDR
.
PWP (TSSOP) PACKAGE
(TOP VIEW)
PIN CONFIGURATION
SOIC 150-MIL / 208-MIL
PAD CONFIGURATION
WSON 6X5-MM
PIN CONFIGURATION
PDIP 300-MIL
IC Block Diagram
-22-
EN25F32
Figure.1 CONNECTION DIAGRAMS
8 - LEAD SOP / DIP 8 - CONTACT VDFN
16 - LEAD SOP
IC Block Diagram
-23-
EN25F32
Figure 2. BLOCK DIAGRAM
IC Block Diagram
-24-
EN25F32
SIGNAL DESCRIPTION
Serial Data Input (DI)
The SPI Serial Data Input (DI) pin provides a means for instructions, addresses and data to be serially
written to (shifted into) the device. Data is latched on the rising edge of the Serial Clock (CLK) input pin.
Serial Data Output (DO)
The SPI Serial Data Output (DO) pin provides a means for data and status to be serially read from
(shifted out of) the device. Data is shifted out on the falling edge of the Serial Clock (CLK) input pin.
Serial Clock (CLK)
The SPI Serial Clock Input (CLK) pin provides the timing for serial input and output operations. ("See
SPI Mode")
Chip Select (CS#)
The SPI Chip Select (CS#) pin enables and disables device operation. When CS# is high the device is
deselected and the Serial Data Output (DO) pin is at high impedance. When deselected, the devices
power consumption will be at standby levels unless an internal erase, program or status register cycle
is in progress. When CS# is brought low the device will be selected, power consumption will increase to
active levels and instructions can be written to and data read from the device. After power-up, CS#
must transition from high to low before a new instruction will be accepted.
Hold (HOLD#)
The HOLD pin allows the device to be paused while it is actively selected. When HOLD is brought low,
while CS# is low, the DO pin will be at high impedance and signals on the DI and CLK pins will be
ignored (dont care). The hold function can be useful when multiple devices are sharing the same SPI
signals.
Write Protect (WP#)
The Write Protect (WP#) pin can be used to prevent the Status Register from being written. Used in
conjunction with the Status Registers Block Protect (BP0, BP1and BP2) bits and Status Register
Protect (SRP) bits, a portion or the entire memory array can be hardware protected.
Table 1. PIN Names
Symbol Pin Name
CLK Serial Clock Input
DI Serial Data Input
DO Serial Data Output
CS# Chip Enable
WP# Write Protect
HOLD# Hold Input
Vcc Supply Voltage (2.7-3.6V)
Vss Ground
IC Block Diagram
-25-
TC90517FG Toshiba products specification [Tentative]
CONFIDENTIAL
2. Configuration
All functions required for ISDB-T demodulation and error correction are built into the TC90517.
The input signals to be supported are a low IF (intermediate frequency) signal and direct IF signal.
Baseband IQ signals can also be input.
The output signal is an MPEG-2 transport stream (TS) in serial format. Note that a TS in parallel format
can be output by setting registers.
Fig. 2.1 TC90517FG Block Diagram
Synchroni-
zation flag
TS output
Crystal
(referenceclock)
Tuner
AGC
control
I
2
C
control
Filter
AGC

ISIC
(unguarded
preecho/postecho
suppression)
FFT
Control
Adaptive
interpolation
filter
Equalization
CSI
(reliability
detection)
CVI
(CW interference
detection)
AGC control output
Tuner I
2
C
Clock PLL
Viterbi
decoding
Memory
Frequency
deinterleaving
RS
decoding
Error
detection
Output
control
Layer
isolation
TMCC
demodulation
Interpolation
phase
correction
Synchroni
zation
Demapping
CSI
processing
B
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x
FFT window
control
AGC distortion signal
ADC
ADC
IF input
or IQ input
SW
External AGC input
Host I
2
C
Energy
despreading
Energy
despreading
Energy
despreading
Demapping
CSI
processing
Demapping
CSI
processing
M
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a
t
i
o
n

d
i
v
i
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n
Quadrature
detection
AFC
Frequency
CPE
Pilot
extraction
Time
deinterleaving
IC Block Diagram
-26-
CONFIDENTIAL
3. Pin Assignment (Top view)
IC Block Diagram
-27-
IF signal (differential positive side)
4. Pin Functions
This specification indicates pins and their signals in upper case letters and registers and their signals in lower case
letters.
Pin Pin name
(Note4)
I/O
(Note5,7)
PU/PD
Function
(Note 3)
s k r a m e R
(Note 2 and 6)
1 TSMD0 I - Shut down 0: Normal operation 1: Shut down
2 XSEL1 I - Crystal frequency division ratio 1 Set according to crystal frequency.
3 XSEL0 I - Crystal frequency division ratio 0 Set according to crystal frequency.
4 VSS - - Digital GND Connects to DGND.
5 SLADRS1 I/O - Slave address 1 Set according to slave address.
6 SLADRS0 I/O - Slave address 0 Set according to slave address.
7 AGCI I - External AGC input Connects to DGND when not used.
8 S_INFO I - Pin for pre-shipment test Connects to DGND.
9 AGCCNTI I/O PD IF_AGC control output Connects to tuner IF_AGC control input pin.
10 AGCCNTR I/O PD RF_AGC control output
Connects to tuner RF_AGC control input pin.
Open, fixed to L when not used.
11 CKI I - Pin for pre-shipment test Connects to DGND.
12 TNSCL I/O OD I2C clock output
Connects to tuner I2C clock pin.
(Pull-up performed outside IC.)
13 VDDS - - I/O power supply Connects to digital +3.3 V typ.
14 TNSDA I/O OD I2C data I/O
Connects to tuner I2C data pin.
16 VDDC - - Digital +1.2 V power supply Connects to digital +1.2 V typ.
17 PLLVSS - - Clock PLL GND Connects to AGND.
18 XO O - Crystal output
Connects to crystal.
ixosl="1" and open when an external reference clock
is input.
19 XI I - Crystal or reference clock input
Connects to crystal.
The amplitude (p-p) is 0.5 V to PLLVDD when an
external reference clock is input.
20 PLLVDD - - Clock PLL power supply Connects to analog +2.5 V typ.
21 FIL O - PLL filter output Connects to AGND via 1500 pF.
22 AD_AVDD - - ADC analog power supply Connects to analog +2.5 V typ.
23 AD_AVSS - - ADC analog GND Connects to AGND.
24 AD_VREFP - - ADC reference voltage output +1.75 V typ. Connects to AGND via PC.
25 AD_VREFN - - ADC reference voltage output +0.75 V typ. Connects to AGND via PC.
26 AD_VREF - - ADC reference voltage output +1.25 V typ. Connects to AGND via PC.
27 ADQ_AIN I -
Q signal (differential negative side)
input
Single-ended IF: Connects to AGND via PC.
Differential IF: Connects to AGND via PC.
Single-ended IQ: Connects to AGND via PC.
Differential IQ: Connects to tuner Q (-) output after
the DC component was cut.
28 ADQ_AIP I -
Q signal (differential positive side)
input
Differential IF: Connects to AGND via PC.
Single-ended IQ: Connects to tuner Q output after
Differential IQ: Connects to tuner Q (+) output after
29 ADI_AIN I -
IF signal (differential negative side)
input or I signal (differential
negative side) input
Differential IF: Connects to tuner IF (-) output after
Single-ended IQ: Connects to AGND via PC.
Differential IQ: Connects to tuner I (-) output after the
DC component was cut.
30 ADI_AIP I - input or I signal (differential
positive side) input
Single-ended IF: Connects to tuner IF output after
Differential IF: Connects to tuner IF (+) output after
Single-ended IQ: Connects to tuner I output after the
Differential IQ: Connects to tuner I (+) output after the
IC Block Diagram
-28-
CONFIDENTIAL
31 AD_DVSS - - ADC digital GND Connects to DGND.
32 AD_ DVDD - - ADC digital power supply Connects to digital +2.5 V typ.
34 DR1VDD - - Digital +1.2 V power supply Connects to digital +1.2 V typ.
35 VDDS - - I/O power supply Con nects to digital +3.3 V typ.
38 STSFLG1 O PD Status flag 1 output Open, fixed to L when not used.
39 DTCLK I PD Pin for pre-shipment test Open or connects to DGND.
40 DTMB I PU Pin for pre-shipment test Open or connects to digital +3.3 V typ.
41 TSMD1 I - Pin for pre-shipment test Connects to DGND.
42 SYRSTN I/O OD System reset input Inputat specified timing at power ON.
45 SCL I/O OD I2C clock input for host CPU
Connects to I2C clock bus.
46 SDA I/O OD I2C data I/O for host CPU
Connects to I2C data bus.
51 STSFLG0 I/O PD Status flag 0 output Open, fixed to L when not used.
52 SLOCK O
Synchronization completion
(sequence 8 or higher) flag
Open, fixed to L when not used.
53 RERR O - RS decoding error flag output Open, fixed to L when not used.
54 RLOCK O - RS decoding error free flag output Open, fixed to L when not used.
55 RSEORF O - TS error flag output Open, fixed to L when not used.
58 PBVAL O - TS valid flag output Open, fixed to L when not used.
59 SBYTE O - TS synchronization byte flag output Open, fixed to L when not used.
60 SRDT O - Serial TS data output -
61 SRCK O - TS serial clock output -
Note 2 AGND is the abbreviation for analog GND, and DGND is the abbreviation for digital GND.
Note 3 The test dedicated pin is used for the pre-shipment test only. Make sure that processing is performed as
indicated in the "Remarks" column. Any other method will lead to malfunction or failure.
Note 4 I/O indicates the type of the cell used. It may be different from the pin function because a test is conducted
concurrently.
Note 5 PU indicates an I/O with a pull-up resistor (50 ktyp.) and PD indicates an I/O with a pull-down resistor (50
ktyp.). Pulling down the PU pin or pulling up the PD pin outside the IC sometimes changes the electric
potential to the midpoint, resulting in instability. Caution is required.
Note 6 The unused output pins must be open and fixed to L by setting the output enable control register of each pin
for noise reduction or set to the output OFF state.
Note 7 OD indicates an open drain I/O. To use the pin for output, pull up the resistance outside the IC.
* The following pins are added with the upgrade from TC90507 to TC90517 (except the changes of power
supply and GND pins):
Pin
Number
Pin Name Description
21 FIL Added to the PLL loop filter.
27 ADQ_AIN Added for IQ input (differential).
28 ADQ_AIP Added for IQ input.
7 AGCI Added to passthrough the AGC control signal of other ICs.
52 SLOCK Changed from conventional FLOCK.
IC Block Diagram
-29-
PRELIMINARY W9751G6JB
4. B A LL C O N FIG U R A TIO N
1 2 3 4 5 6 7 8 9
A
B
C
D
E
F
G
H
J
K
L
V S S Q
U D Q S
V D D Q
LD Q S
V D D Q
C A S
A 2
A 6
U D Q S
V S S Q
D Q 8
V S S Q
D Q 0
C LK
A 0
A 4
C LK
C S
V D D Q
V D D Q
D Q 7
V D D
O D T
V D D
D Q 14
V D D Q
D Q 12
N C
V D D L
N C
V S S Q
D Q 9
V S S Q
A 3
C K E
B A 0 B A 1
W E
D Q 3
LD M
V S S
D Q 11
V D D Q
V S S
U D M
V D D
D Q 6
V D D Q
D Q 4
V S S
V D D A 12 N C N C N C
A 11 A 8 A 9 A 7
A 5
A 1 A 10/A P
V S S V R E F
D Q 1
V S S Q
V D D Q
V S S Q
N C V S S Q LD Q S
V S S Q D Q 10
D Q 15
D Q 13
V D D Q
V D D Q
D Q 5
V D D
V S S
M
N
P
R
V S S Q D Q 2
V S S D L
R A S
IC Block Diagram
-30-
5. BALL DESCRIPTION
BALL NUMBER SYMBOL FUNCTION DESCRIPTION
M8,M3,M7,N2,N8,N3
,N7,P2,P8,P3,M2,P7
,R2
A0A12 Address
Provide the row address for active commands, and the column
address and Auto-precharge bit for Read/Write commands to select
one location out of the memory array in the respective bank.
Row address: A0A12.
Column address: A0A9. (A10 is used for Auto-precharge)
L2,L3 BA0BA1 Bank Select
BA0BA1 define to which bank an ACTIVE, READ, WRITE or
PRECHARGE command is being applied.
G8,G2,H7,H3,H1,H9
,F1,F9,C8,C2,D7,D3,
D1,D9,B1,B9
DQ0DQ15
Data Input
/ Output
Bi-directional data bus.
K9 ODT
On Die Termination
Control
ODT (registered HIGH) enables termination resistance internal to the
DDR2 SDRAM.
F7,E8
LDQS,
LDQS
LOW Data Strobe
Data Strobe for Lower Byte: Output with read data, input with write
data for source synchronous operation. Edge-aligned with read data,
center-aligned with write data. LDQS corresponds to the data on
DQ0DQ7. LDQS is only used when differential data strobe mode
is enabled via the control bit at EMR (1)[A10 EMRS command].
B7,A8
UDQS,

UP Data Strobe
Data Strobe for Upper Byte: Output with read data, input with write
data for source synchronous operation. Edge-aligned with read data,
center-aligned with write data. UDQS corresponds to the data on
DQ8DQ15. is only used when differential data strobe mode
is enabled via the control bit at EMR (1)[A10 EMRS command].
L8

Chip Select
All commands are masked when is registered
HIGH. provides for external bank selection on systems with
multiple ranks. is considered part of the command code.
K7,L7,K3
RAS , CAS

Command Inputs
RAS , CAS and (along with ) define the command being
entered.

B3,F3
UDM
LDM
Input Data Mask
DM is an input mask signal for write data. Input data is masked when
DM is sampled high coincident with that input data during a Write
access. DM is sampled on both edges of DQS. Although DM pins are
input only, the DM loading matches the DQ and DQS loading.
J8,K8
CLK,
CLK
Differential Clock
Inputs
CLK and CLK are differential clock inputs. All address and control
input signals are sampled on the crossing of the positive edge of CLK
and negative edge of CLK . Output (read) data is referenced to the
crossings of CLK and CLK (both directions of crossing).
K2 CKE Clock Enable
CKE (registered HIGH) activates and CKE (registered LOW)
deactivates clocking circuitry on the DDR2 SDRAM.
J2 VREF Reference Voltage VREF is reference voltage for inputs.
A1,E1,J9,M9,R1 VDD Power Supply Power Supply: 1.8V 0.1V.
A3,E3,J3,N1,P9 VSS Ground Ground.
A9,C1,C3,C7,C9,E9,
G1,G3,G7,G9
VDDQ DQ Power Supply DQ Power Supply: 1.8V 0.1V.
A7,B2,B8,D2,D8,E7,
F2,F8,H2,H8
VSSQ DQ Ground DQ Ground. Isolated on the device for improved noise immunity.
A2,E2,L1,R3,R7,R8 NC No Connection No connection.
J7 VSSDL DLL Ground DLL Ground.
J1 VDDL DLL Power Supply DLL Power Supply: 1.8V 0.1V.
IC Block Diagram
-31-
6. BLOCK DIAGRAM
CKE
A10
DLL
CLOCK
BUFFER
COMMAND
DECODER
ADDRESS
BUFFER
REFRESH
COUNTER
COLUMN
COUNTER
CONTROL
SIGNAL
GENERATOR
MODE
REGISTER
COLUMN DECODER
SENSE AMPLIFIER
CELL ARRAY
BANK #2
COLUMN DECODER
SENSE AMPLIFIER
CELL ARRAY
BANK #0
COLUMN DECODER
SENSE AMPLIFIER
CELL ARRAY
BANK #3
DATA CONTROL
CIRCUIT
DQ
BUFFER
COLUMN DECODER
SENSE AMPLIFIER
CELL ARRAY
BANK #1
NOTE: The cell array configuration is 8192 * 1024 * 16
A0
A9
A11
A12
BA1
BA0
CS
RAS
CAS
WE
CLK
CLK
PREFETCH REGISTER
ODT
CONTROL
DQ0
|
DQ15
LDQS
LDQS
UDQS
UDQS
LDM
UDM
ODT

MAIN PCB-TOP
-32-
MAIN PCB-BOT
-33-
55
44
33
22
11
D
D
C
C
B
B
A
A
P
B
-
O
N
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F
F
1
4
8
2
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T
1
4
8
2
F
B
1
4
8
2
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N
1
4
8
2
C
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B
P
B
-
O
N
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F
F
P
B
-
A
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1
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1
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H
W
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2
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2
V
V
C
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2
V
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4
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5
V
A
+
5
V
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1
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V
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1
2
V
A
5
V
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P
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2
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2
D
C
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A
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2
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B
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+C A 1 2
1 0 0 u F / 1 6 V
+C A 1 2
1 0 0 u F / 1 6 V
C
1
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ADJ
OUT
IN
U
3
8
A
M
S
1
1
1
7
-
3
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V
ADJ
OUT
IN
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3
8
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M
S
1
1
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3
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6
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1
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4
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1
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U
3
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P
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4
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2
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3
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P
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1
4
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2
IN
2
B
S
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4
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5
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6
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4
4
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C
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4
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C 1 0 4 1 0 nC 1 0 4 1 0 n
ADJ
OUT
IN
U
3
7
A
M
S
1
1
1
7
-
3
.3
V
ADJ
OUT
IN
U
3
7
A
M
S
1
1
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1
0
1
0
0
R
+
C
8
9
7
1
0
0
u
F
/1
6
V
+
C
8
9
7
1
0
0
u
F
/1
6
V
+
C
8
9
4
1
0
0
u
F
/1
6
V
+
C
8
9
4
1
0
0
u
F
/1
6
V
R 5 1 3 1 0 0 RR 5 1 3 1 0 0 R
R
5
1
8
0
R
R
5
1
8
0
R
C
8
8
8
0
.1
u
C
8
8
8
0
.1
u
C
8
8
4
1
8
p
C
8
8
4
1
8
p
+
C
8
5
7
1
0
0
u
F
/1
6
V
+
C
8
5
7
1
0
0
u
F
/1
6
V
R 5 2 6 1 0 KR 5 2 6 1 0 K
C
8
6
6
N
C
C
0
4
0
2
C
8
6
6
N
C
C
0
4
0
2
C
8
9
6
1
0
0
n
F
C
0
4
0
2
C
8
9
6
1
0
0
n
F
C
0
4
0
2
C
8
6
8
0
.1
u
C
8
6
8
0
.1
u
R
5
3
2
N
C
/1
K
R
5
3
2
N
C
/1
K
R 5 1 2 1 0 KR 5 1 2 1 0 K
C
8
7
3
0
.1
u
C
8
7
3
0
.1
u
Y
2
2
5
.4
M
H
z
Y
2
2
5
.4
M
H
z
12
3
7 5 3 1
8 6 4 2
R
P
6
1
3
3
R
X
4
7 5 3 1
8 6 4 2
R
P
6
1
3
3
R
X
4
C
8
6
9
1
u
C
8
6
9
1
u
C
8
8
7
0
.1
u
C
8
8
7
0
.1
u
C
8
9
0
0
.1
u
C
8
9
0
0
.1
u
C
8
8
2
1
8
p
C
8
8
2
1
8
p
C
8
9
5
1
0
0
n
F
C
8
9
5
1
0
0
n
F
C
8
7
0
0
.1
u
C
8
7
0
0
.1
u
L
4
1
2
F
B
0
6
0
3
L
4
1
2
F
B
0
6
0
3
R
5
2
0
1
K
2
R
5
2
0
1
K
2
C
8
7
1
0
.1
u
C
8
7
1
0
.1
u
L
4
1
1
F
B
0
6
0
3
L
4
1
1
F
B
0
6
0
3
C
8
7
4
1
u
C
8
7
4
1
u
C
8
6
5
1
u
C
8
6
5
1
u
R
5
1
6
3
3
R
R
5
1
6
3
3
R
C
8
8
5
1
u
C
8
8
5
1
u
C
8
5
9
1
u
C
8
5
9
1
u
R 5 2 4 1 0 KR 5 2 4 1 0 K
C
8
6
7
1
u
C
8
6
7
1
u
C
8
5
8
0
.1
u
C
8
5
8
0
.1
u
+
C
8
9
1
1
0
0
u
F
/1
6
V
+
C
8
9
1
1
0
0
u
F
/1
6
V C
8
6
2
0
.1
u
C
8
6
2
0
.1
u
U
5
5
T
C
9
0
5
1
7
F
G
U
5
5
T
C
9
0
5
1
7
F
G
V
S
S
5
0
S
T
S
F
L
G
0
5
1
S
L
O
C
K
5
2
R
E
R
R
5
3
R
L
O
C
K
5
4
R
S
E
O
R
F
5
5
V
D
D
C
5
6
V
S
S
5
7
P
B
V
A
L
5
8
S
B
Y
T
E
5
9
S
R
D
T
6
0
S
R
C
K
6
1
V
S
S
6
2
V
D
D
C
6
3
V
D
D
S
6
4
T S M D O
1
X S E L 1
2
X S E L 0
3
V S S
4
S L A D R S 1
5
S L A D R S 0
6
A G C I
7
S _ I N F O
8
A G C C N T I
9
A G C C N T R
1 0
C K I
1 1
T N S C L
1 2
V D D 3 3
1 3
T N S D A
1 4
V S S
1 5
V D D C
1 6
P
L
L
V
S
S
1
7
X
0
1
8
X
1
1
9
P
L
L
V
D
D
2
0
F
IL
2
1
A
D
_
A
V
D
D
2
2
A
D
_
A
V
S
S
2
3
A
D
_
V
R
E
F
P
2
4
A
D
_
V
R
E
F
N
2
5
A
D
_
V
R
E
F
2
6
A
D
Q
_
A
IN
2
7
A
D
Q
_
A
IP
2
8
A
D
I_
A
IN
2
9
A
D
I_
A
IP
3
0
A
D
_
D
V
S
S
3
1
A
D
_
D
V
D
D
3
2
V S S
3 3
D R 1 V D D
3 4
V D D S
3 5
V D D C
3 6
V S S
3 7
S T S F L G 1
3 8
D T C L K
3 9
D T M B
4 0
T S M D 1
4 1
S Y R S T N
4 2
D R 2 V D D
4 3
V S S
4 4
S C L
4 5
S D A
4 6
V S S
4 7
D R 1 V D D
4 8
V
D
D
S
4
9
R
5
3
1
1
K
R
5
3
1
1
K
R 5 1 5 1 0 KR 5 1 5 1 0 K
C
8
7
5
0
.1
u
C
8
7
5
0
.1
u
C
8
7
6
0
.1
u
C
8
7
6
0
.1
u
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
FB
+
2
4
V
G
N
D
G
N
D
+
1
2
V
G
N
D
+
1
2
V
G
N
D
+
5
V
S
T
B
G
N
D
S
T
B
G
N
D
1
A
D
J
E
N
A
+
2
4
V
+
2
4
V
G
N
D
G
N
D
+
1
2
V
+
1
2
V
G
N
D
G
N
D
+
5
V
G
N
D
S
T
B
B
R
I
+
2
4
V

A
A
VCC-PWM
VCC-PFC
VCC-PWM
+5VB
PS_ON
FEEDBAK1
INPUT-
DRIVER1
+24V
+12V
+12VA
+24VA
+12V
5VSB
+12V +24V
+5VB
+12V
+24V
+5V
+5V
Title
Size Document Number Rev
Date: Sheet of
<Doc>
<RevCode>
5800-P32ALB-W010
Custom
1 3 Tuesday, September 20, 2011
Title
Date: Sheet of
<Doc>
<RevCode>
5800-P32ALB-W010
Custom
Title
Date: Sheet of
<Doc>
<RevCode>
5800-P32ALB-W010
Custom
L N
NEW STANDARD CONECTION
INPUT: 100-240V AC
STB
OUTPUT: +24V/1.5A
+12V/2.5A
+5VSB/1A
SPECIFICATION
ON
OFF
OUTPUT: +12V/4.5A
D30
LL4148
D30
LL4148
CY3 471/400VAC CY3 471/400VAC
R64
2M2/1/6W
R64
2M2/1/6W
R
2
3
7
.
5
K

1
/
6
W
R
2
3
7
.
5
K

1
/
6
W
R28
1K//1/6W
R28
1K//1/6W
C16
471
C16
471
D34
LL4148
D34
LL4148
J 59 J 59
J 73 J 73
CN6
PIN14
CN6
PIN14
1
4
+
2
4
V
1
3
+
2
4
V
1
2
G
N
D
1
1
G
N
D
1
0
+
1
2
V
9
+
1
2
V
8
G
N
D
7
G
N
D
6
+5V
5
GND
4
S
T
B
3
G
N
D
1
2
A
D
J
1
E
N
A
+
C2
1000U 35V
+
C2
1000U 35V
C17
103/630V
C17
103/630V
J 56 J 56
CN1 CN1
1 2 3
D29
LL4148
D29
LL4148
R62
33K/1/6W
R62
33K/1/6W
U3
OB2273AP
U3
OB2273AP
GND
8
VDD
2
GATE
1
RT
6
NC
3
CS
4
NC
7
FB
5
Q4
KSP2222A
Q4
KSP2222A
1
3
2
C13
NC
C13
NC
D24
BA158
D24
BA158
R70
10K/1/6W
R70
10K/1/6W
J 60 J 60
J 62 J 62
R19
33R1/6W
R19
33R1/6W
R2
10K/1/6W
R2
10K/1/6W
R17A
0.22R/2W
R17A
0.22R/2W
R37
1k/1/6W
R37
1k/1/6W
R
1
6
1
0
1
R
/
2
W
R
1
6
1
0
1
R
/
2
W
R17
0.22R/2W
R17
0.22R/2W
R35
1k/1/6W
R35
1k/1/6W
R66
3.3K/1/6W
R66
3.3K/1/6W
CX2
224/275VAC
CX2
224/275VAC
ZD5 ZD5
2
1
J 12 J 12
R63
220K/1/6W
R63
220K/1/6W
C22
102/630V
C22
102/630V
Q8
SMK0765F
Q8
SMK0765F
2
1
3
R
6
5
1
0
0
K
/
1
/
6
W
R
6
5
1
0
0
K
/
1
/
6
W
DS1 DS1
D15
MBR20150C
D15
MBR20150C
C34
102
C34
102
+
C1
150U 450V
+
C1
150U 450V
Q3
KSP2222A
Q3
KSP2222A
1
3 2
R24
22R/2W
R24
22R/2W
ZD2
27V
ZD2
27V
2
1
R52
100K 2W
R52
100K 2W
J 1 J 1
J 80 J 80
C8
223
C8
223
J 13 J 13
R68
47R/1/6W
R68
47R/1/6W
+
C51
10U 50V
+
C51
10U 50V
R32
10K/1/4W
R32
10K/1/4W
R55
1K/1/6W
R55
1K/1/6W
Q5
2761
Q5
2761
2
1
3
D14
MBR20150C
D14
MBR20150C
J 75 J 75
C26
471
C26
471
J 16 J 16
L2
5uH
L2
5uH
U3
TEA1733
U3
TEA1733
Isense
4
Protect
6
Visense
5
GND
2
CTRL
7
Optimer
8
Driver
3
VCC
1
R7
1K/1/6W
R7
1K/1/6W
D3
SF10A600H
D3
SF10A600H
+
C43
4.7U 50V
+
C43
4.7U 50V
R33
3.3UH
R33
3.3UH
R
4
7
1
0
1
/
2
W
R
4
7
1
0
1
/
2
W
F2
FUSE T1A 250VAC
F2
FUSE T1A 250VAC
U9
PC817C
U9
PC817C
1
2 3
4
+
C49
4.7U 50V
+
C49
4.7U 50V
LF1
ET24E
LF1
ET24E
1 2
3 4
J
1
8
J
1
8
D32
2.2M/1/2W
D32
2.2M/1/2W
L3
5uH
L3
5uH
CX1
224/275VAC
CX1
224/275VAC
R21A
2M2/1/4W
R21A
2M2/1/4W
R15
3.3K/2W
R15
3.3K/2W
J
2
3
J
2
3
C27
224
C27
224
+
C23
2200uF/10V
+
C23
2200uF/10V
-
+
BD1
KBJ 606J
-
+
BD1
KBJ 606J
2
1
3
4
R67
2K/1/6W
R67
2K/1/6W
CN2
PIN13
CN2
PIN13
1
+
2
4
V
2
+
2
4
V
3
GND
4
G
N
D
5
+
1
2
V
6
G
N
D
7
+
1
2
V
8
G
N
D
9
+
5
V
1
0
S
T
B
R60
1R8/2W
R60
1R8/2W
C21
104
C21
104
R69
0.27R/2W
R69
0.27R/2W
J 58 J 58
R54
NC
R54
NC
J 17
2.2M/1/2W
J 17
2.2M/1/2W
R4
10K/1/6W
R4
10K/1/6W
R1
47R/1/6W
R1
47R/1/6W
R22
2.2M/1/2W
R22
2.2M/1/2W
C35
102
C35
102
C32
104
C32
104
F1
FUSE T3.15A L 250V~
F1
FUSE T3.15A L 250V~
R27
10k/1/6W
R27
10k/1/6W
TH1
5.0
TH1
5.0
D1
1N5397
D1
1N5397
C19
104
C19
104
+
C24
2200U 10V
+
C24
2200U 10V
C30
681
C30
681
+ C42
4.7U 50V
+ C42
4.7U 50V
CN5
PIN3
CN5
PIN3
1
B
R
I
2
S
T
B
3
G
N
D
R58
33R/1/6W
R58
33R/1/6W
+ C5
1000U 25V
+ C5
1000U 25V
D23
BA158
D23
BA158
Q9
J CS4N60
Q9
J CS4N60
2
1
3
C73
104
C73
104
J 71 J 71
TNR1 S14K561 TNR1 S14K561
R12A
2M2/1/4W
R12A
2M2/1/4W
C33
104
C33
104
C28
474
C28
474
R51
100K 2W
R51
100K 2W
ZD3
18V
ZD3
18V
2
1
U5
TL431
U5
TL431
C11
471
C11
471
+
C3
1000U 35V
+
C3
1000U 35V
J 27 J 27
U11 PC817C U11 PC817C
1
2 3
4
CY4 222/400VAC CY4 222/400VAC
L4
5uH
L4
5uH
ZD7
30V
ZD7
30V
2
1
C14
681/1KV
C14
681/1KV
+ C6
1000U 25V
+ C6
1000U 25V
D2
1N5397
D2
1N5397
C25
104
C25
104
R25
22R/2W
R25
22R/2W
J 64 J 64
R38
20k/1/6W
R38
20k/1/6W R6
1K/1/6W
R6
1K/1/6W
J 7 J 7
D28
LL4148
D28
LL4148
R11
2.2M/1/2W
R11
2.2M/1/2W
LF2
ET24E
LF2
ET24E
1 2
3 4
J 4 J 4
D16
31DQ06
D16
31DQ06
C10
1uF 450V MPP
C10
1uF 450V MPP
D33
LL4148
D33
LL4148
J 6 J 6
R3
10K/1/6W
R3
10K/1/6W
J 55 J 55
J 72 J 72
R
3
4
1
0
K
/
1
/
6
W
R
3
4
1
0
K
/
1
/
6
W
C29
104
C29
104
R61
1K/1/6W
R61
1K/1/6W
Q10
KSP2222A
Q10
KSP2222A
1
3
2
R21
2M2/1/4W
R21
2M2/1/4W
R41
10K/1/4W
R41
10K/1/4W
DS2 DS2
R30
4R7/1/4W
R30
4R7/1/4W
F
3
F
U
S
E

T
1
A

2
5
0
V
A
C
F
3
F
U
S
E

T
1
A

2
5
0
V
A
C
R56
47R/1/6W
R56
47R/1/6W
L1
PQ3220
L1
PQ3220
CY1
471/400VAC
CY1
471/400VAC
T2
EE2834
T2
EE2834
7
8
9
10
3
1
2
6
D31
LL4148
D31
LL4148
ZD6
15V
ZD6
15V
2
1
U4
TL431
U4
TL431
J 45 J 45
CY2
471/400VAC
CY2
471/400VAC
Q2
SN2907
Q2
SN2907
1
3 2
R12
2M2/1/4W
R12
2M2/1/4W
J 26 J 26
R59
2.2R/1/6W
R59
2.2R/1/6W
J 61 J 61
R20
2K 1%1/6W
R20
2K 1%1/6W
+ C7
1000U 25V
+ C7
1000U 25V
J 69 J 69
T5 T5
1
3
2
5
4
10
6
R5
471/1/6W
R5
471/1/6W
C31
224
C31
224
C20
471/1KV
C20
471/1KV
U10 PC817C U10 PC817C
1
2 3
4
R57
10K/1/6W
R57
10K/1/6W
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
S1
PFC_VCC
PFC-400VDC
INPUT-
DRIVER1
PFC_VCC
Title
Date: Sheet of
<Doc> <RevCode>
5800-P32ALB-W010
Custom
Title
Date: Sheet of
<Doc> <RevCode>
5800-P32ALB-W010
Custom
Title
Date: Sheet of
<Doc> <RevCode>
5800-P32ALB-W010
Custom
C46
474
C46
474
U1
OB6572AP
U1
OB6572AP
GND
1
ICOMP
2
ISENSE
3
FRE
4
VCOMP
5
VSENSE
6
VCC
7
Gate
8
C48
104
C48
104
J 23 J 23
R9
2.2M/1/4W
R9
2.2M/1/4W
R13
471/1/6W
R13
471/1/6W
C40
104
C40
104
C44
472
C44
472
R36
33R/1/6W
R36
33R/1/6W
R99
20K/1/6W
R99
20K/1/6W
+
C41
10U 35V
+
C41
10U 35V
R100
33R/1/6W
R100
33R/1/6W
R8
2.2M/1/4W
R8
2.2M/1/4W
R101
6.8K/1/6W
R101
6.8K/1/6W
R102
100K/1/6W
R102
100K/1/6W
R53
33K/1/6W
R53
33K/1/6W
D27
1N4148
D27
1N4148
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VD
400V+
ON/OFF
ADJ
VD
G1
G2
G1
G2
+12VB
VD
+12V +24V
+12V
+12VB
Title
Date: Sheet of
<Doc> <RevCode>
5800-P32ALB-W010
Custom
Title
Date: Sheet of
<Doc> <RevCode>
5800-P32ALB-W010
Custom
Title
Date: Sheet of
<Doc> <RevCode>
5800-P32ALB-W010
Custom
J 31 J 31
CA13
103
CA13
103
RA14
2K 1/6W
RA14
2K 1/6W
CA4
22P/3KV
CA4
22P/3KV
CA14
474
CA14
474
RA24
1.5K/1/4W
RA24
1.5K/1/4W
J 24 J 24
RA2
10K/1/6W
RA2
10K/1/6W
DA4
HER108
DA4
HER108
DA8
HER206
DA8
HER206
J 79 J 79
CA18
474
CA18
474
RA33
10K/1/6W
RA33
10K/1/6W
RA26
10K/1/6W
RA26
10K/1/6W
J 28 J 28
RA13
10k/1/6W
RA13
10k/1/6W
CA3
22P/3KV
CA3
22P/3KV
RA15
10K/1/6W
RA15
10K/1/6W
RA32
27K/1/6W
RA32
27K/1/6W
RA20
10R/1/6W
RA20
10R/1/6W
CA23
224
CA23
224
DA9
HER206
DA9
HER206
T6
EE16(5+5)
T6
EE16(5+5)
7
9
2
1
5
4
RA22
10R/1/6W
RA22
10R/1/6W
CA11
471
CA11
471
RA12
12K/1/6W
RA12
12K/1/6W
+
CA24
4.7U 25V
+
CA24
4.7U 25V
+
CA16
4.7U 25V
+
CA16
4.7U 25V
CA19
474
CA19
474 CA1
5P/3KV
CA1
5P/3KV
RA19
22R/1/6W
RA19
22R/1/6W
CN2
2PIN
CN2
2PIN
1
2
CN3
2PIN
CN3
2PIN
1
2
CA17
474
CA17
474
RA31
220k/1/6W
RA31
220k/1/6W
Q6
5N50
Q6
5N50
2
1
3
J 9 J 9
CA12
474
CA12
474
DA2
1N4148
DA2
1N4148
DA7
1N4148
DA7
1N4148
J 8 J 8
CA15
104
CA15
104
CA17
474
CA17
474
RA23
10R/1/6W
RA23
10R/1/6W
J 25 J 25
CA20
105/450V
CA20
105/450V
RA28
22R/1/6W
RA28
22R/1/6W
QA5
T01N60
QA5
T01N60
2
1
3
U6
OB3309
U6
OB3309
DRC
4
BF/DMOD
5
POL
6
VDD
7
GATE1
8
GATE2
9
GND
10
VS
11
PRT
12
CS
13
CMP
14
STIME
15
ENA
1
RT
3
RI
2
DIM
16
RA16
1K/1/6W
RA16
1K/1/6W
RA17
121R/2W
RA17
121R/2W
J 2 J 2
QA9
2N2907
QA9
2N2907
1
3
2
CA5
472/1KV
CA5
472/1KV
RA27
4.7R/1/6W
RA27
4.7R/1/6W
QA7
2N2907
QA7
2N2907
1
3
2
T3
UF9.8
T3
UF9.8
1
4
2
3
RA9
4.7K/1/6W
RA9
4.7K/1/6W
Q7
5N50
Q7
5N50
2
1
3
RA34
10K/1/6W
RA34
10K/1/6W
DA1
1N4148
DA1
1N4148
RA6
10k/1/6W
RA6
10k/1/6W
RA3
10K/1/4W
RA3
10K/1/4W
RA4
1M/1/4W
RA4
1M/1/4W
CA7
681/1KV
CA7
681/1KV
QA1
2N2222
QA1
2N2222
1
3
2
RA5
33K/1/6W
RA5
33K/1/6W
CA10
391
CA10
391
RA8
4K7/1/6W
RA8
4K7/1/6W
J 10 J 10
RA10
10K/1/6W
RA10
10K/1/6W
CA9
221
CA9
221
CA21
105/450V
CA21
105/450V
Q2
2N2907
Q2
2N2907
1
3
2
DA11
HER206
DA11
HER206
J 30 J 30
QA6
2N2222
QA6
2N2222
1
3
2
DA6
1N4148
DA6
1N4148
J 77 J 77
QA3
2N2222
QA3
2N2222
1
3
2
J 74 J 74
J 11 J 11
CA8
103
CA8
103
DA10
HER206
DA10
HER206
RA30
10K/1/6W
RA30
10K/1/6W
RA1
10K/1/6W
RA1
10K/1/6W
J 15 J 15
QA8
2N2222
QA8
2N2222
1
3
2
RA11
47R/2W
RA11
47R/2W
RA25
1.5K/1/4W
RA25
1.5K/1/4W
T4A
EFD36
T4A
EFD36
3
1
7
5
DA5
1N4148
DA5
1N4148
J 21 J 21
DA3
HER108
DA3
HER108
R92
4K7/1/6W
R92
4K7/1/6W
RA35
2K/1/6W
RA35
2K/1/6W
J 14 J 14
CA2
5P/3KV
CA2
5P/3KV
RA21
10R/1/6W
RA21
10R/1/6W
J 3 J 3
QA4
T01N60
QA4
T01N60
2
1
3
CA6
472/1KV
CA6
472/1KV
RA29
4.7R/1/6W
RA29
4.7R/1/6W
ZA1
5.6V
ZA1
5.6V
2
1

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