VLSI Signal Processing

1
CORDIC
(Coordinate rotation digital computer)
For VLSI Signal Processing Course

Ref: Y. H. Hu, CORDIC based VLSI architecture for
digital signal processing, IEEE Signal Processing Mag.,
pp.16-35, July 1992.


2001/4/30
VLSI Signal Processing

2
Rotation Operation
(

=
(

) (
) (
.
cos sin
sin cos
'
'
i y
i x
y
x
u u
u u
You need: 4 multipliers.
2 adders.
or ROM for Table Look-up
VLSI Signal Processing

3
What is CORDIC ?
COordinate Rotation DIgital Computer

Why do we use CORDIC ?
MAC dominates the implementational
cost in some DSP functions.
The DSP approach, CORDIC, helps to
save the hardware cost.
VLSI Signal Processing

4
Basic Concept of The CORDIC
To decompose the desired rotation angle ()
into the weighted sum of a set of predefined
elementary rotation angles (am(i))
Such that the rotation through each of them
can be accomplished with simple shift-and-
add operation.
VLSI Signal Processing

5
Behavior of CORDIC
V(0)
V(1)
V(3)
1
2 2
= + y x
VLSI Signal Processing

6
(

=
(

+
+
) (
) (
.
cos sin
sin cos
) 1 (
) 1 (
i y
i x
a a
a a
i y
i x
m m
m m
In General Case:
(

(
(

=
(

+
+
) (
) (
.
1
1
) 1 (
) 1 (
2
2
i y
i x
i
i
i y
i x
i
i

In CORDIC Algorithm:
(

=
(

+
+
) (
) (
1 tan
tan 1
cos
) 1 (
) 1 (
i y
i x
a
a
a
i y
i x
m
m
m
VLSI Signal Processing

7
CORDIC Algorithm
(i) am i
1 - n
0
1 - n
0


= =
= =
i i
i
u u
) 2 ( tan a
1
m
i
=
2 a tan ) (
1
m
i
=

)......... 2 ( tan ) 2 ( tan ) 2 ( tan

2 1 1 1 0 1
=
.........
4 3 2 1 1
u u u u u u =
VLSI Signal Processing

8
Initiation:Given x(0),y(0),z(0)
For i=0 to n-1 ,Do
/*CORDIC iteration equation */
/*Angle updating equation*/
(i) a - m i z(i) 1) z(i = +
/*Scaling Operation (required for m=1 only)*/
End i loop
(

=
(

) (
) (
) (
1
n y
n x
n K y
x
m f
f
(

(
(

=
(

+
+
) (
) (
.
1
1
) 1 (
) 1 (
2
2
i y
i x
i
i
i y
i x
i
i

m
n
i
m
a
n K
cos
1
) (
1
0
H

=
=
VLSI Signal Processing

9
X(i) Y(i)
X-Reg Y-Reg
+/- +/-
Barrel
shifter
Barrel
shifter
X(i+1) Y(i+1)

a(n-1)

a(1)
a(0)
Z-reg
i

Z(i+1)
Basic
processor for
CORDIC
VLSI Signal Processing

10
Modes of Operations

Vector rotation mode ( is given) :
determined by the set of




) (
i
z(n) - z(n) - z(0)
1
0
i
m
n
i
a

=
= = u
The objective is to compute the final
vector (Usually, we set z(0)= .)

= sign of z(i)
VLSI Signal Processing

11


Modes of Operations (contd)


Angle accumulation mode ( is
not given)
The objective is to rotate the given initial
vector back to x-axis ,and the angle can
be accrued.(Now, we let z(0)=0.)
= - sign of x(i)y(i)

V(0)
V(1)
X-axis
VLSI Signal Processing

12
Scaling Operation
b
q p
Q
q
q
i
q
m
P
p
i
p
m
n
i
i m s
i m
k k
k
n K
Type
k
n K
Type
m K
q
p

< = =
+ + =
=
+ =
[

[
2 ; 1 ; 1
) 2 1 (
) (
1
: 2 .
2
) (
1
: 1 .
2 1
1
1
1
0
) , ( 2 2
c
c

VLSI Signal Processing

13
X(n) Y(n)
X(n) Y(n)
+/- +/-
Barrel
shifter
Barrel
shifter
X-Reg Y-Reg
) ( ' 2 ) ( ' ) 1 ( '
) ( ' 2 ) ( ' ) 1 ( '
: 2
) ( 2 ) ( ' ) 1 ( '
) ( 2 ) ( ' ) 1 ( '
: 1
n y i y i y
n x i x i x
Type
n y i y i y
n x i x i x
Type
q
q
p
p
i
i
i
i

+ = +
+ = +
+ = +
+ = +
f f
y x
Scaling Stage
VLSI Signal Processing

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Advantages and disadvantages
Simple Shift-and-add Operation.
(2 adders+2 shifters v.s. 4 mul.+2 adder)
-It needs n iterations to obtain n-bit
precision.
-Slow carry-propagate addition.
-Low throughput rate
-Area consuming shifting operations.

VLSI Signal Processing

15
How to improve CORDIC ?
Use Pipelined Architecture
Improve the Performance of the Adders
(redundant arithmetic, CSA)
Reduce Iteration Number
High radix CORDIC. (e.g., Radix-4, Radix-8)
Find a optimized shift sequence (e.g., AR-CORDIC)
Improve the Scaling Operation
Canonical multiplier recoding
Force Km to 2.

=
P
p
i
p
m
p
k
n K
1
2
) (
1
1 =
p
k
VLSI Signal Processing

16
Parallel and Pipelined Arrays
Basic
CORDIC
Processor
1
Basic
CORDIC
Processor
2
Basic
CORDIC
Processor
n+s
x(0)
y(0)
f
f
y
x
Basic
CORDIC
Processor
1
Basic
CORDIC
Processor
2
Basic
CORDIC
Processor
n+s
L
A
T
C
H
L
A
T
C
H
L
A
T
C
H
f
f
y
x
) 0 (
) 0 (
1
1
+ +
+ +
s n
s n
y
x
) 1 (
s n
v
+ ) 1 (
2
+ s n v
) (
1
s n v +
) 2 (
1 +s n
v
) 0 (
1 + +s n
v
VLSI Signal Processing

17
(

=
(

+
+
) (
) (
.
cos sin
sin cos
) 1 (
) 1 (
i y
i x
a a
a a
i y
i x
m m
m m
In General Case:
(

(
(

=
(

+
+
) (
) (
.
1
) , (
) , (
1
) 1 (
) 1 (
2
2
i y
i x
i m s
i m s
m
i y
i x
i
i

In CORDIC Algorithm:
(

=
(

+
+
) (
) (
1 tan
tan 1
cos
) 1 (
) 1 (
i y
i x
a
a
a
i y
i x
m
m
m
VLSI Signal Processing

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Generalized CORDIC Algorithm
(i) am i
1 - n
0

=
=
i
u
] 2 [ tan
m
1
a
) , (
1
m = =

i m s
m
1 2 tanh
1 2 tan
0
) , 1 (
1
) , 1 (
1
) 1 , 0 (
2
=
=

m
m
m
i s
i s
s
m0 , linear system ;
m=1 , circular system ;
m=-1 , hyperbolic system.
VLSI Signal Processing

19
Circular
Linear
V(2)
V(4)
V(0)
V(1)
V(3)
1
2 2
= + y x
V(0)
V(2)
V(1)
V(3)
Hyperbolic
V(0)
V(1)
V(2)
V(3)
Different
coordinates
VLSI Signal Processing

20
Initiation: Given x(0),y(0),z(0)
For i=0 to n-1 ,Do
/*CORDIC iteration equation */
/*Angle updating equation*/
(i) a - m i z(i) 1) z(i = +
/*Scaling Operation (required for m=1 only)*/
End i loop
(

=
(

) (
) (
) (
1
n y
n x
n K y
x
m f
f
(

(
(

=
(

+
+
) (
) (
.
1
) , (
) , (
1
) 1 (
) 1 (
2
2
i y
i x
i m s
i m s
m
i y
i x
i
i

VLSI Signal Processing

21
Shift Sequence
{s(m,i); 0-i-n-1}
) 1 (
- ) (
1
0
) (

=
s

=
n a
a
m
i
m
n
i
i
o
u o
Determine the convergence of the CORDIC
iteration, as well as the magnitude of the scaling
factor Km(n).
m=0 or 1 , s=(m,i)=i
m=-1 , s(-1,i)=1,2,3,4,4,5,.,12,13,14,14,..
An angle approximation
error:
VLSI Signal Processing

22
Application to DSP Algorithms
Linear transformation:
- DFT, Chirp-Z transform, DHT, and FFT.
Digital filters:
- Orthogonal digital filters, and adaptive lattice filters.
Matrix based digital signal processing
algorithms:
- QR factorization, with applications to Kalman
filtering
- Linear system solvers, such as Toeplitz and
covariance system solvers,,etc.
VLSI Signal Processing

23
FFT application
N nk j
e
t 2
N nk j
e b a a
t 2
'

+ =
-1
' a
' b
a
b

N nk j
e b a b
t 2
'

=
VLSI Signal Processing

24
Butterfly unit

+
+
-
-
CORDIC
processor
R
a
I
a
R
b
I
b
R
a'
I
a'
R
b'
I
b'
N nk j
e
t 2
VLSI Signal Processing

25
Conclusions
1. In some cases, CORDIC evaluates rotational
functions more efficiently than MAC units.
2. CORDIC saves more hardware cost.
3. By the regularity, the CORDIC based
architecture is very suitable for implementation
with pipelined VLSI array processors.
4. The utility of the CORDIC based architecture
lies in its generality and flexibility.