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  • Experiment No:-9: Program For 3-Bit Comparator'

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    ahim7
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    This document describes a 3-bit comparator circuit. It defines an entity with input ports A and B that take 3-bit inputs and output ports F1, F2, and F3. The architecture contains a process that uses if/else statements to compare the bits of A and B and sets the outputs accordingly - F1 is set if A is greater than B, F2 if they are equal, and F3 if A is less than B. Diagrams of the register transfer level view and schematic, as well as output waveforms, are also included to illustrate the comparator's function.

    Original Description:

    this is a prog of vhdl

    Original Title

    COMPARATOR 3-BIT2003

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    This document describes a 3-bit comparator circuit. It defines an entity with input ports A and B that take 3-bit inputs and output ports F1, F2, and F3. The architecture contains a process that uses if/else statements to compare the bits of A and B and sets the outputs accordingly - F1 is set if A is greater than B, F2 if they are equal, and F3 if A is less than B. Diagrams of the register transfer level view and schematic, as well as output waveforms, are also included to illustrate the comparator's function.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as DOC, PDF, TXT or read online from Scribd
    Flag for inappropriate content
    15 views12 pages

    Experiment No:-9: Program For 3-Bit Comparator'

    Uploaded by

    ahim7
    This document describes a 3-bit comparator circuit. It defines an entity with input ports A and B that take 3-bit inputs and output ports F1, F2, and F3. The architecture contains a process that uses if/else statements to compare the bits of A and B and sets the outputs accordingly - F1 is set if A is greater than B, F2 if they are equal, and F3 if A is less than B. Diagrams of the register transfer level view and schematic, as well as output waveforms, are also included to illustrate the comparator's function.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as DOC, PDF, TXT or read online from Scribd
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    of 12

    EXPERIMENT NO:-9

    OBJECT:- PROGRAM FOR ‘ 3-BIT COMPARATOR’ .

    library IEEE;
    use IEEE.STD_LOGIC_1164.ALL;
    use IEEE.STD_LOGIC_ARITH.ALL;
    use IEEE.STD_LOGIC_UNSIGNED.ALL;

    ENTITY COMPARATOR IS
    PORT ( A,B : IN STD_LOGIC_VECTOR(2 DOWNTO 0);
    F1 : OUT STD_LOGIC;
    F2 : OUT STD_LOGIC;
    F3 : OUT STD_LOGIC);
    END COMPARATOR ;

    ARCHITECTURE BEHAVIORAL OF COMPARATOR IS

    BEGIN
    PROCESS(A,B)
    BEGIN
    IF(A(2)='0' AND B(2)='1')THEN
    F3 <='1'; F2 <='0'; F1 <='0';
    ELSIF(A(2)='1' AND B(2)='0')THEN
    F1 <='1'; F2 <='0'; F3 <='0';
    ELSE
    IF(A(1)='0' AND B(1)='1')THEN
    F3 <='1'; F2 <='0'; F1 <='0';
    ELSIF(A(1)='1' AND B(1)='0')THEN
    F1 <='1'; F2 <='0'; F3 <='0';
    ELSE
    IF(A(0)='0' AND B(0)='1')THEN
    F3 <='1'; F2 <='0'; F1 <='0';
    ELSIF(A(0)='1' AND B(0)='0')THEN
    F1 <='1'; F2 <='0'; F3 <='0';
    ELSE
    F2<='1';F1<='0';F3<='0';
    END IF;
    END IF;
    END IF;
    END PROCESS;

    END BEHAVIORAL;

    REGISTER TRANSFER LOGIC VIEW


    SCHEMATIC OF 3-BIT COMPARATOR
    WAVEFORMS OF 3-BIT COMPARATOR
    OUTPUT WAVEFORM OF 4-BIT COMPARATOR

    F1=’1’ BECAUSE A>B


    F2 = ‘1’ BECAUSE A = B
    F3 = ‘1’ BECAUSE A<B

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