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Frequently Asked Microcontroller Interview Questions and Answers

1)What is meant by micro controller?
A device which contains the microprocessor with interated peripherals like memory! serial
ports! parallel ports! timer"counter! interrupt controller! data acquisition inter#aces like A$%!
$A% is called micro controller&

')(ist the #eatures o# )*+1 micro controllers?
,inle supply -+v operation usin .M/, technoloy&
0*12 bytes proram memory on3chip&
1') data memory on chip&
0 reister banks
' multiple modes! 12 bit timer"counter
45tensive 6oolean processin capabilities&
2076 e5ternal 8AM si9e&
:' bi3directional I"/ lines&

:)45plain the operatin mode * o# )*+1 serial port?
In this mode serial data enters and e5ists throuh 8;$! <;$ outputs the shi#t clock& )3bits
are transmitted or received=)3data bits>(,6 #irst)& <he baud rate is #i5ed at 1"1' the oscillator
#requency&

0)45plain the operatin mode ' o# )*+1 serial port?
In this mode 11 bits are transmitted >throuh <;$) or received >throuh >8;$)= a start bit>*)!
) data bits> (,6 #irst)! a prorammable 1th data bit and a stop bit>1)&
/n transmit! the 1th data bit can be assined thevalue * or 1& /n receive! the1th data bit o
into the 86) in special #unction reister ,%/?! while the stop bit is inored& <he baud rate is
prorammable to either 1":' or 1"20 the oscillator #requency&

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+)45plain the mode : o# )*+1 serial port?
In this mode! 11 bits are transmitted >throuh <;$) or >received >throuh 8;$)= a start
bit>*)! ) data bits>(,6 #irst)! a prorammable 1th data bit and a stop bit>1)&It is same as mode
' e5cept the baud rate& <he baud rate in mode : is variable&

2)45plain the interrupts o# )*+1 micro controller?
45ternal interrupt * >I4*) @ .ihest priority
<imer interrupt * ><F*)
45ternal interrupt 1 >I41)
<imer interrupt 1 ><F1)
,erial port Interrupt
8eceive interrupt >8I) 3 lowest priority
<ransmit interrupt ><I)

A).ow many bytes o# internal 8AM and 8/M supported by )*+1 micro controller?
1') bytes o# internal 8AM and 0 bytes o# 8/M&

))$e#ine machine cycle o# )*+1?
)*+1 machine cycle consists o# 2 states! ,1 throuh ,A& /ne state is made up o# ' clock
pulses& <hus 1' clock period constitute one machine cycle& <wo clock periods in a state is
termed as phase 1 and phase '&

1) What are the special #unction o# port * o# )*+1?
Bort * is used as a multiple5ed low order address"data bus durin the e5ternal
memory access& When A(4 is enabled! the address on port * pins are latched and bus is ready
to act asa data bus when A(4 is low&

1*)What are the alternative #unction o# port : o# )*+1?
,erial data input >B:&*)! serial data output >B:&1)! e5ternal interrupt * >B:&')! e5ternal
interrupt 1 >B:&:)! e5ternal input #or timer *>B:&0)! e5ternal input #or timer 1 >B:&+)! e5ternal
memory write pulse >B:&2)! e5ternal memory read >B:&A) are the alternative #unctions o# port
:&

11)What are the use o# scratch pad area o# internal 8AM o# )*+1?
In internal 8AM )* bytes constitutes the scratch pad area& <he scratch pad bytes can be
prorammed as a eneral purpose reisters&

1')What are the #las supported by )*+1 controller?
%arry #la
Au5iliary carry #la
/ver #low #la

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Ceneral purpose user #la
8eister bank select bit one
8eister bank select bit 9ero
Barity #la

1:)What is meant by Bower3on3 8eset in )*+1 controller?
When 84,4< pin is activated! the )*+1 Dumps to address location ****.& <his is called as
Bower3on38eset& 8eset pin is considered as a si5th interrupt source o# )*+1&

10)What are the sini#icance o# ,F8s?
,F8s denotes ,pecial #unction 8eisters o#)*+1 controller& All the controller reisters
such as port latches! timer reister! peripheral control reister! accumulator! B% and
$B<8 all areavailable in ,F8 reion&

1+)What are the di##erent roup o# instructions supported by )*+1?
$ata <rans#er Croup
Arithmetic Croup
(oical Croup
6ranchin Croup
6it manipulation Croup

12)Write a proram to mask the *th and Ath bit usin )*+1?
M/E A!Fdata
A?( A!F)1
M/E $B<8!F0+**
M/E; G$B<8!A (//B= ,HMB (//B

1A) (ist the addressin modes o# )*+1?
$irect addressin
8eister addressin
8eister indirect addressin
Implicit addressin
Immediate addressin
Inde5 addressin
6it addressin

1))Write about %A(( statement in )*+1?
<here are two %A(( instructions& <hey are
(%A((>(on call)

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A%A((>Absolute call)

11) Write about the Dump statement?
<here are three #orms o# Dump& <hey are
(HMB >(on Dump) @ 12 bit address
AHMB>Absolute Dump) @ 11 bit address
,HMB >,hort Dump) @ relative address

'*)Write a proram to #ind the 'Is complement usin )*+1?
M/E A! 8*
%B( A I?% A

'1)Write a proram to swap two numbers usin )*+1?
M/E A!F data
,WAB A

'')Write a proram to subtract two numbers J e5chane the diits usin )*+1?
M/E A!F1F M/E 8*!F0*
,K66 A!8*
,WAB A

':)What are the di##erent types o# Address decodin <echniques?
Absolute decodin"Full decodin
(inear decodin"Bartial decodin

'0) %omparison between #ull address decodin and Bartial address decodin?

Full address decodin Bartial address decodin
1& All hiher address lines are decoded to
select the memory or I"/ device&
1& Few hiher address lines are decoded
to select the memory or I"/ device&

'& More hardware is required to desin
decodin loic&

'& .ardware required to desin decodin
loic is less and sometimes it can be
elimibated

:& .iher cost #or decodin circuit&

:& (ess cost #or decodin circuit&

0& ?o multiple addresses&

0& It has a disadvantae o# multiple
addresses& >,hadow addresses)

+& Ksed in lare systems&

+& Ksed in small systems&

'+& What is the sini#icance o# wait state enerator?

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<his is used to trans#er data between slower I"/ device and the microprocessor& In some
applns! the speed o# I"/ systems is not compatible with the microprocessorIs timins& ,o the
microprocessor has to con#irm whether the peripheral is ready or not& I# 84A$L pin is hih!
the peripheral is ready otherwise
)*)+ enters in to wait state&

'2& What is a ?on3maskable interrupt?
It is una##ected by any mask or interrupt enable& 4= <8AB

'A& What is a $ata pointer reister?
<he data pointer reister >$B<8) consists o# a hih byte>$B.) and a low byte >$B()
#unctions to hold 12 bit address& It may be manipulated as a 123bit data reister or as
independent )3bit reisters& It serves as a base reister in indirect Dumps! look up table
instructions and e5ternal data trans#er&

')) What are the operatin modes o# )'A1?
1& Input modes
,canned keyboard
,canned sensor matri5
,trobed input
'&$isplay modes
(e#t entry ><ype writer mode)
8iht entry >%alculator mode)
'1)What are the di##erent #unctional units in )'A1?
%BK inter#ace section
7eyboard section
$isplay section
,can section
:*)What are the priority modes in )'+1?
Fully nested mode
,pecial #ully nested mode c& 8otatin Briority mode
,pecial Masked mode e& Bolled mode

:1)What is IM8>Interrupt mask reister)?
IM8 stores the maskin bits o# the interrupt lines to be masked& <his reister can be
prorammed by an operation command word >/%W)&


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:')What is priority resolver?
It determines the priorities o# the bits set in the Interrupt request reister >I88)! bit
correspondin to the hihest priority interrupt input is set in the I,8 durin I?<A input&

::)What is the use o# I88?
<he interrupt request reister is used to store all the interrupt levels which are requestin the
service& <he eiht interrupt inputs sets correspondin bits o# the Interrupt 8equest 8eister
upon the service request&

:0)What is Interrupt service reister>I,8)?
<he interrupt service reister stores all the levels that are currently bein serviced&


:+) What is the di##erence between ,.($ and (.($?
,.($3 ,tore .( reister pair in memory&
<his instruction is used to store the contents o# . and ( reister directly in to memory&
(.($3 (oad .( reister pair #rom memory&
<his instruction copies the contents o# memory location iven with in the instruction in to the
( reister and the contents o# ne5t memory location in to the . reister&

:2)What is the di##erence between ,<A; and ($A;?
,<A; rp @ ,tore the contents o# Accumulator reister >A) in memory location whose
address is speci#ied by 6% or $4 reister pair&
($A; rp @ (oad Accumulator reister >A) with the contents o# memory location
whose address is speci#ied by6% or $4 reister pair&

:A)Write an assembly lanuae proram to trans#er data #rom memory block 61 to memory
block 6'?
MEI %!*A.M Initiali9e counter
(;I .! ''**.M Initiali9e source memory pointer
(;I $! ':**.M Initiali9e destination memory pointer
(oop= M/E A!MM Cet byte #rom source memory block
,<A; $M ,tore byte in the destination memory block
I?; .M Increment source memory pointer
I?; $M Increment destination memory pointer
$%8 %M $ecrement counter
H?N (oop M I# counter O * repeat
.(<

:))What are the types o# branchin instructions?
Hump instructions
%all and 8eturn instructions
8estart instructions

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:1)Write an assembly lanuae proram to add ' 6%$ numbers?
(;I .!''**.M Initiali9e pointer
M/E A!M M Cet the #irst number
I?; .M Increment the pointer
A$$ M M Add two numbers
$AA M %onvert .4; to valid
6%$ ,<A ':**M store the result
.(<

0*) 45plain the instruction (;I rp!data >12)?
(;I rp! data>12) @ (oad 12 @bit immediate data to speci#ied reister pair or stack pointer& <he
rp is 12 @ bit reister pairs such as 6%! $4! .( or stack pointer&

01)Write the di##erence between ($A and ,<A instruction?
($A @ (oad data in to Accumulator reister>A) directly #rom the address speci#ied
with in the instruction&
,<A @ ,tore the contents o# Accumulator reister>A) to the address speci#ied with in
the instruction&

0')What are the types o# rotate instructions?
8(% @ 8otate Accumulator (e#t
88%3 8otate Accumulator 8iht
8A( @ 8otate Accumulator (e#t throuh %arry
8A8 3 8otate Accumulator 8iht throuh %arry

0:)What are the operatin modes o# )'++?
6it set"8eset mode
I"/ modes
a)mode * = ,imple input"output
b)mode 1 = Input"output with handshake
c)mode ' = 6i3directional I"/ data trans#er

00)What are the priority modes in )'+1?
Fully nested mode
,pecial #ully nested mode
8otatin priority mode
,pecial mask mode
Boll mode

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0+) What is the use o# ,WAB #unction in )*+1?
,WAB A = ,wap nibbles with in the Accumulator bytes&
It interchanes the low and hih order nibbles o# the Accumulator >bits *3: and bits 03A)

02)What is ,%/??
,%/? is the serial port control reister ! which contains not only the mode selection bits
>,M* @ ,M' !84?)! but also the 1th data bit #or transmit and receive ><6) and 86)) and the
serial port interrupt bits ><I and 8I)&
,M* @ ,erial port mode control bit *
,M1 @ ,erial port mode control bit 1
,M' @ ,erial port mode control bit '
84? @ 8eceiver enable control bit
<6) @ <ransmit bit )
86) @ 8eceive bit )
<I @ <ransmit Interrupt #la
8I @ 8eceive interrupt #la

0A).ow we calculate the 6aud rate #or serial port in mode *?
6aud 8ate P /scillator #requency"1'

0))What is the sini#icance o# <;$ and 8;$ pins in )*+1?
<;$ @ <ransmit data pin #or serial port in KA8< mode& %lock output in shi#t reister mode&
8;$ @ 8eceive data pin #or serial port in KA8< mode& $ata I"/ pin in shi#t reister mode&

01)Write two e5amples o# 8eister indirect Addressin modes in )*+1?
M/E A!G8* M (oad thecontents pointed by 8* in A&
A$$ A!G81 M Add thecontents o# A and thecontents pointed by 81&

+*)What is Accumulator 8eister?
It is an ) @ bit reister& It holds a source operand and receives the result o# the arithmetic
instructions >Addition! ,ubtraction! Multiplication and $ivision)