Cache memory management

Cache basics
Cache is made up of SRAM cells.
SRAM has faster access but it is expensive.
L1 and L2 caches
Cache is generally in built on the same IC as
the processor. Since it is near to the CPU,
access time will be less.

Cache management techniques
Importance of cache memory.
Cache hit
Cache miss
AMAT- average memory access time


Types of cache miss
Capacity miss
Conflict miss
Compulsory miss
Cache management
Principle of locality
Spatial locality
Temporal locality
The memory wall
Write policies
Write back
Write through
Buffered write through
Block replacement

LRU replace the block which is not used
since long time
FIFO replace the block which has arrived
first
LFU replace the block which is rarely used
by the CPU
Random replace the blocks randomly


Cache mapping techniques
Direct mapped
Fully associative
Set-associative

Address fields in each case
Consider a cache of 128 blocks, each block with 16
words. Total cache = 2048 = 2K words. Main
memory is addressable by a 16 bit address and it
consists of 4096 = 4K blocks. How many bits are
there in each of tag, block (line), word (offset) fields
for different mapping techniques.