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LINE TRACKING ROBOT SYSTEM

Line Tracking Robot System | P Banerjee, S Ray, KK


Ghosh, S Chakraborty, S Sarkar
2/5/2009

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Line Tracking
DUMKAL
INSTITUTE
OF
ENGINEERIN LINE TRACKING ROBOT SYSTEM

Robot System
G AND
TECHNOLOG
Y

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ACKNOWLEDGEMENT

The satisfaction and elation that accompany the successful completion of any task
would be incomplete without the mention of the people who have made it
possible. It is my great privilege to express my gratitude and respect to all those
who have guided me and inspired me during the course of the project work.
Firstly, I express my sincere gratitude to our Principal Mr. Jayanta Roy, and also
thank our Director Mr. Dipendu Ghosh for providing us the necessary facilities for
the completion of the project.
I am indebted to our Head of the Department Mr. Hasanujjaman, for being a
constant source of support and encouragement for the completion of the project.
I also express my sincere thanks to our internal guide Mr Sahadev Roy for his
constant guidance and supervision during the entire period of the project.

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OBJECTIVE
To design a mobile vehicle which moves on a track path.
The vehicle will move through a dark line on a light background as it may lead to.

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INTRODUCTION
The idea is to build a robotic system which will move on a track path (basically on
a black coloured path on a white background). For an omnidirectional path, the
robot will use its own in-built intelligence to recognize the direction of the
aforesaid.
The system will consist of the following components primarily:
• Microcontroller
• IR sensor and detector pair
• Stepper motor
• Power source
We will use a panel of five IR sensors to detect any turning of the path. This panel
would be fixed to the system such that as it moves it will maintain a 90˚ angle
with the track, horizontally. As it moves the angle changes. The microcontroller
gets input from the sensors on the panel that the path has got a turn. The in system
programming will act such that it will guide the mechanical part to make itself and
adjust and compensate for the turn.

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THEORY
Modeling of the wheel

F= Force applied to the wheel


m= Mass of the wheel
µ= Co-efficient of friction
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g= Acceleration due to gravity


R= Reaction force between wheel and vehicle

Let F force be applied to the wheel due to which it moves to y position.


Acceleration of the wheel is ÿ.
Total force applied to the wheel is
F- µR
From the free body diagram we get,
F- µR=mÿ …(1)
Again,
mg=R
So equation (1) can be written as
F-µmg=mÿ
Or, F=mÿ+µmg
Or, F=m(ÿ+µg) …(2)

From equation (2) it is clear that driving force increases with the increase in
weight of the wheel.
The total weight of the vehicle is applied on the wheels. Hence, m indicates the
net weight of the wheels and the vehicle.
The total weight of the vehicle is distributed on the wheels provided the track is
smooth and not inclined.
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In this project, the vehicle has three wheels.


Let the total weight of the vehicle (excluding wheels) is M.
Let the weight of each wheel be mw . The vehicle consists of three wheels as
shown in the figure on the next page.

Hence the total weight is distributed upon two wheels, since the third one is just
for stability.
m=M/2+mw.
Rewriting equation (2) and substituting,
F=(M/2+mw)(ÿ+µg)
=(M/2+mw)µg+(M/2+mw)ÿ
=Fv+mÿ
Here, (M/2+mw)=m is fixed for a vehicle with fixed load.
µ is fixed for a given track.

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We assume that µ is average for all road conditions for simplicity of calculation.
So, F force is applied to bring an acceleration ÿ for which Fv is required to
overcome its initial state.
Figure below describes the force versus acceleration curve of mobile vehicle.

Kinematics of a wheel

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Kinematics of a wheel

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Coordinate Frame
In deriving the equations of motion of the robot, we assume that the wheel is a
rigid, homogeneous disk which rolls over a perfectly flat surface without slipping.
We model the actuation mechanism, suspended from the wheel bearing, as a two-
link manipulator, with a spinning disk attached at the end of the second link. The
first link of length L1 represents the vertical offset of the actuation mechanism
from the axis of the Gyrover wheel. The second link of length L2 represents the
horizontal offset of the spinning fly wheel and is relatively smaller compared to
the vertical offset.
Next, we assign four coordinate frames as follows:
1. The initial frame ∑O, whose x-y plane is anchored to the flat surface,
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2. The body coordinate frame ∑B {xB,yB,zB}, whose origin is located at the


centre of the single wheel, and whose z-axis represents the axis of rotation
of the wheel,
3. The coordinate frame of internal ,mechanism ∑C{xc,yc,zc}, whose centre is
located at point D and whose z-axis is always parallel to zB, and
4. The fly wheel coordinates frame ∑E{xa,ya,za}, whose centre is located at the
centre of the Gyrover fly wheel and whose z-axis represents the axis of
rotation of the fly wheel.
Note that ya is always parallel to yc.
We first derive the constraints of a single wheel and, then derive the dynamic
model of Gyrover based on these constraints. We define (i,j,k) and (l,m,n) to be
the unique vectors of the coordinate system XY ZO(∑O) and xByBzBA(∑B),
respectively. Let Sx=sin x and Cx=cos x. the transformation between these
coordinate frames is given by

Let vA and wB denote the velocity of the centre of mass of the single heel and
its angular velocity with respect to the inertia frame ∑O. Then we have,

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The constraints required that the disk rolls without slipping on the horizontal
plane, i.e. the velocity of the contact point on the disk is zero at any instant

Where vc is the velocity of contact point of the single wheel. Now we can
express vA as,

Where rac=-Rl representing the vector from the frame C to A. Substituting


above three equations gives,

The equations concerned with Ẋ and Ẏ are nonintegrable and hence are
nonholonomic while the last equation is integrable.

Therefore, the robot can be represented by seven (e.g. X,Y,α,β,γ,βa,θ), instead


of eight independent variables.

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Keeping the above in mind, our purpose will be solved using a differential
drive for our wheel base.

Differential drive

The differential drive design has two motors mounted in fixed positions on the
left and right side of the robot, independently driving one wheel each. Since
three ground contact points are necessary, this design requires one or two
additional passive caster wheels or sliders, depending on the location of the
driven wheels.
Differential drive is mechanically simpler than the single wheel drive,
because it does not require rotation of a driven axis. However, driving control
for differential drive is more complex than for single wheel drive, because it
requires the coordination of two driven wheels.
The minimal differential drive design with only a single passive wheel cannot
have the driving wheels in the middle of the robot, for stability reasons. So
when turning on the spot, the robot will rotate about the off-center midpoint
between the two driven wheels. The design with two passive wheels or sliders,
one each in the front and at the back of the robot, allows rotation about the
center of the robot. However, this design can introduce surface contact
problems, because it is using four contact points.
The figure demonstrates the driving actions of a differential drive robot. If
both motors run at the same speed, the robot drives straight forward or back-
ward, if one motor is running faster than the other, the robot drives in a curve
along the arc of a circle, and if both motors are run at the same speed in oppo-
site directions, the robot turns on the spot.

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Driving and rotation of differential drive

Velocity of left wheel=vL


Velocity of right wheel=vR

The following are expressions for different movements of the differential drive:
• Driving straight, forward: vL=vR, vL>0
• Driving in a right curve: vL>vR, e.g. vL=2vR
• Turning on the spot, counter clockwise: vL=-vR, vL>0
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For intelligence, we may use a microcontroller AT89S52 so that it may be


programmed such that the system moves according to the path. Though different
microcontrollers are available in the market, we choose Atmel AT89S52 for its
following features:
• Compatible with MCS® 51 products
• 8KB of in-system reprogrammable downloadable flash memory
• 2KB EEPROM (endurance: 100000 write/erase cycles)
• 4V-6V operating range
• Fully static operation: 0Hz-24MHz
• 3 level program memory lock
• 256 x 8-bit internal RAM
• 32 programmable I/O lines
• Three 16-bit timers/counters
• 9 interrupt sources
• Programmable UART serial channels
• SPI serial interface
• Low-power idle and power-down modes
• Interrupt recovery from power-down
• Programmable watchdog timer
• Dual data pointer
• Power-off flag

The AT89S52 is a low-power, high-performance CMOS 8-bit microcontroller


with 8K bytes of downloadable Flash programmable and erasable read-only
memory and 2K bytes of EEPROM. The device is manufactured using Atmel’s
high-density nonvolatile memory technology and is compatible with the industry
standard 80C51 instruction set and pinout. The on-chip downloadable Flash
allows the program memory to be reprogrammed In-System through an SPI serial
interface or by a conventional nonvolatile memory programmer. By combining a
versatile 8-bit CPU with downloadable Flash on a monolithic chip, the Atmel
AT89S52 is a powerful microcontroller, which provides a highly-flexible and
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cost-effective solution to many embedded control applications.


The AT89S52 provides the following standard features: 8K bytes of downloadable
Flash, 2K bytes of EEPROM, 256 bytes of RAM, 32 I/O lines, programmable
watchdog timer, two data pointers, three 16-bit timer/counters, a six-vector two-
level interrupt architecture, a full duplex serial port, on-chip oscillator, and clock
circuitry. In addition, the AT89S52 is designed with static logic for operation
down to zero frequency and supports two software selectable power saving
modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters,
serial port, and interrupt system to continue functioning. The Power-down mode
saves the RAM contents but freezes the oscillator, disabling all other chip
functions until the next external interrupt or hardware reset. The downloadable
Flash can be changed a single byte at a time and is accessible
through the SPI serial interface. Holding RESET active forces the SPI bus into a
serial programming interface and allows the program memory to be written to or
read from unless lock bits have been activated.
Its configuration, pin diagram, block diagram and details are provided as extracted
from the official data sheet of Atmel:

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Pin diagram of AT89S52

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Block Diagram

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PIN DESCRIPTION:
VCC Supply voltage.

GND Ground.

Port 0 Port 0 is an 8-bit open drain bi-directional I/O port. As


an
output port, each pin can
sink eight TTL inputs. When 1s are written to port 0
pins, the pins can be used as
high-
impedance inputs.
Port 0 can also be configured to be the multiplexed low-
order address/data bus during
accesses to external program and data memory. In this
mode, P0 has internal pull-ups.
Port 0 also receives the code bytes during Flash
programming and outputs the code
bytes during program verification. External pull-ups are
required during program
verification.

Port 1 Port 1 is an 8-bit bi-directional I/O port with internal


pull-ups. The Port 1 output buffers
can sink/source four TTL inputs. When 1s are written to
Port 1 pins, they are pulled high
by the internal pull-ups and can be used as inputs. As
inputs, Port 1 pins that are exter-
nally being pulled low will source current (IIL) because
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of the internal pull-ups.


Some Port 1 pins provide additional functions. P1.0 and
P1.1 can be configured to be
the timer/counter 2 external count input (P1.0/T2) and
the timer/counter 2 trigger input
(P1.1/T2EX), respectively.
Furthermore, P1.4, P1.5, P1.6, and P1.7 can be c
onfigured as the SPI slave port select,
data input/output and shift clock input/output pins as
shown in the following table.
Port 1 also receives the low-order address bytes during
Flash programming and
verification.

Port 2 Port 2 is an 8-bit bi-directional I/O port with internal


pull-ups. The Port 2 output buffers
can sink/source four TTL inputs. When 1s are written to
Port 2 pins, they are pulled high
by the internal pull-ups and can be used as inputs. As
inputs, Port 2 pins that are exter-
nally being pulled low will source current (IIL) because
of the internal pull-ups.
Port 2 emits the high-order address byte during fetches
from external program memory
and during accesses to external data memory that use 16-
bit addresses (MOVX @
DPTR). In this application, Port 2 uses strong internal
pull-ups when emitting 1s. During
accesses to external data memory that use 8-bit
addresses (MOVX @ RI), Port 2 emits
the contents of the P2 Special Function Register.
Port 2 also receives the high-order address bits and some
control signals during Flash
programming and verification.

Port 3 Port 3 is an 8-bit bi-directional I/O port with internal


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pull-ups. The Port 3 output buffers


can sink/source four TTL inputs. When 1s are written to
Port 3 pins, they are pulled high
by the internal pull-ups and can be used as inputs. As
inputs, Port 3 pins that are exter-
nally being pulled low will source current (IIL) because
of the pull-ups.
Port 3 receives some control signals for Flash
programming and verification.
Port 3 also serves the functions of various special
features of the AT89S8252, as shown
in the following table.

RST Reset input A high on this pin for two machine cycles while the
oscillator is running
resets the device.
ALE/PROG Address Latch Enable is an output pulse for latching the
low byte of the address during
accesses to external memory. This pin is also the
program pulse input (PROG) during
Flash programming.
In normal operation, ALE is emitted at a constant rate of
1/6 the oscillator frequency and
may be used for external timing or clocking purposes.
Note, however, that one ALE
pulse is skipped during each access to external data
memory.
If desired, ALE operation can be disabled by setting bit
0 of SFR location 8EH. With the
bit set, ALE is active only during a MOVX or MOVC
instruction. Otherwise, the pin is
weakly pulled high. Setting the ALE-disable bit has no
effect if the microcontroller is in
external execution mode.

PSEN Program Store Enable is the read strobe to external


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program memory.
When the AT89S8252 is executing code from external
program memory, PSEN is acti-
vated twice each machine cycle, except that two PSEN
activations are skipped during
each access to external data memory.

EA/VPP External Access Enable. EA must be strapped to GND in


order to enable the device to
fetch code from external program memory locations
starting at 0000H up to FFFFH.
Note, however, that if lock bit 1 is programmed, EA will
be internally latched on reset.
EA should be strapped to VCC for internal program
executions. This pin also receives the
12-volt programming enable voltage (VPP) during Flash
programming when 12-volt pro-
gramming is selected.

XTAL1 Input to the inverting oscillator amplifier and input to the


internal clock operating circuit

XTAL2 Output from the inverting oscillator amplifier.

Special Function
Registers A map of the on-chip memory area called the Special
Function Register (SFR) space is
shown in Table 1.
Note that not all of the addresses are occupied, and
unoccupied addresses may not be
implemented on the chip. Read accesses to these
addresses will in general return ran-
dom data, and write accesses will have an indeterminate
effect.
User software should not write 1s to these unlisted
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locations, since they may be used in


future products to invoke new features. In that case, the
reset or inactive values of the
new bits will always be 0.
Timer 2 Registers Control and status bits are contained
in registers T2CON (shown in
Table 2) and T2MOD (shown in Table 9) for Timer 2.
The register pair (RCAP2H,
RCAP2L) are the Capture/Reload registers for Timer 2
in 16-bit capture mode or 16-bit
auto-reload mode.

Data Memory –
EEPROM and RAM The AT89S8252 implements 2K bytes of on-chip
EEPROM for data storage and 256
bytes of RAM. The upper 128 bytes of RAM occupy a
parallel space to the Special
Function Registers. That means the upper 128 bytes
have the same addresses as the
SFR space but are physically separate from SFR space.
When an instruction accesses an internal location above
address 7FH, the address
mode used in the instruction specifies whether the CPU
accesses the upper 128 bytes
of RAM or the SFR space. Instructions that use direct
addressing access SFR space.
For example, the following direct addressing instruction
accesses the SFR at location
0A0H (which is P2).
MOV 0A0H, #data
Instructions that use indirect addressing access the upper
128 bytes of RAM. For exam-
ple, the following indirect addressing instruction, where
R0 contains 0A0H, accesses the

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data byte at address 0A0H, rather than P2 (whose


address is 0A0H).
MOV @R0, #data
Note that stack operations are examples of indirect
addressing, so the upper 128 bytes
of data RAM are available as stack space.
The on-chip EEPROM data memory is selected by
setting the EEMEN bit in the
WMCON register at SFR address location 96H. The
EEPROM address range is from
000H to 7FFH. The MOVX instructions are used to
access the EEPROM. To access off-
chip data memory with the MOVX instructions, the
EEMEN bit needs to be set to “0”.
The EEMWE bit in the WMCON register needs to be set
to “1” before any byte location
in the EEPROM can be written. User software should
reset EEMWE bit to “0” if no fur-
ther EEPROM write is required. EEPROM write cycles
in the serial programming mode
are self-timed and typically take 2.5 ms. The progress of
EEPROM write can be moni-
tored by reading the RDY/BSY bit (read-only) in SFR
WMCON. RDY/BSY = 0 means
programming is still in progress and RDY/BSY = 1
means EEPROM write cycle is com-
pleted and another write cycle can be initiated.
In addition, during EEPROM programming, an
attempted read from the EEPROM will
fetch the byte being written with the MSB
complemented. Once the write cycle is com-
pleted, true data are valid at all bit locations.

Programmable
Watchdog Timer The programmable Watchdog Timer (WDT) operates

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from an independent internal


oscillator. The prescaler bits, PS0, PS1 and PS2 in SFR
WMCON are used to set the
period of the Watchdog Timer from 16 ms to 2048 ms.
The available timer periods are
shown in the following table and the actual timer periods
(at VCC = 5V) are within ±30%
of the nominal.
The WDT is disabled by Power-on Reset and during
Power-down. It is enabled by set-
ting the WDTEN bit in SFR WMCON (address = 96H).
The WDT is reset by setting the
WDTRST bit in WMCON. When the WDT times out
without being reset or disabled, an
internal RST pulse is generated to reset the CPU.

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We use ULN2803A to drive the motor as required. Basically we use ULN2803A


to take advantage of its Darlington Arrays. Also its key features are:
• Output current upto 500mA
• Output voltage upto 50V
• Integral suppression diodes
• Output can be paralleled

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DESCRIPTION
The ULN2801A-ULN2805Aeach contain eight darlington transistors with
common emitters and integral suppression diodes for inductive loads. Each
darlington features a peak load current rating of600mA (500mA continuous) and
can withstand atleast50V in the off state.Outputsmay be paralleled
for higher current capability. Five versions are available to simplify interfacing to
standard logic families : theULN2801Ais designe for general purpose applications
with a current limitresistor ; theULN2802Ahas a 10.5kΩ input resistor and zener
for 14-25V PMOS; theULN2803Ahas a 2.7kΩ input resistor for 5V TTL and
CMOS ; the ULN2804A has a 10.5kΩ input resistor for 6-15V CMOS and the
ULN2805A is designed to sink a minimum of 350mA for standard and Schottky
TTL where higher output current is required. All types are supplied in a 18-lead
plastic DIP with a copper lead from and feature the convenient input-opposite-
output pinout to simplify board layout.

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For connecting the microcontroller with a computer in order to program it, we use
MAX232 dual driver/receivers. This is chosen for its features listed below:
• Meets or exceeds ITU recommendations v2.28
• Operates from a single 5V power supply with 1μF charge-pump capacitor
• Operates upto 120kbps
• Two drivers and two receivers
• ± 30V input levels
• Low supply current (8mA typical)

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The MAX232 is a dual driver/receiver that includes a capacitive voltage generator


to supply TIA/EIA-232-F voltage levels from a single 5-V supply. Each receiver
converts TIA/EIA-232-F inputs to 5-V TTL/CMOS levels. These receivers have a
typical threshold of 1.3 V, a typical hysteresis of 0.5 V, and can accept ±30-V
inputs. Each driver converts TTL/CMOS input levels into TIA/EIA-232-F levels.

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Logic diagram (positive logic):

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Circuit diagram

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Circuit diagram for connections on AT89S52 using crystal


oscillator 11.0592 MHz and C1 and C2 of 4.7pF each. RS232
cable connections are also shown. ULN2803A connections
would be drawn from pin 14-29.

As shown in the figure above, the Darlington pairs are coupled such that they
drive the two stepper motors.

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Apparatus required
• AT89S52 microcontroller 1 pc
• ULN2803A 1 pc
• MAX232 1 pc
• 10A BJT 4 pcs
• 7812 power supply 1 pc
• 12V, 200mA stepper motor 2 pcs
• Veroboard (6”x6”) 1 pc
• RS232 male female connector 1 pc
• IR sensor and detector pair 1 pc
• Potentiometer 1 pc
• Crystal oscillator (11.0592MHz) 1 pc
• Capacitor (4.7pF) 2 pcs
• Resistor (1.5kΩ) 4 pcs
• Transistor BC107 1 pc
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Programming

Program for motor speed


#include <reg51f.h> ;srf addresses
ORG 0 ;reset address
SJMP START ;Jump to start
ORG 03H ;external interrupt 0 address
SJMP CHECK ;jump to interrupt routine
ORG 40H ;program start address
START: MOV P1,#OCFH ;motor drives to zero
SETB ITO ;interrupt on negative edge
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MOV IENO,#81H ;external int INTO(negative


edge triggered) enabled
STAY: SJMP STAY ;stay here till int occurs
CHECK: JNB P1.0,REVERSE ;if selected goes to reverse
JNB P1.1,SPEED1 ;goes to speed 1 6:4
JNB P1.2,SPEED2 ;goes to speed 1 9:1
SJMP CHECK ;check switches again
SPEED1: ANL CCAMP2,#OFDH ;disable pwm drive on P1.5
CLR P1.5 ;put P1.5 to logic 0
ORL CCAPM1,#42H ;set ECOM1 and PWM1(P1.4)
MOV CCAP1L,#102 ;load 6:4 count
MOV CCAP1H,#102 ;6:4 current reload
ORL CCON,#40H ;set CR to turn PCA timer on
RETI ;return from interrept
SPEED2: ANL CCAPN2,#OFDH ;dissable PWM drive on P1.5
CLR P1.5 ;put P1.5 to logic 0
ORL CCAPM1,#42H ;set ECOM1 & PWM1(P1.4)
MOV CCAP1L,#26 ;load 9:1 count
MOV CCAP1H,#26 ;9:1 count reload
ORL CCON,#40H ;set CR to turn PCA timer on

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RETI ;return from interuupt


REVERSE: JNB P1.1,SPEED1R ;goto SPEED 1 reverse
JNB P1.2,SPEED2R ;goto SPEED 2 reverse
SJNP CHECK ;check input switches
SPEED1R: ANL CCAMP1,#OFDH ;disable PWM drive on P1.4
CLR P1.4 ;put P1.4 to logic 0
ORL CCAMP2,#42H ;set ECOM2 and PWM2(P1.5)
MOV CCAP2L,#102 ;load 6:4 count
MOV CCAP2H,#102 ;6:4 counter reload
ORL CCON,#40H ;set CR to turn PCA timer on
RETI ;return from interrupt
SPEED2R: ANL CCAMP1,#OFDH ;disable PWM drive on P1.4
CLR P1.4 ;put P1.4 to logic 0
ORL CCAMP2,#42H ;set ECOM2 and PWM2
MOV CCAP2L,#26 ;load 9:1 count
MOV CCAP2H,#26 ;9:1 count reload
ORL CCON,#40H ;set CR to turn PCA timer on
RETI ;return from interrupt
END ;end of assembly language

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Program 2

void initialize(void);
extern void set_location(unsigned char);
extern void lcd_display(void);
extern void put_msg(char * msg);

void init_val(void)
{
T2CON = 0x34;
RCAP2H = 0xff;
SCON = 0x50;
P0 = 0x00;
}
void main()
{
initialize();
init_val();
put_msg("SPEED =>");

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set_location(0x80);
lcd_display();
while(1);
}

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Observation
On the course of this project, we have used different types of integrated circuits
and came across many types of microcontrollers. While we attempted to choose
one, we came across the different aspects of these. Since, the choice of the
microprocessor was one of the main tasks, we went through different data sheets
of different manufacturers like ST Microelectronics, Philips, Atmel, Fairchild,
Motorola and NXP. Our project guide Mr Sahadev Roy helped us unconditionally
to resolve the challenge.
Though the project went well, we came across numerous difficulties for the first
time. We had to learn system programming with embedded C and connectivity of
the microprocessor with the PC.
We further observed that though our idea on robotics was that of a novice, there
are many more challenges beyond our project. We would be elated to deliver a
project on robot imaging, robotic intelligence and robotic reactions. We look
forward for co operations from masterminds.

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Discussion
While a small thought was being converted into reality, we got introduced to
world class authors like Karl Williams, Ming C Lin, R.R. Murphy and Stephan
Florczyk. There volumes inspired us to study further on Robotics and Embedded
Systems. Since Mechatronics played a very vital role in our project, we are keen
to work with projects related with it.
We realized that the completion of the project would have been smoother if the
thought was made earlier. We also observed the extensive research work related
and required to successfully complete a project on Robotics. Not only it includes
knowledge on Microprocessors and Embedded systems, it also requires a great
depth in Image processing and Aerodynamics and related fields as well.
We would have been luckier if we got the scope to research upon a few more
projects of the class.

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Bibliography
Books:
• George Pelz, Mechatronic Systems, John Wiley & Sons
• Thomas Braunl, Embedded Robotics, Springer
• Yans Heng Xu & Yongs Heng Ou, Control of Single
Wheel Robots, Springer
• Charles M. Bergren, Anatomy of a Robot, McGraw Hill

Websites:
• www.google.com
• www.yahoo.com
• www.ask.com
• www.8052.com
• www.myrobotics.com
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