Crystalfontz America, Inc.: Customer Model Cfah1602B-Tmc-Jp Approval By: Data

Crystalfontz America, Inc.
15611 East Washington Road

Valleyford, WA 99036
Phone: (509) 291-3514

Fax:
(509) 291-3345
http://www.crystalfontz.com
email: sales@crystalfontz.com

CUSTOMER
MODEL
CFAH1602B-TMC-JP
APPROVAL
SALES BY
BY:
APPROVED BY
DATA:
CHECKED BY

Valleyford, WA 99036-9747
Phone: (509) 291-3514
Fax: (509) 291-3345
e-mail: sales@crystalfontz.com
PREPARED BY

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Fax:
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4390398
1.Module Classification Information
2.Precautions in use of LCD Modules
3.General Specification
4.Absolute Maximum Ratings
5.Electrical Characteristics
6.Optical Characteristics
7.Interface Pin Function
8.Counter drawing
9.Backlight Information
10.Function Description
11.Character Generator ROM Pattern
12.Instruction Table
13.Timing Characteristics
14.Initializing of LCM
15.Quality Assurance
16.Reliability

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Fax:
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CFA H 1 6 0 2
c d
B TMC
f ghi
JP
c Brand: CRYSTALFONTZ AMERICA, INCORPORATED

d Display Type: H(Character Type, G(Graphic Type
e Displays logical dimensions: 16 columns by 02 lines
f Model serials no.
g Backlight Type:
N(Without backlight
h LCD Mode:
i LCD Polarizer Type,
Temperature range,
Viewing direction:
j Special Code:
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(
(LED, Yellow Green

(LED, Amber
(LED, Red
(LED, Orange
(LED, Green
M(STN Negative, Blue
F(FSTN Positive
T(FSTN Negative
H(Transflective, W.T,6:00
K(Transflective, W.T,12:00
C(Transmissive, N.T,6:00
F(Transmissive, N.T,12:00
I(Transmissive, W. T, 6:00
L(Transmissive, W.T,12:00
Y
A
R
O
G
B EL, Blue green

D EL, Green
W EL, White
F CCFL, White
T LED, White
B TN Positive, Gray
N TN Negative,
G STN Positive, Gray
Y STN Positive, Yellow Green
A Reflective, N.T, 6:00
D Reflective, N.T, 12:00
G Reflective, W. T, 6:00
J Reflective, W. T, 12:00
B Transflective, N.T,6:00
E Transflective, N.T.12:00
JP English and Japanese standard font

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(1) Avoid applying excessive shocks to the module or making any alterations or modifications to it.
(2) Dont make extra holes on the printed circuit board, modify its shape or change the components of
LCD module.
(3) Dont disassemble the LCM.
(4) Dont operate it above the absolute maximum rating.
(5) Dont drop, bend or twist LCM.
(6) Soldering:only to the I/O terminals.
(7) Storage:please storage in anti-static electricity container and clean environment.
*HQHUDO6SHFLILFDWLRQ
ITEM
Number of Characters:
Module dimension:
View area:
Active area:
Character size:
Character pitch:
LCD type:
Duty:
View direction:
Backlight:
STANDARD VALUE
UNIT
16 characters 2 Lines
36.013.5(MAX)mm
66.016.0mm
56.211.5mm
(L)2.95(W)5.55mm
(L)3.55(W)5.95mm
80.0
STN, Negative ,transmissive, Blue

1/16
6 oclock
LED White
mm
mm
mm
mm
mm

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$EVROXWH0D[LPXP5DWLQJV
ITEM
SYMBOL
MIN.
Operating Temperature
TOP
Storage Temperature
TST
-10
Input Voltage
VI
VSS
Supply Voltage For Logic
VDD-VSS
-0.3
Supply Voltage For LCD
VDD-V0
ILED
Supply current FOR LED B/L
TYP.
-0.3

MAX.
UNIT
+60
:
:
VDD
Vdd+0.3
25
mA
+50
(OHFWULFDO&KDUDFWHULVWLFV
ITEM
Supply Voltage For Logic
SYMBOL
CONDITION
MIN.
TYP.
MAX.
UNIT
VDD-VSS
4.5
5.5
4.5
Input High Vol
VIH
Input Low Vol
VIL
Output High Vol
VOH
Output Low Vol.
VOL
:
Ta=25:
Ta=50:

Supply Current
IDD
VDD=5V
Ta=0
Supply Voltage For LCD
VDD-V0

4.2
3.8
2.2

2.4

1.2

V
V
VDD
0.6
0.4
mA

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ITEM
SYMBAL CONDITION
(H)
3
CR
3

(V)
View Angle
Contrast Ratio
CR
CR
T rise
Response Time
T fall
6.1
MIN.
TYP.
MAX.
UNIT
10
105
deg
-30
30
deg
5
200
300
ms
200
300
ms
Definitions
View Angles
Contrast Ratio
Z
( Visual angle direction )
Brightness at selected state ( BS )

Brightness at non-selected state ( Bns )
Selected state
CR =
LCD
X
Brightness ( %)
Non-selected state
Bs
Bns
Operating voltage for LCD driving
( Best visual angle direction )
Response Time
Selected Condition
Nonselected Condition
90 %
100 %
Brightness
Nonselected Condition
10 %
tr
td

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Pin No.
Symbol
Level
Description
VSS
0V
VDD
5.0V
VO
RS
H/L
H:DATA, L:Instruction code
R/W
H/L
H:Read(MPU Module)L:Write(MPU Module)
DB0
H/L
Data bit 0
DB1
H/L
Data bit 1
DB2
H/L
Data bit 2
10
DB3
H/L
Data bit 3
11
DB4
H/L
Data bit 4
12
DB5
H/L
Data bit 5
13
DB6
H/L
Data bit 6
14
DB7
H/L
Data bit 7
15
16
Ground
Supply Voltage for logic
(Variable) Operating voltage for LCD
H,H L Chip enable signal

Power supply for LED backlight ( + )

Power supply for LED backlight ( - )

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80.0 0.5
71.2
66.0(VA)
56.21(AA)
P2.54*15=38.1
1.8
16- 1.0 PTH
The non-specified tolerance of dimension is
0.3mm.
H1Max
16
A
31.0
36.0 0.5
25.2
16.0(VA)
11.5(AA)
Vss
Vdd
Vo
RS
R/W
E
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
A/Vee
K
2.4
10.16 13.22
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
H2
(P2.54*4)
7.55
12.45
8.0
2.0
5.7
10.3
12.55
2.5
18.3
4.95
4- 1.0
40.55
2.5
1.6
4- 2.5 PTH
4- 5.0 PAD
75.0
LED H/L B/L

High
3.55
2.96
H1 13.2
0.59
H2 8.6
0.38
5.94
5.56
0.7
0.66
0.6
0.56
DOT SIZE
LED B/L Drive Method

1.Drive from A,K
VR
10K~20K
Controller/Com Driver
HD44780
or
Equivalent
16X2 LCD
A
K
B/L
2.Drive from pin15, pin16
Vdd
Vo
Vss
Vee
External contrast adjustment.
Bias and
Power Circuit
80 series
or
68 series
Com1~16
N.V.
Generator
MPU
RS
R/W
E
DB0~DB7
Seg1~40
Seg41~80
D
M
CL1
CL2
Vdd,Vss,V1~V5
PIN15
PIN16
Seg Driver
A
K
B/L
LCM
(Will never get Vee output from pin15)
3.Drive from Vdd,Vss
R
Optional
A
K
B/L
LCM
(Contrast performance may go down.)
Recommanded Value
VLED= 3.3V, ILED=25mA
Character located
DDRAM address
DDRAM address
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F

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9.1 Specification
PARAMETER
SYMBOL MIN
Supply Current
ILED
Supply Voltage
Reverse Voltage
VR
g

Luminous Intensity
IV
20
Wave Length
Life Time
Color
TYP
MAX
25
3.3

100000
UNIT
TEST CONDITION
mA
V=3.3V
3.6
CD/M2
ILED=25mA
nm
ILED=25mA
Hr.
V 3.6V
White

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10.Function Description
The LCD display Module is built in a LSI controller, the controller has two 8-bit registers, an instruction
register (IR) and a data register (DR).
The IR stores instruction codes, such as display clear and cursor shift, and address information for display data
RAM (DDRAM) and character generator (CGRAM). The IR can only be written from the MPU.
temporarily stores data to be written or read from DDRAM or CGRAM.
written into the IR, then data is stored into the DR from DDRAM or CGRAM.
The DR
When address information is

By the register selector (RS)
signal, these two registers can be selected.

RS
R/W
Operation
IR write as an internal operation (display clear, etc.)
Read busy flag (DB7) and address counter (DB0 to DB7)
Write data to DDRAM or CGRAM (DR to DDRAM or CGRAM)
Read data from DDRAM or CGRAM (DDRAM or CGRAM to DR)
Busy Flag (BF)

When the busy flag is 1, the controller LSI is in the internal operation mode, and the next instruction will not
be accepted.
When RS=0 and R/W=1, the busy flag is output to DB7. The next instruction must be written
after ensuring that the busy flag is 0.
Address Counter (AC)

The address counter (AC) assigns addresses to both DDRAM and CGRAM
Display Data RAM (DDRAM)

This DDRAM is used to store the display data represented in 8-bit character codes.
Its extended capacity is
80 8 bits or 80 characters. Below figure is the relationships between DDRAM addresses and positions on
the liquid crystal display.

High bits
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Low bits
Example:DDRAM addresses 4E
AC
(hexadecimal)
AC6 AC5 AC4 AC3 AC2 AC1 AC0
DDRAM Address
Display position DDRAM address
1
10
11
12
13
14
15
16
00
01
02
03
04
05
06
07
08
09
0A 0B
0C
0D
0E
0F
40
41
42
43
44
45
46
47
48
49
4A 4B
4C
4D
4E
4F
2-Line by 16-Character Display

Character Generator ROM (CGROM)
The CGROM generate 5
8 dot or 510 dot character patterns from 8-bit character codes. See Table 2.
Character Generator RAM (CGRAM)

In CGRAM, the user can rewrite character by program.
and for 5
For 5
10 dots, four character patterns can be written.
8 dots, eight character patterns can be written,
Write into DDRAM the character code at the addresses shown as the left column of table 1. To show the
character patterns stored in CGRAM.

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Relationship between CGRAM Addresses, Character Codes (DDRAM) and Character Patterns
(CGRAM Data)
Table 1.
F o r 5 * 8 d o t c h a ra c te r p a tte rn s
C h ara c te r C o d e s
( D D R A M d a ta )
7 6 5 4 3 2 1 0
H ig h
Low
0 0 0 0 * 0 0 0
0 0 0 0
0 0 0 0
* 0 0 1
* 1 1 1
C h ara c te r P a tte rn s
( C G R A M d a ta )
C G R A M A d d re ss
5 4 3 2 1 0
H ig h
Low
0 0
0 0
0 1
0 1
0 0 0 1 0
1 0
1 1
1 1
0 0
0 0
0 1
0 1
0 0 1 1 0
1 0
1 1
1 1
0 0
0 0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1 1 1 1
1
1
1
0
1
0
1
0
0
1
1
7 6 5 4 3 2 1 0
H ig h
* * *
* * *
* * *
* * *
* * *
* * *
* * *
* * *
* * *
* * *
* * *
* * *
* * *
* * *
* * *
* * *
* * *
Low
0
0 0 0
0 0 0
0
0
0
0 0
0
0
0
0 0
0
0
0 0
0 0 0
0 0
0
0
C h ara c ter
p a tte rn ( 1 )
0 0
0 0
C h ara c ter
p a tte rn ( 2 )
0 0
0 0
0 0
0 0
0 0 0 0 0
C u rso r p a tte rn
* * *
F o r 5 * 1 0 d o t c h a rac te r p a tte rn s
C h ara c te r C o d e s
( D D R A M d a ta )
7 6 5 4 3 2 1 0
H ig h
0 0 0 0
Low
* 0 0 0
C G R A M A d d re ss
5 4 3 2 1 0
H ig h
7 6 5 4 3 2 1 0
Low
0
0
0
0
0
0 0 0
0
0
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
0
1
1
0
0
1
1
0
0
1
H ig h
0
1
0
1
0
1
0
1
0
1
0
1 1 1 1
: " H ig h "
C h ara c te r P a tte rn s
( C G R A M d a ta )
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
Low
* 0 0 0 0 0
* 0 0 0 0 0
*
0
0
*
0 0
*
0 0 0
*
0 0 0
*
0
*
0 0 0 0
*
0 0 0 0
*
0 0 0 0
* 0 0 0 0 0
* * * * * * * *
C h ara c ter
p a tte rn

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Table.2
Upper
4 bit
Lower
4 bit
LLLL LLLH LLHL LLHH LHLL LHLH LHHL LHHH HLLL HLLH HLHL HLHH HHLL HHLH HHHL HHHH
LLLL
CG
RAM
(1)
LLLH
(2)
LLHL
(3)
LLHH
(4)
LHLL
(5)
LHLH
(6)
LHHL
(7)
LHHH
(8)
HLLL
(1)
HLLH
(2)
HLHL
(3)
HLHH
(4)
HHLL
(5)
HHLH
(6)
HHHL
(7)
HHHH
(8)

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Instruction Code
Instruction
Description
Execution time (fosc=270Khz)
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Clear Display
Write 00H to DDRAM

and set DDRAM address
1.53ms
to 00H from AC
Set DDRAM address to
Return Home
00H from AC and

return cursor to its
1.53ms
original position if
shifted. The contents of
DDRAM are not
changed.
Assign cursor moving
Entry Mode Set
I/D
SH direction and enable the
39
shift of entire display.

Set display (D), cursor
Display ON/OFF
Control
(C ), and blinking of
cursor (B) on/off control
39
bit.
Cursor or Display
Shift
S/C R/L

Set cursor moving and

display shift control bit,
and the direction, without
39
changing of DDRAM
data.
Set interface data length
Function Set
DL

(DL:8-bit/4-bit), numbers
of display line
(N:2-line/1-line)and,
display font type (F:5
11 dots/5
Set CGRAM
Address
Set DDRAM
Address
AC5 AC4 AC3 AC2 AC1 AC0
AC6 AC5 AC4 AC3 AC2 AC1 AC0
8 dots)
39
Set CGRAM address in

address counter.
Set DDRAM address in
address counter.
s
39s
39
Whether during internal
Read Busy Flag

and Address
operation or not can be
BF AC6 AC5 AC4 AC3 AC2 AC1 AC0 known by reading BF.
The contents of address

counter can also be read.
Write data into internal
Write Data to
RAM
Read Data from

RAM
D7
D6
D5
D4
D3
D2
D1
D0 RAM
43
(DDRAM/CGRAM).
Read data from internal
D7
D6
D5
D4
D3
D2
D1
D0 RAM
(DDRAM/CGRAM).
43
dont care

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13.1
Write Operation
VIH1
RS
VIH1
VIL1
VIL1
tAS
R/W
tAH
VIL1
VIL1
PW
VIH1
AH
VIH1
VIL1
t
tEf
EH
VIL1
Er
VIL1
tH
DSW
VIH1
DB0 to DB7
VIL1
VIH1
Valid data
VIL1
tcycE
Item
Symbol
Min
tcycE
500
Enable pulse width (high level)
PWEH
230
Enable rise/fall time
tEr,tEf
Address set-up time (RS, R/W to E)
tAS
40
Address hold time
tAH
10
Data set-up time
tDSW
80
tH
10
Enable cycle time
Data hold time
Typ
Max

ns
20
ns

Unit
ns
ns
ns
ns
ns

13.2
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Read Operation
V IH1
RS
V IH1
V IL1
V IL1
tA S
tAH
V IH1
R /W
V IH1
PW EH
E
tAH
tEf
V IH1
V IH1
V IL1
V IL1
tEr
V IL1
t D HR
t D DR
V OH 1
D B 0 to D B 7
V OL 1*
V alid data
V OH 1
*VO L1
t cycE
N O T E: *V O L 1 is assum ed to be 0.8V at 2 M H Z operation.
ITEM
Symbol
Min
tcycE
500
Enable pulse width (high level)
PWEH
230
Enable rise/fall time
tEr,tEf
Address set-up time (RS, R/W to E)
tAS
40
Address hold time
tAH
10
Data delay time
tDDR
Data hold time
tDHR
Enable cycle time
Typ
Max

ns
20
ns

Unit
ns
ns
ns
160
ns
ns

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Power on
Wait for more than 15 ms after V CC rises to 4.5 V
BF can not be checked before this instruction.
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Function set ( Interface is 8 bits long. )
0
0
0
0
1
1
*
*
*
*
Wait for more than 4.1 ms
0
0
1
*
*
*
*
0
0
1
Wait for more than 100 s
0
0
1
0
0
1
*
*
*
*
BF can be checked after the following instructions.

When BF is not checked , the waiting time between
instructions is longer than execution instruction time.
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0

0
0
1
N
F
*
*
0
0
1
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
1 I/D S
Initialization ends
8-Bit Ineterface
Function set ( Interface is 8 bits long. Specify

the number of display lines and font. )
The number of display lines and character font
can not be changed after this point.
Display off
Display clear
Entry mode set

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Power on
Wait for more than 15 ms after V CC rises to 4.5 V
RS R/W DB7 DB6 DB5 DB4

0
0
0
0
1
1
Function set ( Interface is 8 bits long. )
Wait for more than 4.1 ms

0
0
0
0
1
1
Wait for more than 100 s

0
0
0
1
1
0

0
0
1
0
0
0
0
0
0
0
1
0
0
0
N
F
*
*
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
I/D S
Initialization ends
4-Bit Ineterface
BF can be checked after the following instructions.

When BF is not checked , the waiting time between
instructions is longer than execution instruction time.
Function set ( Set interface to be 4 bits long. )
Interface is 8 bits in length.
Function set ( Interface is 4 bits long. Specify
the number of display lines and character font. )
The number of display lines and character font
can not be changed after this point.
Display off
Display clear
Entry mode set

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Screen Cosmetic Criteria

No. Defect
Judgement Criterion
Partition
A)Clear
Size:d mm
0.1
0.1<d 0.2
0.2<d 0.3
d
Acceptable Qty in active area

Disregard
6
2
0.3<d
1
Spots
Note:Including pin holes and defective dots which must be within one pixel size.
Minor
B)Unclear
Size:d mm
0.2
0.2<d 0.5
0.5<d 0.7
d

Disregard
6
2
0.7<d
Size:d mm
0.3
0.3<d 1.0
1.0<d 1.5
d
Bubbles in Polarizer
1.5<d
0
Disregard
3
Minor
1
0
In accordance with spots cosmetic criteria. When the light reflects on the panel
Scratch
Allowable Density Above defects should be separated more than 30mm each other.
Coloration
surface, the scratches are not to be remarkable.
Minor
Minor
Not to be noticeable coloration in the viewing area of the LCD panels.

Minor
Back-light type should be judged with back-light on state only.

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Content of Reliability Test

Environmental Test
No. Test Item
Content of Test
:
:
60
Endurance test applying the high
storage temperature for a long time. 200hrs
-10
storage temperature for a long time. 200hrs
Endurance test applying the electric
50
High Temperature stress (Voltage & Current) and the
Operation
200hrs
thermal stress to the element for a
long time.
0
Low Temperature
stress under low temperature for a
Operation
200hrs
long time.
60 ,90%RH
High Temperature/
temperature and high humidity
Humidity Storage
96hrs
storage for a long time.
50 ,90%RH
High Temperature/ stress (Voltage & Current) and
Humidity Operation temperature / humidity stress to the 96hrs
element for a long time.
Endurance test applying the low and
high temperature cycle.
-10
25
60
-10 /60
Temperature Cycle
10 cycles
30min
5min
30min
1 cycle
Mechanical Test
10~22Hz 1.5mmp-p
Endurance test applying the vibration
22~500Hz 1.5G
Vibration test
during transportation and using.
Total 0.5hrs
Constructional and mechanical
50G Half sign
Shock test
endurance test applying the shock
wave 11 msedc
during transportation.
3 times of each direction
Endurance test applying the
Atmospheric
115mbar
atmospheric pressure during
pressure test
40hrs
transportation by air.
Others
VS=800V,RS=1.5k
Static electricity test
CS=100pF
stress to the terminal.
1 time
High Temperature
storage
Low Temperature
2
storage
1
10
Applicable
Standard
Test Condition
: :
(
(
11
***Supply voltage for logic system=5V. Supply voltage for LCD system =Operating voltage at 25

Crystalfontz America, Inc.: Customer Model Cfah1602B-Tmc-Jp Approval By: Data

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Crystalfontz America, Inc.: Customer Model Cfah1602B-Tmc-Jp Approval By: Data

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Crystalfontz America, Inc.

15611 East Washington Road

Phone: (509) 291-3514