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Lect06 Mos
Lect06 Mos
CMPE 640
Static Behavior
An nMOS transistor cross-section:
gate-oxide
VGS = 0, VDS = 0
n+
G
Poly
D
n+
Field oxide
(SiO2)
p-substrate
p+ field
implant
Under zero bias, two back-to-back pn-junctions create a very high resistive path between
source and drain.
Appling a positive bias (VGS) to the gate (w.r.t. the source), creates a depletion region
under the gate (repells mobile holes).
The depletion region is similar to the one occurring in a pn-junction.
1
CMPE 640
Static Behavior
Inversion
VGS > 0, VDS = 0
-
n+
VGS
G
Poly
D
n+
n+
inversion layer
Field oxide
(SiO2)
depletion region
2 si
------------qN A
Width
Qd =
2N A si
Space charge
CMPE 640
Static Behavior
Inversion
At a critical value of VGS, the substrate inverts to n-type material.
This is called strong inversion and occurs at a voltage that is twice the Fermi Potential:
F = 0.3V for typical p-type silicon substrates.
Further increases in VGS do not increase the depletion layer width.
The charge is offset with additional inversion-layer electrons (sourced from the
heavily doped n+ source region).
The conductivity of the n-channel is modulated by VGS.
Under strong inversion, the charge in the depletion region is fixed and equals:
Q B0 =
2qN A si 2 F
CMPE 640
Static Behavior
Inversion
A substrate bias voltage, VSB, increases the surface potential needed to create strong
inversion to:
2 F + V SB
VSB is normally positive for n-channel devices.
This changes the charge in the depletion region:
QB =
2qN A si 2 F + V SB
The value of VGS where strong inversion occurs is threshold voltage, VT.
VT depends on several components, many are material constants:
difference in work function between gate and substrate material.
oxide thickness
Fermi voltage
charge associated with impurities trapped at oxide-channel interface
concentration of implanted ions
4
CMPE 640
Static Behavior
VT also depends substrate voltage, VSB.
Rather than depend on the complete analytical form (which often is not a good predictor of
VT), an empirical parameter is used, VT0.
VT0 is the threshold voltage with VSB = 0.
V T = V T0 + (
2 F + V SB
2q si N A
= ------------------------C ox
2 F )
= 0.54
2 F = 0.64 V
2 ( 0.6 ) + 5V
VSB = 5V
2 ( 0.6 ) ) = 1.6V!
5
CMPE 640
Static Behavior
Current-Voltage Relations
VGS > VT, VDS > 0
-
S
n+
VGS
ID
G
Poly
-V(x)+
n+
n+
Field oxide
(SiO2)
L
X
Linear Region
At a point x along the channel, the voltage is V(x).
The gate-to-channel voltage at that point equals VGS -V(x).
CMPE 640
Static Behavior
Linear region
Assume that this voltage exceeds the threshold everywhere along the channel.
The induced channel charge per unit area at point x is:
Q i ( x ) = C ox [ V GS V ( x ) V T ]
The gate capacitance per unit area, Cox, is expressed as:
ox
C ox = ------t ox
ox = 3.97 0 = 3.5 10
13
F/cm
CMPE 640
Static Behavior
Linear region
Current is given as the product of the drift velocity of the carriers and the available
charge:
I D = n ( x )Q i ( x )W
n = drift velocity
W = width of channel
The electron velocity, , is related to the electric field through a parameter called the
mobility ():
dV
n = n E ( x ) = n ------dx
Combining the equations:
I D dx = n C ox W ( V GS V V T )dV
CMPE 640
Static Behavior
Linear region
Integrating this equation over the length of the channel yields the current-voltage relationship of a nMOS transistor.
2
ID
V DS
W
---= k n ( V GS V T )V DS ---------L
2
W
k n = k n ----L
k n = n C ox
(1)
(gain factor)
n ox
= -------------t ox
CMPE 640
Static Behavior
Saturation
When VDS is further increased, the channel voltage all along the channel may cease to
be larger than the threshold, e.g.,
V GS V ( x ) < V T
At that point, the induced charge is zero and the channel disappears or is pinched off.
VGS > 0, VDS > 0
-
S
n+
VGS
ID
G
Poly
D
n+
n+
VGS-VT
Field oxide
(SiO2)
L
X
10
CMPE 640
Static Behavior
Current-Voltage Relation: Saturation
The voltage difference over the induced channel remains fixed at VGS - VT and the
current remains constant (or saturates).
Replacing VDS with VGS - VT in equation (1) (since this equation was derived over the
channel) yields:
kn W
I D = ------- ----- ( V GS V T ) 2
2 L
(2)
This equation is not entirely correct, since the channel length changes as a function of
VDS.
Current increases as channel length (L) decreases, according to equation (2).
A more accurate expression for current in saturation is:
ID
kn W
-----= - ----- ( V GS V T ) 2 ( 1 + V DS )
2 L
: empirical parameter
called channel-length modulation
11
CMPE 640
Static Behavior
Current-Voltage curves
VGS = 5V
Vds = Vgs - Vt
2
ID (mA)
VGS = 4V
1
VGS = 3V
Square
dependence
VGS = 2V
VGS = 1V
1.0
2.0
3.0
Vds (V)
4.0
5.0
12
CMPE 640
Static Behavior
Current-Voltage Relation
Triode region: The transistor behaves like a voltage-controlled resistor.
Saturation region: It behaves like a voltage-controlled current source (ignoring channel-length modulation effects).
0.020
ID
Linear relationship
for values:
V GS > > V T
0.010
Sub-threshold
operation
VT
1.0
VGS (V)
2.0
3.0
CMPE 640
Static Behavior
Manual Analysis Model
V DS > V GS V T
G
kn W
I D = ------- ----- ( V GS V T ) 2 ( 1 + V DS )
2 L
D
ID
V DS < V GS V T
S
ID
V DS
W
-----------= k n ( V GS V T )V DS
2
L
with
V T = V T0 + (
2 F + V SB
2 F )
14