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Pengawasandi Alamat
sudjadi
accessing memory
(read and write)
PARALEL
Berapa line?
Terlalu banyak pin
Memory write
Memory read
memori
CS
memori
CS
Decoding address
data bus
Read data
Write Data
memori 1
read
write
MPU
memori 2
address
decoding
address bus
Memory read/write
MEMORY READ
MEMORY WRITE
ADDRESS BUS
address valid
CS
READ
WRITE
DATA BUS
address valid
Memory mapping
m00
m00
m10
m10
m20
m20
m150
m150
Y0
A0
MPU
Y1
decoder/
demux/
BIN to DEC
4 ke 16
A1
A2
Y2
A3
tabel kebenaran
decoder
A3 A2 A1 A0 '0'
0
0
0
0
0
0
0
0
0
0
1
1
0
1
0
1
Y0
Y1
Y2
Y3
Y15
Y15
memori
peta alamat
memory
Organisasi memory/IO
1x8
4x4
1024x1
A0
A0
A1
A1
cs
cs
8 bit Data
4 bit Data
A0
A1
4x8
A9
cs
cs
8 bit Data
1 bit Data
Organisasi memory
8Kx8
1K=1024
1Kbit=1024bit
1Kbyte=1024x8 bit
A0
A1
A12
cs
8 bit Data
Memory 4x8
m00
m01
m02
m03
A0
A1
m00
m01
m02
m03
3
4
Y0
5
6
A2
MPU
decoder
2 ke 4
A3
Y1
Y2
8
9
A
memori 2
tabel kebenaran
decoder
A3 A2 '0'
Selektor
Alamat
Y0
0-3
Y1
4-7
Y2
8-B
Y3
C-F
0
0
1
1
0
1
0
1
Y0
Y1
Y2
Y3
Y3
m20
m21
m22
m23
memori
B
m20
m21
m22
m23
peta alamat
memory
Memory 0
Memory 1
Y0=A3.A2
A3
Y1=A3.A2
Y0=A3.A2
Y0=A3.A2
Selektor
Alamat
Y0
0-3
Y1
4-7
Y2
8-B
Y3
C-F
A2
m00
m01
m02
m03
MPU
A3
memori 2
m20
m21
m22
m23
memori
m00
m01
m02
m03
m20
m21
m22
m23
m10
m11
m12
m13
m20
m21
m22
m23
peta alamat
memory
A3
MPU
m00
m00
m01
m02
m03
m01
m02
m03
m00
m01
m02
m03
m20
m21
m22
m23
m20
m21
m22
m23
A2
memori 2
m20
m21
m22
m23
memori
peta
alamat
memory
Address Conflict
CONFLICT
memori 1
A0
A1
A2
MPU
memori 2
A3
m00
m01
m02
m03
1
2
3
m00
m01
m02
m03
m20
m21
m22
m23
m20
m21
m22
m23
memori
E
F
peta alamat
memory
1 Paragraph
256
0100
0101
1 Halaman
1024
0400
0401
1 Segment
65535
FFFE
FFFF
Y2
Y3
8K
0000
0000-1FFF
2000
2000-3FFF
4000
4000-5FFF
6000
6000-7FFF
Y4
8000
8000-9FFF
A13
A14
A15
Y5
A000
A000-BFFF
decoder
34TO
ke 88
Y6
C000
C000-DFFF
E000
Y7
E000-FFFF
FFFF
64K
000
O0
001
O1
010
O2
011
O3
100
O4
101
O5
110
O6
111
O7
74138
Penempatan chip
ROM
RAM
I/O
ROM
MEMORY SPACE
FFFF
8Kx8
8Kx8
Alamat
bayangan
9000-9FFF
16Kx8
8000-8FFF
ruang>kapasitas
4Kx8
Space kosong
bisa ditempati chip lain
4000-5FFF
ruang<kapasitas
2000-3FFF
Ideal, ruang=kapasitas
0000-1FFF
0000
64K
Blok diagram
A0
A0
Y2
A12
8Kx8
A0
A12
A12
Y0
A0
8Kx8
A12
A13
16Kx8
Y1
4Kx8
A13
A0
Y4
A15
A11
Wiring diagram
R
Address bus
A0
A0
R
D0
Data bus
ROM
8Kx8
A12
uP
A12
D0
D7
Y4
cs
A13
A15
D7
D0
A0
A13
RAM
4Kx8
Decoder
3 to 8
74138
A15
A11
Y3
cs
D7
Y7
FFFF
F000
4K
A0
A000
9000
uP
8000
7000
4K
4K
4K
4K
DUPLICATE
A12
A13
A14
A15
Decoder
3 to 8
74138
Y0
2000
1000
4K
4K
4K
0000
data
program
80xxx
memory
I/O
Z80
Wiring diagram