BAB19 - Engineering Applications

Chapter 19
Engineering Applications
his chapter is devoted to engineering applications using appropriate Simulink blocks to

illustrate the application of the blocks in the libraries which we described in Chapters 2
through 18. Most of these applications may be considered components or subsystems of
large systems such as the demos provided by Simulink. Some of these applications describe some
of the new blocks added to the latest Simulink revision.
19.1 AnalogtoDigital Conversion

One of the recently added Simulink blocks is the Idealized ADC Quantizer. Figure 19.1 shows
how this block can be used to discretize a continuoustime signal such as a clock. The Function
Block Parameters dialog box provides a detailed description for this block.
Figure 19.1. Model for AnalogtoDigital conversion
The settings specified for the Idealized ADC Quantizer are noted in Figure 19.1. The output data
types for the Clock and the Idealized ADC Quantizer blocks are specified as double. The input
and output waveforms are shown in Figure 19.2.
Figure 19.2. Input and output waveforms for the model of Figure 19.1
Introduction to Simulink with Engineering Applications

Copyright Orchard Publications
191
Chapter 19 Engineering Applications

19.2 The ZeroOrder Hold and FirstOrder Hold as Reconstructors
Suppose that a continuoustime signal x ( t ) is bandlimited with bandwidth B , and its Fourier
transform X ( ) is zero for > B . The Sampling Theorem states that if the sampling frequency
S is equal or greater than 2B , the signal x ( t ) can be recover entirely from the sampled signal
x S ( t ) by applying x S ( t ) to an ideal lowpass filter with bandwidth B . Another method for recovering the continuoustime signal x ( t ) from the sampled signal x S ( t ) is to use a holding circuit that
holds the value of the sampled signal at time nT until it receives the next value at time nT + T . A
ZeroOrder Hold circuit behaves like a low-pass filter and thus can be used as a holding circuit to
recover the continuoustime signal x ( t ) from the sampled signal x S ( t ) .
The model of Figure 19.3 shows the output of a ZeroOrder Hold block specified at a low sampling frequency, and Figure 19.4 shows the input and output waveforms.
Figure 19.3. Model producing a piecewise constant waveform when the sampling frequency is low
Whereas the ZeroOrder Hold circuit generates a continuous input signal u ( t ) by holding each
sample value u [ k ] constant over one sample period, a FirstOrder Hold circuit uses linear interpolation between samples as shown by the model of Figure 19.5 and the waveforms in Figure 19.6.
192

The ZeroOrder Hold and FirstOrder Hold as Reconstructors
Figure 19.5. The model of Figure 19.2 with a FirstOrder Hold block
A comparison of the outputs produced by a Zero-Order Hold block and a First-Order Hold block
with the same input, is shown in the model of Figure 19.7. The outputs are shown in Figure 19.8.
Figure 19.7. Model for comparison of a Zero-Order Hold and a First-Order Hold blocks with same input

193
Figure 19.8. Waveforms for the model of Figure 19.7
19.3 Digital Filter Realization Forms

A given transfer function H ( z ) of a digital filter can be realized in several forms, the most common being the Direct Form I, Direct Form II, Cascade (Series), and Parallel. These are
described in Subsections 19.3.1 through 19.3.4 below. Similar demo models can be displayed as
indicated in these subsections.
19.3.1 The Direct Form I Realization of a Digital Filter

The Direct Form I Realization of a secondorder digital filter is shown in Figure 19.9.
b2
b1
x[ n]
a2
a1
y[n]
a0
Figure 19.9. Direct Form I Realization of a secondorder digital filter
At the summing junction of Figure 19.9 we obtain

1
a 0 X ( z ) + a 1 z X ( z ) + a 2 z X ( z ) + ( b 1 )z Y ( z ) + ( b 2 )z Y ( z ) = Y ( z )
194

Digital Filter Realization Forms

1
X ( z ) ( a0 + a1 z + a2 z ) = Y ( z ) ( 1 + b1 z + b2 z )
and thus the transfer function of the Direct Form I Realization of the secondorder digital filter of
Figure 19.9 is
1
a0 + a1 z + a2 z
( z )- = -------------------------------------------------H(z) = Y
1
2
X(z)
1 + b1 z + b2 z
(19.1)
A disadvantage of a Direct Form I Realization digital filter is that it requires 2k registers where k
represents the order of the filter. We observe that the secondorder ( k = 2 ) digital filter of Figure
11.9 requires 4 delay (register) elements denoted as z 1 . However, this form of realization has the
advantage that there is no possibility of internal filter overflow.*
19.3.2 The Direct Form II Realization of a Digital Filter

Figure 19.10 shows the Direct Form-II Realization of a secondorder digital filter. The Simulink Transfer Fcn Direct Form II block implements the transfer function of this filter.
x[n]
b0
a1
y[n]
b1
z
b2
a2
Figure 19.10. Direct Form-II Realization of a second-order digital filter
The transfer function for the Direct FormII secondorder digital filter of Figure 19.10 is the same
as for a Direct FormI secondorder digital filter of Figure 19.9, that is,
1
a0 + a1 z + a2 z
H ( z ) = ---------------------------------------1
2
1 + b1 z + b2 z
(19.2)
A comparison of Figures 19.9 and 19.10 shows that whereas a Direct FormI secondorder digital
filter is requires 2k registers, where k represents the order of the filter, a Direct FormII second
order digital filter requires only k register elements denoted as z 1 . This is because the register
* For a detailed discussion on overflow conditions please refer to Digital Circuit Analysis and Design with an
Introduction to CPLDs and FPGAs, ISBN 0-9744239-6-3, Section 10.5, Chapter 10, Page 106.
The Direct Form-II is also known as the Canonical Form.

195

( z 1 ) elements in a Direct FormII realization are shared between the zero section and the pole
section.
Example 19.1
Figure 19.11 shows a Direct FormII secondorder digital filter whose transfer function is
1
1 + 1.5z + 1.02z
H ( z ) = -------------------------------------------------1
2
1 0.25z + 0.75z
(19.3)
The input and output waveforms are shown in Figure 19.12.
Figure 19.11. Model for Example 19.1
196


A demo model using fixedpoint Simulink blocks can be displayed by typing
fxpdemo_direct_form2
in MATLABs Command Window. This demo is an implementation of the thirdorder transfer

function
1
1 + 2.2z + 1.85z + 0.5z H ( z ) = -------------------------------------------------------------------1

2
3
1 0.5 z + 0.84z + 0.09z
19.3.3 The Series Form Realization of a Digital Filter

For the Series* Form Realization, the transfer function is expressed as a product of firstorder and
second-order transfer functions as shown in relation (19.4) below.
H ( z ) = H 1 ( z ) H 2 ( ( z )H R ( z ) )
(19.4)
Relation (19.4) is implemented as the cascaded blocks shown in Figure 19.13.

H1 ( z )
X(z)
HR ( z )
H2 ( z )
Y(z)
Figure 19.13. Series Form Realization
Figure 19.14 shows the SeriesForm Realization of a secondorder digital filter.
a1
x[n]
a2
y[n]
b1
b2
Figure 19.14. Series Form Realization of a second-order digital filter
The transfer function for the Series Form secondorder digital filter of Figure 19.14 is
1
1 + a1 z + a2 z
H ( z ) = --------------------------------------1
2
1 + b1 z + b 2 z
(19.5)
* The Series Form Realization is also known as the Cascade Form Realization

197

Example 19.2
The transfer function of the Series Form Realization of a certain secondorder digital filter is
2
0.5 ( 1 0.36 z ) H ( z ) = -------------------------------------------1

2
1 + 0.1z 0.72 z
To implement this filter, we factor the numerator and denominator polynomials as

1
0.5 ( 1 + 0.6z ) ( 1 0.6z ) *

H ( z ) = ---------------------------------------------------------------1
1
( 1 + 0.9z ) ( 1 0.8z )
(19.6)
The model is shown in Figure 19.15, and the input and output waveforms are shown in Figure
19.16.
* The combination of the of factors in parentheses is immaterial. For instance, we can group the factors as
1
(----------------------------1 + 0.6z )
1
( 1 + 0.9z )
198
1
1
1
1 0.6z )( 1 + 0.6z )
( 1 0.6z )
--------------------------------------------------------and (---------------------------or
as
and
1
1
1
( 1 0.8z )
( 1 0.8z )
( 1 + 0.9z )

A demo model using fixed-point Simulink blocks can be displayed by typing

fxpdemo_series_cascade_form

function
1
( 1 + 0.5z ) ( 1 + 1.7z + z )
H ( z ) = --------------------------------------------------------------------------1
1
2
( 1 + 0.1z ) ( 1 0.6 z + 0.9z )
19.3.4 The Parallel Form Realization of a Digital Filter

The general form of the transfer function of a Parallel Form Realization is
H ( z ) = K + H1 ( z ) + H2 ( z ) + + HR ( z )
(19.7)
Relation (19.7) is implemented as the parallel blocks shown in Figure 19.17.

199

K
H1 ( z )
X(z)
H2 ( z )
Y(z)
HR ( z )
Figure 19.17. Parallel Form Realization
As with the Series Form Realization, the ordering of the individual filters in Figure 19.17 is immaterial. But because of the presence of the constant K , we can simplify the transfer function
expression by performing partial fraction expansion after we express the transfer function in the
form H ( z ) z .
Figure 19.18 shows the Parallel Form Realization of a secondorder digital filter. The transfer
function for the Parallel Form secondorder digital filter of Figure 19.18 is
2
a1 + a2 z
H ( z ) = --------------------------------------1
2
1 + b1 z + b2 z
(19.8)
a1
a2
x[n]
y[n]
b1
b2
Figure 19.18. Parallel Form Realization of a second-order digital filter
1910


Example 19.3
The transfer function of the Parallel Form Realization of a certain secondorder digital filter is
2
0.5 ( 1 0.36 z )
H ( z ) = -------------------------------------------1
2
1 + 0.1z 0.72 z
To implement this filter, we first express the transfer function as

H(z)
0.5 ( z + 0.6 ) ( z 0.6 )
------------ = -------------------------------------------------z
z ( z + 0.9 ) ( z 0.8 )
Next, we perform partial fraction expansion.

r
r2
r3
0.5 ( z + 0.6 ) ( z 0.6 )
-------------------------------------------------- = ----1 + -------------------- + -------------------z ( z + 0.9 ) ( z 0.8 )
z ( z + 0.9 ) ( z 0.8 )
0.5 ( z + 0.6 ) ( z 0.6 -)
r 1 = ------------------------------------------------( z + 0.9 ) ( z 0.8 )
= 0.25
z=0
( z + 0.6 ) ( z 0.6 -)
------------------------------------------------r 2 = 0.5
z ( z 0.8 )
z = 0.9
0.5 ( z + 0.6 ) ( z 0.6 )

r 3 = -------------------------------------------------z ( z + 0.9 )
z = 0.8
= 0.147
= 0.103
Therefore,
0.1030.147- + --------------H ( z -) = 0.25
---------- + ------------------------z + 0.9 z 0.8
z
z
0.147z 0.103z
H ( z ) = 0.25 + ---------------- + ---------------z + 0.9 z 0.8
0.147
0.103
H ( z ) = 0.25 + ----------------------- + ---------------------1
1
1 + 0.9z
z 0.8z
(19.9)
The model is shown in Figure 19.19, and the input and output waveforms are shown in Figure
19.20.

1911
A demo model using fixed-point Simulink blocks can be displayed by typing

fxpdemo_parallel_form

function
1912

Models for Binary Counters

1
3.4639 + ------------------------------------------------- 1.0916 + 3.0086z H ( z ) = 5.5556 ---------------------------1

1
2
( 1 + 0.1z )
1 0.6z + 0.9z
19.4 Models for Binary Counters

In this section we will draw two models for binary counters.* Subsection 19.4.1 presents a 3bit up
/ down counter, and Subsection 19.4.2 presents a 4bit Johnson counter.
19.4.1 Model for a 3bit Up / Down Counter

A model for the operation of a 3bit counter with three D Flip-Flop blocks, six NAND gate
blocks, a NOT gate (Inverter) block, and a Clock block is shown in Figure 19.21. The D Flip
Flop and Clock blocks are in the Simulink Extras Toolbox, FlipFlops library, and the NAND
and NOT gates are in the Logic and Bit Operations Library. The D FlipFlop CLK (clock)
inputs are Negative Edge Triggered. The Clock waveform and the D FlipFlops output waveforms
when the Manual Switch block is the Count up position, are shown in Figure 19.22.
Figure 19.21. Model for a 3bit Up / Down binary counter
* For a detailed discussion on the analysis and design of binary counters, please refer to Digital Circuit Analysis
and Design with an Introduction to CPLDs and FPGAs, ISBN 0-9744239-6-3.

1913
19.4.2 Model for a 4bit Ring Counter

The model of Figure 19.23 implements a 4bit binary counter known as Johnson counter. The D
FlipFlop and Clock blocks are in the Simulink Extras Toolbox, FlipFlops library. The waveforms for this model are shown in Figure 11.24.
Figure 19.23. Model for a 4bit Johnson counter
1914

Models for Mechanical Systems
19.5 Models for Mechanical Systems

In this section we will draw three models for mechanical systems. Subsection 19.5.1 presents a
BlockSpringDashpot system, Subsection 19.5.2 presents a system with two mass blocks and two
springs, and Subsection 19.5.3 is a simple mechanical accelerometer system
19.5.1 Model for a MassSpringDashpot

Figure 19.25 shows a system consisting of a block, a dashpot, and a spring. It is shown in feedback
and control systems textbooks that this system is described by the second-order differential equation
2
d
d
m -------2 x ( t ) + p ----- x ( t ) + kx ( t ) = F ( t )
dt
dt
(19.10)
where m represents the mass of the block, p is a positive constant of proportionality of the force
that the dashpot exerts on the block, and k is also a positive constant of proportionality of the
force that the spring exerts on the block, known as Hookes law.
x
Dashpot
Block
Mass m
Spring
Figure 19.25. Mechanical system with a block, spring and dashpot

1915

The mass of the dashpot and the mass of the spring are small and are neglected. Friction is also
neglected. For the system of Figure 19.25, the input is the applied force F and the output is the
change in distance x .
Let us express the differential equation of (19.10) with numerical coefficients as
2
d
d
-------2 x ( t ) + 2 ----- x ( t ) + 3x ( t ) = ( 20 sin t )u 0 ( t )
dt
dt
(19.11)
where u 0 ( t ) is the unit step function, and the initial conditions are x ( 0 ) = 4 , and dx dt = 0 .
For convenience, we denote these are denoted as x10 and x20 respectively.
For the solution of (19.11) we will use the StateSpace block found in the Continuous Library,
and thus our model is as shown in Figure 19.26.
Figure 19.26. Model for Figure 19.25
The state equations are defined as

x1 ( t ) = x ( t )
(19.12)
d
x 2 ( t ) = ----- x 1 ( t )
dt
(19.13)
and
Then,
2
d
d
d
----- x 2 ( t ) = -------2 x 1 ( t ) = -------2 x ( t )
dt
dt
dt
(19.14)
From (19.11), (19.13), and (19.14) we obtain the system of state equations
d---x ( t ) = x2 ( t )
dt 1
d
----- x 2 ( t ) = 3x 1 ( t ) 2x 2 ( t ) + ( 20 sin t )u 0 ( t )
dt
(19.15)
and in matrix form,

d---x (t)
x (t)
0 u (t)
dt 1
= 0 1 1
+
0
d20 sin t
3 2 x2 ( t )
---x2 ( t )
dt
1916
(19.16)


The output state equation is
y = Cx + Du
or
y(t) = 1 0
x1 ( t )
x2 ( t )
Therefore, for the model of Figure 19.26, the coefficients A , B , C , and D are
A =
0 1
3 2
B =
0
5
C = 1 0
D = 0
(19.17)
The initial conditions x10 and x20 are denoted by the matrix
x10 =
x20
4
0
(19.18)
The values in (19.17) and (19.18) are entered in the Block parameters dialog box for the StateSpace block, and after the simulation command is issued, the Scope block displays the waveform
of Figure 19.27.
Figure 19.27. Waveform for the model of Figure 19.26
19.5.2 Model for a Cascaded MassSpring System

Figure 19.28 shows a a cascaded mass-spring system where F is the applied force, M is the mass,
k is the spring constant, f is the friction, and X is the displacement. It is shown in feedback and
control systems textbooks that the transfer function G ( s ) = X 1 F is
k1
G ( s ) = ---------------------------------------------------------------------------------------------------------2
2
2
( M1 s + f1 s + k1 ) ( M2 s + f2 s + k1 + k2 ) k1

(19.19)
1917

X2
X1
k1
f1
M1
k2
f2
M2
Figure 19.28. Cascaded massspring system
For simplicity, let us assume that the constants and conditions are such that after substitution into
(19.19), this relation reduces to
12
G ( s ) = ----------------------------------------------------------------4
3
2
s + 10s + 36s + 56s + 32
(19.20)
and the force applied at 50 sin t . The model under those conditions is shown in Figure 19.29, and
the input and output waveforms are shown in Figure 19.30.
Figure 19.29. Model for the system of Figure 19.28
1918


19.5.3 Model for a Mechanical Accelerometer
A simple mechanical accelerometer system consisting of a block, a dashpot, and a spring is connected as shown in Figure 19.31.
x
k
Block
Dashpot
Spring
Mass
M
Acceleration = a
Figure 19.31. A simple mechanical accelerometer
It is shown in feedback and control systems textbooks that the transfer function G ( s ) = x a is
1
G ( s ) = -------------------------------------------------2
s + (D M)s + k M
(19.21)
For simplicity, let us assume that the constants and conditions are such that after substitution into
(19.21), this relation reduces to
1
G ( s ) = ---------------------------------2
s + 0.1s + 0.2
(19.22)
and the force applied is 0.8u 0 ( t ) where u 0 ( t ) is the unit step function. The model under those
conditions is shown in Figure 19.32, and the input and output waveforms are shown in Figure
19.33.
Figure 19.32. Model for the system of Figure 19.31

1919
19.6 Feedback Control Systems

In our previous discussions in this chapter, we have used system components that are interconnected in series. These are referred to as openloop control systems. An example of an open
loop system is a microwave oven which is controlled by a timer. However, most control systems
are closedloop control systems where the control action ia affected by the output. An example
of a closedloop system is the autopilot subsystem in an airplane which continuously measures the
actual airplane direction and automatically adjusts other subsystems of the airplane to change the
airplane heading to the desired direction. Feedback is the characteristic of a closedloop control
system which distinguishes it from openloop systems. It is beyond the scope of this text to
describe feedback control systems in detail. We will only describe some basics to aid the reader in
understanding some of the advanced designs of the systems provided by the Simulink demos.
Figure 19.34 shows a simple feedback control system with two elements represented as blocks, the
first of which is generally known as the control element or controller, and the second is known as
the plant. The feedback (the line connecting the output to the summing point) is the same as the
output and for this reason the entire system is referred to as unity feedback system. The path E
represents the error, that is, the difference E = X Y .
X
1---------s+a
1
----------s+b
Controller
Plant
Figure 19.34. A unity feedback system
In Figure 19.34, the Controller and Plant blocks are in series and according to Feedback and Control Systems theory, can be replace by a single block whose transfer function is their product as
shown in Figure 19.35.
1920

Feedback Control Systems

X
1
--------------------------------(s + a)(s + b)
Figure 19.35. Simplified representation for the system of Figure 19.33
To find the overall transfer function G ( s ) = Y X , observe that

1
1
Y = ------------------------------- E = ------------------------------- [ X Y ]
(s + a)(s + b)
(s + a)(s + b)
or
1
1
Y + ------------------------------- Y = ------------------------------- X
(s + a )(s + b)
(s + a)(s + b)
(s + a )(s + b)
1
1
Y ------------------------------- + ------------------------------- Y = ------------------------------- X
(s + a )(s + b) (s + a )(s + b)
(s + a )(s + b)
Dividing both sides by ( s + a ) ( s + b ) we obtain

( s + a ) ( s + b )Y + Y = X
[ ( s + a ) ( s + b ) + 1 ]Y = X
and thus
Y
1
G ( s ) = ---- = ---------------------------------------X
(s + a)(s + b) + 1
Therefore, the block diagram of Figure 19.34can be replaced with only one block in an openloop
form as shown in Figure 19.36.
1
------------------------------------------( s + a )( s + b) + 1
Figure 19.36. The system of Figure 19.33 in an openloop form
A feedback control system in the form of the feedback path shown as in Figure 19.37 is referred to
as a feedback control system in canonical form. For the system of Figure 19.37, the ratio Y X is
Y
G
---- = -----------------X
1 GH
X
+
+ R
(19.23)
Y
Figure 19.37. Canonical form of a feedback control system

1921

More complicated block diagrams can be reduced by methods described in Feedback and Control
Systems textbooks. For instance, the block diagram of Figure 19.38 below,
12s
0.5
-----------4
s +4
+
+
1---------s+1
G1
H2
4
----------s+2
G2
7 ------------2
s +3
G3
+
+
+
3s + 5
----------------3
s + 15
H1
2s + 1
-------------------------2
s + 3s + 2
G4
Figure 19.38. Feedback control system to be simplified to an openloop system
can be replaced with the openloop system of Figure 19.39.

X
G1 G2 G3 + G4 G1 G2 G4 H1 + G2 G4 H1 + G2 G3 G4 H2
----------------------------------------------------------------------------------------------------------------------1 G1 G2 H1 + G2 H1 + G2 G3 H2
Figure 19.39. Open-loop equivalent control system for the closedloop system of Figure 19.38
We can prove that the systems of Figures 19.37 and 19.38 are equivalent with Simulink blocks.
The system of Figure 19.38 is represented by the model in Figure 19.40 and there is no need to
represent it as an openloop equivalent. Instead, we can represent it as the subsystem shown in
Figure 19.41.
Figure 19.40. A complicated feedback control system
1922

Models for Electrical Systems
Figure 19.41. The model of Figure 19.40 replaced by a Subsystem block
19.7 Models for Electrical Systems

In this section we will draw two models for mechanical systems. Subsection 19.7.1 presents an
electric circuit whose output voltage is determined by application of Thevenins theorem, and
Subsection 19.7.2 presents an electric circuit to be analyzed by application of the Superposition
Principle.
19.7.1 Model for an Electric Circuit in Phasor* Form

By application of Thevenins theorem, the electric circuit of Figure 19.42 can be simplified to
that shown in Figure 19.43.
85
170 0 V
j100
IX
100
50
j200
Figure 19.42. Electric circuit to be replaced by its Thevenin equivalent

112
j10.6
X
100
VTH = 110j6.87 V
Figure 19.43. The circuit of Figure 19.42 replaced by its Thevenin equivalent
* A phasor is a rotating vector. Phasors are used extensively in the analysis of AC electric circuits. For a thorough
discussion on phasors, please refer to Circuit Analysis I with MATLAB Applications, ISBN 0-9709511-2-4.
For a step-by-step procedure, please see same reference.

1923

Next, we let V IN = V TH , V OUT = V XY , Z 1 = 112 + j10 , and Z 2 = 100 . Application of the voltage division expression yields
Z2
-V
V OUT = ----------------Z 1 + Z 2 IN
(19.24)
Now, we use the model of Figure 19.44 to convert all quantities from the rectangular to the polar
form, perform the addition and multiplication operations, display the output voltage in both polar
and rectangular forms, and show the output voltage on a Scope block in Figure 19.45. The Simulink blocks used for the conversions are in the Math Operations library.
Figure 19.44. Model for the computation and display of the output voltage for the circuit of Figure 19.43
Figure 19.45. Waveform for the output voltage of model of Figure 19.44
1924

Models for Electrical Systems

19.7.2 Model for the Application of the Superposition Principle
We will create a model to illustrate the superposition principle by computing the phasor voltage
across capacitor C 2 in the circuit of Figure 19.46.
5 0 A
R1
j 6
C1
R2
j3
R3
8
j 3
10 0 A
C2
Figure 19.46. Electric circuit to illustrate the superposition principle
Let the phasor voltage across C 2 due to the 5 0 A current source acting alone be denoted as
V ' C2 , and that due to the 10 0 A current source as V '' C2 . Then, by the superposition principle,
V C2 = V ' C2 + V '' C2
With the 5 0 A current source acting alone, the circuit reduces to that shown in Figure 19.47.
5 0 A
4
j 6
R2
j3
R1
C1
R3
j 3
V ' C2
C2
Figure 19.47. Circuit of Figure 7.45 with the 5 0 A current source acting alone
By application of the current division expression, the current I ' C2 through C 2 is

7.211 56.3
4 j6
I ' C2 = ------------------------------------------------------- 5 0 = ------------------------------------- 5 0 = 2.367 33.1
15.232 23.2
4 j6 + 2 + j3 + 8 j3
The voltage across C 2 with the 5 0 current source acting alone is

V ' C2 = ( j3 ) ( 2.367 33.1 ) = ( 3 90 ) ( 2.367 33.1 )
= 7.102 123.1 = 3.878 j5.949
Next, with the 10 0 A current source acting alone, the circuit reduces to that shown in Figure
19.48.

1925
4
j 6
R2
j3
R1
C1
8
j 3
R3
10 0 A
V '' C2
C2
Figure 19.48. Circuit with the 10 0 A current source acting alone
and by application of the current division expression, the current I '' C2 through C 2 is
4 j6 + 2 + j3
I '' C2 = ------------------------------------------------------- ( 10 0 )
4 j6 + 2 + j3 + 8 j3
6.708 26.6
= ------------------------------------- 10 180 = 4.404 176.6
15.232 23.2
The voltage across C 2 with the 10 0 current source acting alone is

V '' C2 = ( j3 ) ( 4.404 176.6 ) = ( 3 90 ) ( 4.404 176.6 )
= ( 13.213 86.6 = 0.784 + j13.189 )
Addition of (7.13) with (7.14) yields

V C2 = V ' C2 + V '' C2 = 3.878 j5.949 + 0.784 + j13.189
or
V C2 = 3.094 + j7.240 = 7.873 113.1
The models for the computation of V ' C2 and V '' C2 are shown in Figures 19.49 and 19.50 respectively.
Figure 19.49. Model for the computation of V'C2
1926

Transformations
Figure 19.50. Model for the computation of V''C2
The final step is to add V ' C2 with V '' C2 . This addition is performed by the model of Figure 19.51
where the models of Figures 19.49 and 19.50 have been converted to Subsystems 1 and 2 respectively.
Figure 19.51. Model for the addition of V'C2 with V''C2
The model of Figure 19.51 can now be used with the circuit of Figure 19.46 for any values of the
impedances Z .
19.8 Transformations
The conversions from complex to magnitudeangle and magnitudeangle to complex used in the
previous section, can also be performed with the Cartesian to Polar and Polar to Cartesian blocks.
Examples are presented in the model of Figure 19.52 where transformations from Cartesian to
Spherical and Spherical to Cartesian are shown. The equations used in these transformations are
shown in the Block Parameters dialog box for each block.

1927
Figure 19.52. Transformation examples
Other transformation blocks include Fahrenheit to Celsius, Celsius to Fahrenheit, Degrees to

Radians, and Radians to Degrees.
19.9 Another SFunction Example

An SFunction example is presented in Subsection 11.18, Chapter 11, Page 1144. In this section, we will present another example.
For semiconductor diodes, the empirical equations describing the temperature coefficient
dV F dT in mV C as a function of forward current I F in mA are
dV F1
------------ = 0.6 log 10 ( I ff ) 1.92
dT
for gold doped diodes
dV F1
------------ = 0.33 log 10 ( I ff I fv ) 1.66
dT
for non g old doped diodes
where, for this example,

I ff = final value of forward current
I fv = variable value of forward current
We begin with the userdefined mfile below which we type in the Editor Window and we save it
as diode.m
function dx=diode(t,x,Ifv)
%
% Model for gold-doped and non-gold-doped diodes
%
Vf1 = x(1); % Gold-doped diode forward voltage, volts
Vf2 = x(2); % Non-gold-doped diode forward voltage, volts
1928

Another SFunction Example

Iff = 100;
% Iff = final value in
of forward current in mA
dVf1 = 0.6*log10(Iff)-1.92;
dVf2 = 0.33*log10(Iff-Ifv)-1.66; % Ifv = variable value of forward current in mA
dx = [dVf1;dVf2];
To test this function for correctness, on MATLABs Command Window we type and execute the
command
[t,x,Ifw]=ode45(@diode, [0 10], [1;10],[ ], 50)
where the vector [0 10] specifies the start and the end of the simulation time, the vector [1;10]
specifies an initial value column vector, the null vector [ ] can be used for other options, and the
input value is set to 50.
Next, using the Editor Window we write the mfile below and we save it as diode_sfcn.m
function [sys,x0,str,ts]=...
diode_sfcn(t,x,u,flag,Vf1init,Vf2init)
switch flag
case 0
% Initialize
str = [];
ts = [0 0];
s = simsizes;
s.NumContStates = 2;
s.NumDiscStates = 0;
s.NumOutputs = 2;
s.NumInputs = 1;
s.DirFeedthrough = 0;
s.NumSampleTimes = 1;
sys =simsizes(s);
x0 = [Vf1init,Vf2init];
case 1
% Derivatives
Ifw = u
sys = diode(t,x,Ifw);
case 3
% Output
sys = x;
case {2 4 9}
sys = [];
% 2:discrete
% 3:calcTimeHit
% 9:termination
otherwise

1929

error(['unhandled flag =',num2str(flag)]);
end
The syntax for the diode_sfcn.m file above is the same as that of Example 11.14, Chapter 11,
Page 1144.
Next, we open a new model window, from the UserDefined Functions Library we drag an S
Function block into it, we doubleclick this block, in the Function Block Parameters dialog box
we name it diode_sfcn, and we add and interconnect the other blocks shown in Figure 19.53.
Figure 19.53. Another example illustrating the construction of an SFunction block
The waveforms displayed by the Scope 1 and Scope 2 blocks are shown in Figures 19.54 and 19.55
respectively.
Figure 19.54. Waveform displayed by the Scope 1 block in the model of Figure 19.53
1930

Concluding Remarks
Figure 19.55. Waveform displayed by the Scope 2 block in the model of Figure 19.53
19.10 Concluding Remarks

This text, as its title indicates, is an introduction to Simulink. In Chapters 2 through 18 we have
described all blocks of all Simulink Libraries and provided examples to illustrate their application.
Chapter 1 and this chapter provided additional examples. This text is not a substitute for the Simulink Users Manual which provides much more information on MATLAB and Simulink, and
should be treated as a supplement. Moreover, the demos provided with Simulink are realworld
examples and should be studied in thoroughly after reading this text. Undoubtedly, new MATLAB and Simulink releases will include new functions and new blocks.

1931

19.11 Summary
An analogtodigital conversion (ADC) application with an Idealized ADC Quantizer block
was presented in Section 19.1.
Examples of using ZeroOrder Hold and FirstOrder Hold blocks as reconstructors for digitalto-analog conversion were presented in Section 19.2.
The four forms of digital filter realization forms were presented in Section 19.3.
Models for binary counters were presented in Section 19.4.
Three models for mechanical systems were presented in Section 19.5.
A brief review of feedback control systems was provided in Section 19.6.
Two models for AC electric circuit analysis were presented in Section 19.7.
Four transformations blocks were introduced in Section 19.8.
An SFunction example was presented in Section 11.18, Chapter 11. Another example was
given in Section 19.9, this chapter.
1932


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Chapter 19

his chapter is devoted to engineering applications using appropriate Simulink blocks to

19.1 AnalogtoDigital Conversion

Figure 19.1. Model for AnalogtoDigital conversion

Introduction to Simulink with Engineering Applications

Chapter 19 Engineering Applications

Introduction to Simulink with Engineering Applications

The ZeroOrder Hold and FirstOrder Hold as Reconstructors

Introduction to Simulink with Engineering Applications

Chapter 19 Engineering Applications

Figure 19.8. Waveforms for the model of Figure 19.7

19.3 Digital Filter Realization Forms

19.3.1 The Direct Form I Realization of a Digital Filter

Figure 19.9. Direct Form I Realization of a secondorder digital filter

At the summing junction of Figure 19.9 we obtain

Introduction to Simulink with Engineering Applications

Digital Filter Realization Forms

19.3.2 The Direct Form II Realization of a Digital Filter

Figure 19.10. Direct Form-II Realization of a second-order digital filter

Introduction to Simulink with Engineering Applications

Chapter 19 Engineering Applications

The input and output waveforms are shown in Figure 19.12.

Figure 19.11. Model for Example 19.1

Introduction to Simulink with Engineering Applications

Digital Filter Realization Forms

in MATLABs Command Window. This demo is an implementation of the thirdorder transfer

1 + 2.2z + 1.85z + 0.5z H ( z ) = -------------------------------------------------------------------1

19.3.3 The Series Form Realization of a Digital Filter

Relation (19.4) is implemented as the cascaded blocks shown in Figure 19.13.

Figure 19.13. Series Form Realization

Figure 19.14 shows the SeriesForm Realization of a secondorder digital filter.

Introduction to Simulink with Engineering Applications

Chapter 19 Engineering Applications

0.5 ( 1 0.36 z ) H ( z ) = -------------------------------------------1

To implement this filter, we factor the numerator and denominator polynomials as

0.5 ( 1 + 0.6z ) ( 1 0.6z ) *

Figure 19.15. Model for Example 19.2

Introduction to Simulink with Engineering Applications

Digital Filter Realization Forms

A demo model using fixed-point Simulink blocks can be displayed by typing

in MATLABs Command Window. This demo is an implementation of the thirdorder transfer

19.3.4 The Parallel Form Realization of a Digital Filter

Relation (19.7) is implemented as the parallel blocks shown in Figure 19.17.

Introduction to Simulink with Engineering Applications

Chapter 19 Engineering Applications

Figure 19.17. Parallel Form Realization

Introduction to Simulink with Engineering Applications

Digital Filter Realization Forms

To implement this filter, we first express the transfer function as

Next, we perform partial fraction expansion.

0.5 ( z + 0.6 ) ( z 0.6 )

Introduction to Simulink with Engineering Applications

Chapter 19 Engineering Applications

Figure 19.19. Model for Example 19.3

A demo model using fixed-point Simulink blocks can be displayed by typing

in MATLABs Command Window. This demo is an implementation of the thirdorder transfer

Introduction to Simulink with Engineering Applications

Models for Binary Counters

3.4639 + ------------------------------------------------- 1.0916 + 3.0086z H ( z ) = 5.5556 ---------------------------1

19.4 Models for Binary Counters

19.4.1 Model for a 3bit Up / Down Counter

Figure 19.21. Model for a 3bit Up / Down binary counter

Introduction to Simulink with Engineering Applications

Chapter 19 Engineering Applications