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Manual de Servicio para Laptop Acer 5315 Icl50 - MB - La-3551p - r20
Manual de Servicio para Laptop Acer 5315 Icl50 - MB - La-3551p - r20
Compal Confidential
2
2007-8-15
REV:2.0
2007/04/04
Issued Date
Security Classification
2008/04/04
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
Title
Cover Page
Size
B
Date:
Document Number
Rev
1.0
ICL50/ICK70 M/B LA-3551P Schematic
Sheet
of
49
Compal Confidential
page 36
uPGA-478 Package
(Socket P) page
DVI-D Conn.
LCD Conn.
page 18
page 18
DVI
4,5,6
1
H_D#(0..63)
Memory BUS(DDRII)
Intel Crestline
Dual Channel
PCI-Express
DMI
C-Link
USB conn x2
page 17
USB port 0, 2
PCI-Express
Intel ICH8-M
3.3V 48MHz
page 29
MINI Card x2
LAN(GbE)
WLAN, TV-Tuner
BCM5787M
page 28
page 26
3.3V 33 MHz
3.3V ATA-100
BGA-676
HD Audio
IDE
S-ATA
page 20,21,22,23
Card Reader
CDROM
Conn.
page 24
port 0, 1
page 25
SATA HDD
Conn. page
RJ45
1394
Conn.
page 25
5 in 1
socket
CMOS
Camera
2
R5C833
page 26
Bluetooth
Conn
USB
3.3V 24.576MHz/48Mhz
PCI BUS
IDSEL:AD20
(PIRQA#,
GNT#2,
REQ#2)
page 14,15
BANK 0, 1, 2, 3
page 7,8,9,10,11,12,13
MXM II VGA/B
New Card
Socket
200pin DDRII-SO-DIMM X2
uFCBGA-1299
page 16
page 19
LVDS
SDVO
LVDS
Clock Generator
ICS9LPRS365
page 4
FSB
667/800MHz
H_A#(3..35)
Thermal Sensor
ADM1032
Fan Control
MDC 1.5
Conn
page 33
24
page 35
page 33
page 35
page 30
LED/B Conn.
Int.KBD
Touch Pad
page 32
page 32
page 32
EC I/O Buffer
USB&TV/B Conn.
BIOS
page 32
USB port 4, 6
page 37
Phone Jack x3
ENE KB926
page 32
page 34
LPC BUS
page 25
BTN/B Conn.
page 33
ALC268
Audio AMP
RTC CKT.
HDA Codec
page 32
page 29
CIR
Power Circuit DC/DC
4
page 38,39,40,41
42,43,44,45
AUDIO/B Conn.
w/Woofer(ICK70)
page 29
4
page 35
2006/12/25
Issued Date
Security Classification
2007/12/25
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
Title
Block Diagrams
Size
B
Date:
Document Number
Rev
1.0
ICL50/ICK70 M/B LA-3551P Schematic
Sheet
of
49
SIGNAL
STATE
Voltage Rails
+VALW
+V
+VS
Clock
HIGH
HIGH
HIGH
HIGH
ON
ON
ON
ON
Power Plane
Description
S1
S3
S5
S1(Power On Suspend)
LOW
HIGH
HIGH
HIGH
ON
ON
ON
LOW
VIN
N/A
N/A
N/A
S3 (Suspend to RAM)
LOW
LOW
HIGH
HIGH
ON
ON
OFF
OFF
B+
N/A
N/A
N/A
+CPU_CORE
ON
OFF
OFF
S4 (Suspend to Disk)
LOW
LOW
LOW
HIGH
ON
OFF
OFF
OFF
+0.9VS
ON
OFF
OFF
S5 (Soft OFF)
LOW
LOW
LOW
LOW
ON
OFF
OFF
OFF
+1.05VS
ON
OFF
OFF
+1.25VS
ON
OFF
OFF
+1.5VS
ON
OFF
OFF
+1.8V
ON
ON
OFF
+1.8VS
ON
OFF
OFF
Vcc
Ra/Rc/Re
+2.5VS
ON
OFF
OFF
Board ID
+3VALW
ON
ON
ON*
+3V
ON
ON
+3V_LAN
ON
ON
+3VS
ON
OFF
OFF
+5VALW
ON
ON
ON*
+5VS
ON
OFF
OFF
+VSB
ON
ON
ON*
+RTCVCC
RTC power
ON
ON
ON
0
1
2
3
4
5
6
7
Full ON
V AD_BID min
0 V
0.216 V
0.436 V
0.712 V
1.036 V
1.453 V
1.935 V
2.500 V
V AD_BID typ
0 V
0.250 V
0.503 V
0.819 V
1.185 V
1.650 V
2.200 V
3.300 V
V AD_BID max
0 V
0.289 V
0.538 V
0.875 V
1.264 V
1.759 V
2.341 V
3.300 V
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
BOARD ID Table
Board ID
0
1
2
3
4
5
6
7
IDSEL#
AD16
1394/Card Reader
REQ#/GNT#
Interrupts
PIRQE
PIRQG
EC SM Bus1 address
3
Device
Address
Smart Battery
0001 011X b
EEPROM(24C16/02)
1010 000X b
GMT G781-1
1001 101X b
BTO Item
Discrete
UMA
BOM Structure
PM@
GM@
EC SM Bus2 address
Device
Address
ADI ADM1032
1001 100X b
Address
Clock Generator
(ICS9LPRS365)
1101 001Xb
DDR DIMM0
1001 000Xb
DDR DIMM2
1001 010Xb
2006/12/25
Issued Date
Security Classification
2007/12/25
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
Title
Notes List
Size
B
Date:
Document Number
Rev
1.0
ICL50/ICK70 M/B LA-3551P Schematic
Sheet
of
49
H_A#[3..35]
H_A#[3..35]
H_REQ#[0..4]
7 H_REQ#[0..4]
7
H_RS#[0..2]
H_RS#[0..2]
JP22A
A[3]#
A[4]#
A[5]#
A[6]#
A[7]#
A[8]#
A[9]#
A[10]#
A[11]#
A[12]#
A[13]#
A[14]#
A[15]#
A[16]#
ADSTB[0]#
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
K3
H2
K2
J3
L1
REQ[0]#
REQ[1]#
REQ[2]#
REQ[3]#
REQ[4]#
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
H_ADSTB#1
Y2
U5
R3
W6
U4
Y5
U1
R4
T5
T3
W2
W5
Y4
U2
V4
W3
AA4
AB2
AA3
V1
H_A20M#
H_FERR#
H_IGNNE#
A6
A5
C4
H_STPCLK#
H_INTR
H_NMI
H_SMI#
D5
C6
B4
A3
STPCLK#
LINT0
LINT1
SMI#
M4
N5
T2
V3
B2
C3
D2
D22
D3
F6
RSVD[01]
RSVD[02]
RSVD[03]
RSVD[04]
RSVD[05]
RSVD[06]
RSVD[07]
RSVD[08]
RSVD[09]
RSVD[10]
21
21
21
21
CONTROL
A[17]#
A[18]#
A[19]#
A[20]#
A[21]#
A[22]#
A[23]#
A[24]#
A[25]#
A[26]#
A[27]#
A[28]#
A[29]#
A[30]#
A[31]#
A[32]#
A[33]#
A[34]#
A[35]#
ADSTB[1]#
A20M#
FERR#
IGNNE#
H1
E2
G5
H_ADS#
H_BNR#
H_BPRI#
H5
F21
E1
H_DEFER# 7
H_DRDY# 7
H_DBSY# 7
F1
IERR#
INIT#
D20
B3
LOCK#
H4
RESET#
RS[0]#
RS[1]#
RS[2]#
TRDY#
C1
F3
F4
G3
G2
HIT#
HITM#
G6
E4
BPM[0]#
BPM[1]#
BPM[2]#
BPM[3]#
PRDY#
PREQ#
TCK
TDI
TDO
TMS
TRST#
DBR#
AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6
AB3
AB5
AB6
C20
7
7
7
H_BR0#
H_INIT#
21
H_IERR#
H_LOCK# 7
H_RESET#
H_RS#0
H_RS#1
H_RS#2
H_RESET# 7
H_TRDY# 7
H_HIT#
H_HITM#
7
7
XDP_BPM#5
XDP_TCK
XDP_TDI
XDP_TMS
XDP_TRST#
XDP_DBRESET#
XDP_DBRESET# 22
+1.05VS
THERMAL
PROCHOT#
THERMDA
THERMDC
ICH
21
21
21
BR0#
ADDR GROUP 1
DEFER#
DRDY#
DBSY#
XDP/ITP SIGNALS
H_ADSTB#0
ADS#
BNR#
BPRI#
THERMTRIP#
D21
A24
B25
C7
H_PROCHOT#
THERMDA
THERMDC
BCLK[0]
BCLK[1]
A22
A21
XDP_TDI
R59
150_0402_1%
XDP_TMS
R63
39_0402_1%
XDP_BPM#5
R46
1 @
54.9_0402_1%
H_PROCHOT#
R114 2
56_0402_5%
H_IERR#
R113 2
56_0402_5%
XDP_TRST#
R57
649_0402_1%
XDP_TCK
R37
27_0402_5%
left NC if no ITP
H_THERMTRIP# 8,21
H CLK
39Ohm
CLK_CPU_BCLK 16
CLK_CPU_BCLK# 16
Layout Note:
THERMDA&THERMDC Trace / Space = 10 / 10 mil
THERMDA_R&THERMDC_R Trace / Space = 10 / 10 mil
RESERVED
J4
L5
L4
K5
M3
N2
J1
N3
P5
P2
L2
P4
P1
R1
M1
ADDR GROUP 0
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
BSEL2
BSEL1
BSEL0
BCLK
200
THERMDA 1
R546
2
0_0402_5%
166
THERMDC 1
R547
U21
1
C484
2200P_0402_50V7K
2
VDD
SCLK
EC_SMB_CK2 30
THERMDA_R
D+
SDATA
EC_SMB_DA2 30
THERMDC_R
D-
ALERT#
THERM#
GND
2
0_0402_5%
ADM1032ARMZ_MSOP8
A
Security Classification
2006/12/25
Issued Date
Deciphered Date
2007/12/25
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
Merom (1/3)
Size
B
Date:
Document Number
Rev
1.0
ICL50/ICK70 M/B LA-3551P Schematic
Wednesday, August 15, 2007
Sheet
1
of
49
H_D#[0..63]
H_D#[0..63]
7
7
7
H_DSTBN#0
H_DSTBP#0
H_DINV#0
+1.05VS
7
7
7
R366
1K_0402_1%
R378
R377
R369
2K_0402_1%
Width=4 mil ,
Spacing: 15mil
(55Ohm)
H_DSTBN#1
H_DSTBP#1
H_DINV#1
GTL_REF0
TEST1
1 @ 1K_0402_5%
TEST2
1 @ 1K_0402_5%
TEST3
T17 PAD
C444 1
2 @ 0.1U_0402_16V4Z TEST4
TEST5
T15 PAD @
TEST6
T16 PAD
@
16 CPU_BSEL0@
16 CPU_BSEL1
16 CPU_BSEL2
2
2
D[16]#
D[17]#
D[18]#
D[19]#
D[20]#
D[21]#
D[22]#
D[23]#
D[24]#
D[25]#
D[26]#
D[27]#
D[28]#
D[29]#
D[30]#
D[31]#
DSTBN[1]#
DSTBP[1]#
DINV[1]#
AD26
C23
D25
C24
AF26
AF1
A26
B22
B23
C21
GTLREF
TEST1
TEST2
TEST3
TEST4
TEST5
TEST6
BSEL[0]
BSEL[1]
BSEL[2]
D[32]#
D[33]#
D[34]#
D[35]#
D[36]#
D[37]#
D[38]#
D[39]#
D[40]#
D[41]#
D[42]#
D[43]#
D[44]#
D[45]#
D[46]#
D[47]#
DSTBN[2]#
DSTBP[2]#
DINV[2]#
Y22
AB24
V24
V26
V23
T22
U25
U23
Y25
W22
Y23
W24
W25
AA23
AA24
AB25
Y26
AA26
U22
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
D[48]#
D[49]#
D[50]#
D[51]#
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
D[59]#
D[60]#
D[61]#
D[62]#
D[63]#
DSTBN[3]#
DSTBP[3]#
DINV[3]#
AE24
AD24
AA21
AB22
AB21
AC26
AD20
AE22
AF23
AC25
AE21
AD21
AC22
AD23
AF22
AC23
AE25
AF24
AC20
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
DATA GRP 2
N22
K25
P26
R23
L23
M24
L22
M23
P25
P23
P22
T24
R24
L25
T25
N25
L26
M26
N24
DATA GRP 1
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
D[0]#
D[1]#
D[2]#
D[3]#
D[4]#
D[5]#
D[6]#
D[7]#
D[8]#
D[9]#
D[10]#
D[11]#
D[12]#
D[13]#
D[14]#
D[15]#
DSTBN[0]#
DSTBP[0]#
DINV[0]#
DATA GRP 3
E22
F24
E26
G22
F23
G25
E25
E23
K24
G24
J24
J23
H22
F26
K22
H23
J26
H26
H25
DATA GRP 0
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
JP22C
7
+CPU_CORE
JP22B
COMP[0]
COMP[1]
COMP[2]
COMP[3]
R26
U26
AA1
Y1
DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
PSI#
E5
B5
D24
D6
D7
AE6
MISC
H_DSTBN#2 7
H_DSTBP#2 7
H_DINV#2 7
H_DSTBN#3 7
H_DSTBP#3 7
H_DINV#3 7
COMP0
COMP1
COMP2
COMP3
R376
R375
R54
R56
1
1
1
1
H_PWRGOOD
H_CPUSLP#
2
2
2
2
27.4_0402_1%
54.9_0402_1%
27.4_0402_1%
54.9_0402_1%
H_DPRSTP# 8,21,45
H_DPSLP# 21
H_DPWR# 7
H_PWRGOOD 21
H_CPUSLP# 7
PSI#
45
A7
A9
A10
A12
A13
A15
A17
A18
A20
B7
B9
B10
B12
B14
B15
B17
B18
B20
C9
C10
C12
C13
C15
C17
C18
D9
D10
D12
D14
D15
D17
D18
E7
E9
E10
E12
E13
E15
E17
E18
E20
F7
F9
F10
F12
F14
F15
F17
F18
F20
AA7
AA9
AA10
AA12
AA13
AA15
AA17
AA18
AA20
AB9
AC10
AB10
AB12
AB14
AB15
AB17
AB18
VCC[001]
VCC[002]
VCC[003]
VCC[004]
VCC[005]
VCC[006]
VCC[007]
VCC[008]
VCC[009]
VCC[010]
VCC[011]
VCC[012]
VCC[013]
VCC[014]
VCC[015]
VCC[016]
VCC[017]
VCC[018]
VCC[019]
VCC[020]
VCC[021]
VCC[022]
VCC[023]
VCC[024]
VCC[025]
VCC[026]
VCC[027]
VCC[028]
VCC[029]
VCC[030]
VCC[031]
VCC[032]
VCC[033]
VCC[034]
VCC[035]
VCC[036]
VCC[037]
VCC[038]
VCC[039]
VCC[040]
VCC[041]
VCC[042]
VCC[043]
VCC[044]
VCC[045]
VCC[046]
VCC[047]
VCC[048]
VCC[049]
VCC[050]
VCC[051]
VCC[052]
VCC[053]
VCC[054]
VCC[055]
VCC[056]
VCC[057]
VCC[058]
VCC[059]
VCC[060]
VCC[061]
VCC[062]
VCC[063]
VCC[064]
VCC[065]
VCC[066]
VCC[067]
VCC[068]
VCC[069]
VCC[070]
VCC[071]
VCC[072]
VCC[073]
VCC[074]
VCC[075]
VCC[076]
VCC[077]
VCC[078]
VCC[079]
VCC[080]
VCC[081]
VCC[082]
VCC[083]
VCC[084]
VCC[085]
VCC[086]
VCC[087]
VCC[088]
VCC[089]
VCC[090]
VCC[091]
VCC[092]
VCC[093]
VCC[094]
VCC[095]
VCC[096]
VCC[097]
VCC[098]
VCC[099]
VCC[100]
AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20
VCCP[01]
VCCP[02]
VCCP[03]
VCCP[04]
VCCP[05]
VCCP[06]
VCCP[07]
VCCP[08]
VCCP[09]
VCCP[10]
VCCP[11]
VCCP[12]
VCCP[13]
VCCP[14]
VCCP[15]
VCCP[16]
G21
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21
VCCA[01]
VCCA[02]
B26
C26
VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]
AD6
AF5
AE5
AF4
AE3
AF3
AE2
VCCSENSE
AF7
VCCSENSE
VSSSENSE
AE7
VSSSENSE
+CPU_CORE
D
+1.05VS
20mils
+1.5VS
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
CPU_VID6
1
R20
1
C153
C148
45
45
45 0.01U_0402_16V7K
2
2
45
45
10U_0805_10V4Z
45
45
2
+CPU_CORE
100_0402_1%
VCCSENSE 45
VSSSENSE 45
R21
100_0402_1%
Security Classification
2006/12/25
Issued Date
Deciphered Date
2007/12/25
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
Merom (2/3)
Size
B
Date:
Document Number
Rev
1.0
ICL50/ICK70 M/B LA-3551P Schematic
Wednesday, August 15, 2007
Sheet
1
of
49
+CPU_CORE
+CPU_CORE
3 x 330uF(9mOhm/3)
JP22D
A4
A8
A11
A14
A16
A19
A23
AF2
B6
B8
B11
B13
B16
B19
B21
B24
C5
C8
C11
C14
C16
C19
C2
C22
C25
D1
D4
D8
D11
D13
D16
D19
D23
D26
E3
E6
E8
E11
E14
E16
E19
E21
E24
F5
F8
F11
F13
F16
F19
F2
F22
F25
G4
G1
G23
G26
H3
H6
H21
H24
J2
J5
J22
J25
K1
K4
K23
K26
L3
L6
L21
L24
M2
M5
M22
M25
N1
N4
N23
N26
P3
VSS[001]
VSS[002]
VSS[003]
VSS[004]
VSS[005]
VSS[006]
VSS[007]
VSS[008]
VSS[009]
VSS[010]
VSS[011]
VSS[012]
VSS[013]
VSS[014]
VSS[015]
VSS[016]
VSS[017]
VSS[018]
VSS[019]
VSS[020]
VSS[021]
VSS[022]
VSS[023]
VSS[024]
VSS[025]
VSS[026]
VSS[027]
VSS[028]
VSS[029]
VSS[030]
VSS[031]
VSS[032]
VSS[033]
VSS[034]
VSS[035]
VSS[036]
VSS[037]
VSS[038]
VSS[039]
VSS[040]
VSS[041]
VSS[042]
VSS[043]
VSS[044]
VSS[045]
VSS[046]
VSS[047]
VSS[048]
VSS[049]
VSS[050]
VSS[051]
VSS[052]
VSS[053]
VSS[054]
VSS[055]
VSS[056]
VSS[057]
VSS[058]
VSS[059]
VSS[060]
VSS[061]
VSS[062]
VSS[063]
VSS[064]
VSS[065]
VSS[066]
VSS[067]
VSS[068]
VSS[069]
VSS[070]
VSS[071]
VSS[072]
VSS[073]
VSS[074]
VSS[075]
VSS[076]
VSS[077]
VSS[078]
VSS[079]
VSS[080]
VSS[081]
1
P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
A25
AF25
VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
C155
3 x 330uF(9mOhm/3)
C157
330U_D2E_2.5VM_R9
2
C440
330U_D2E_2.5VM_R9
2
C441
C27
330U_D2E_2.5VM_R9
330U_D2E_2.5VM_R9
2
2
2
330U_D2E_2.5VM_R9
@
D
+CPU_CORE
C116
C117
C474
C465
C469
C468
C462
C85
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
2
2
2
2
2
2
2
2
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
C461
C458
C119
C120
C104
C93
C92
C84
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
2
2
2
2
2
2
2
2
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
C
C83
C82
C476
C81
C105
C472
C625
C624
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
2
2
2
2
2
2
2
2
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
C473
C466
C459
C460
C475
C118
C627
C626
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
2
2
2
2
2
2
2
2
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
+CPU-CORE
Decoupling
SPCAP,Polymer
MLCC 0805 X5R
C,uF
ESR, mohm
ESL,nH
6X330uF
9m ohm/6
1.8nH/6
32X22uF
3m ohm/32
0.6nH/32
32X10uF
3m ohm/32
0.6nH/32
+1.05VS
1
.
+ C40
C97
1
C113
C90
C115
C86
C87
330U_D2E_2.5VM_R9
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
2
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Security Classification
2006/12/25
Issued Date
Deciphered Date
2007/12/25
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
Merom (3/3)
Size
B
Date:
Document Number
Rev
1.0
ICL50/ICK70 M/B LA-3551P Schematic
Wednesday, August 15, 2007
Sheet
1
of
49
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
+1.05VS
R408
221_0402_1%
H_SWING
width=10mil
1
R409
100_0402_1%
C502
0.1U_0402_16V4Z
H_RCOMP
width=10mil
R410
24.9_0402_1%
+1.05VS
R415
R414
54.9_0402_1%
H_A#[3..35]
54.9_0402_1%
E2
G2
G7
M6
H7
H3
G4
F3
N8
H2
M10
N12
N9
H5
P13
K9
M2
W10
Y8
V4
M3
J1
N5
N3
W6
W9
N2
Y7
Y9
P4
W3
N1
AD12
AE3
AD9
AC9
AC7
AC14
AD11
AC11
AB2
AD7
AB1
Y3
AC6
AE2
AC5
AG3
AJ9
AH8
AJ14
AE9
AE11
AH12
AJ5
AH5
AJ6
AE7
AJ7
AJ2
AE5
AJ3
AH2
AH13
H_D#_0
H_D#_1
H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63
width=10mil
width=10mil
+1.05VS
4
5
R407
H_RESET#
H_CPUSLP#
H_SWING
H_RCOMP
B3
C2
H_SWING
H_RCOMP
H_SCOMP
H_SCOMP#
W1
W2
H_SCOMP
H_SCOMP#
H_RESET#
H_CPUSLP#
B6
E5
H_CPURST#
H_CPUSLP#
1K_0402_1%
width:spacing=10mil:20mil (<0.5")
R404
R406
H_AVREF
2 H_DVREF
0_0402_5%
B9
A9
H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8
H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_A#_32
H_A#_33
H_A#_34
H_A#_35
J13
B11
C11
M11
C15
F16
L13
G17
C14
K16
B13
L16
J17
B14
K19
P15
R17
B16
H20
L19
D17
M17
N16
J19
B18
E19
B17
B15
E17
C18
A19
B19
N19
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
H_ADS#
H_ADSTB#_0
H_ADSTB#_1
H_BNR#
H_BPRI#
H_BREQ#
H_DEFER#
H_DBSY#
HPLL_CLK
HPLL_CLK#
H_DPWR#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#
G12
H17
G20
C8
E8
F12
D6
C10
AM5
AM7
H8
K7
E4
C6
G10
B7
H_ADS#
H_ADSTB#0
H_ADSTB#1
H_BNR#
H_BPRI#
H_BR0#
H_DEFER#
H_DBSY#
CLK_MCH_BCLK
CLK_MCH_BCLK#
H_DPWR#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#
H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3
K5
L2
AD13
AE13
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3
M7
K3
AD2
AH11
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3
L7
K2
AC2
AJ10
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4
M14
E13
A11
H13
B12
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_RS#_0
H_RS#_1
H_RS#_2
E12
D7
D8
H_RS#0
H_RS#1
H_RS#2
H_ADS# 4
H_ADSTB#0 4
H_ADSTB#1 4
H_BNR# 4
H_BPRI# 4
H_BR0#
4
H_DEFER# 4
H_DBSY# 4
CLK_MCH_BCLK 16
CLK_MCH_BCLK# 16
H_DPWR# 5
H_DRDY# 4
H_HIT#
4
H_HITM# 4
H_LOCK# 4
H_TRDY# 4
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
5
5
5
5
5
5
5
5
H_DSTBP#0 5
H_DSTBP#1 5
H_DSTBP#2 5
H_DSTBP#3 5
H_REQ#[0..4]
H_RS#[0..2]
H_AVREF
H_DVREF
C492
CRESTLINE_1p0
0.1U_0402_16V4Z
PM@
2K_0402_1%
U23A
H_D#[0..63]
HOST
Security Classification
2006/12/25
Issued Date
Deciphered Date
2007/12/25
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
Crestline GMCH(1/7)-GTL
Size
B
Date:
Document Number
Rev
1.0
ICL50/ICK70 M/B LA-3551P Schematic
Wednesday, August 15, 2007
Sheet
1
of
49
U23B
PM_EXTTS#0
PM_EXTTS#1
20,22,24,26,30 PLT_RST#
4,21 H_THERMTRIP#
22,45 PM_DPRSLPVR
R326 1
R184
GMCH_PWROK
MCH_RSTIN#
2 100_0402_5%
0_0402_5%
22,33 SYS_PWROK
VGATE
1
R333
SYS_PWROK 1
R332
GMCH_PWROK
2
@ 0_0402_5%
2
0_0402_5%
BJ51
BK51
BK50
BL50
BL49
BL3
BL2
BK1
BJ1
E1
A5
C51
B50
A50
A49
BK2
PM_BM_BUSY#
PM_DPRSTP#
PM_EXT_TS#_0
PM_EXT_TS#_1
PWROK
RSTIN#
THERMTRIP#
DPRSLPVR
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16
BE29
AY32
BD39
BG37
DDRA_CKE0
DDRA_CKE1
DDRB_CKE0
DDRB_CKE1
SM_CS#_0
SM_CS#_1
SM_CS#_2
SM_CS#_3
BG20
BK16
BG16
BE13
DDRA_SCS0#
DDRA_SCS1#
DDRB_SCS0#
DDRB_SCS1#
SM_ODT_0
SM_ODT_1
SM_ODT_2
SM_ODT_3
BH18
BJ15
BJ14
BE16
DDRA_ODT0
DDRA_ODT1
DDRB_ODT0
DDRB_ODT1
SM_RCOMP
SM_RCOMP#
BL15
BK14
SMRCOMP
SMRCOMP#
SM_RCOMP_VOH
SM_RCOMP_VOL
BK31
BL31
SM_RCOMP_VOH
SM_RCOMP_VOL
SM_VREF_0
SM_VREF_1
AR49
AW4
R432
3.01K_0402_1%
14
14
15
15
14
14
15
15
+1.8V
2 20_0402_1%
2 20_0402_1%
20mil
1
R337
CLK_DREF_96M
CLK_DREF_96M#
CLK_DREF_SSC
CLK_DREF_SSC#
PEG_CLK
PEG_CLK#
K44
K45
CLK_MCH_3GPLL
CLK_MCH_3GPLL#
DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3
AN47
AJ38
AN42
AN46
DMI_ITX_MRX_N0
DMI_ITX_MRX_N1
DMI_ITX_MRX_N2
DMI_ITX_MRX_N3
DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3
AM47
AJ39
AN41
AN45
DMI_ITX_MRX_P0
DMI_ITX_MRX_P1
DMI_ITX_MRX_P2
DMI_ITX_MRX_P3
DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3
AJ46
AJ41
AM40
AM44
DMI_MTX_IRX_N0
DMI_MTX_IRX_N1
DMI_MTX_IRX_N2
DMI_MTX_IRX_N3
DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3
AJ47
AJ42
AM39
AM43
DMI_MTX_IRX_P0
DMI_MTX_IRX_P1
DMI_MTX_IRX_P2
DMI_MTX_IRX_P3
CLK_DREF_96M 16
CLK_DREF_96M# 16
CLK_DREF_SSC 16
CLK_DREF_SSC# 16
2
0_0402_5%
+DIMM_VREF
R335
1K_0402_1%
0.1U_0402_16V4Z
2
@
1
B42
C42
H48
H47
CLK_MCH_3GPLL 16
CLK_MCH_3GPLL# 16
DMI_ITX_MRX_N0
DMI_ITX_MRX_N1
DMI_ITX_MRX_N2
DMI_ITX_MRX_N3
22
22
22
22
DMI_ITX_MRX_P0
DMI_ITX_MRX_P1
DMI_ITX_MRX_P2
DMI_ITX_MRX_P3
22
22
22
22
DMI_MTX_IRX_N0
DMI_MTX_IRX_N1
DMI_MTX_IRX_N2
DMI_MTX_IRX_N3
22
22
22
22
DMI_MTX_IRX_P0
DMI_MTX_IRX_P1
DMI_MTX_IRX_P2
DMI_MTX_IRX_P3
22
22
22
22
CFG[2:0]
CFG5
CFG9
CFG[13:12]
CFG16
CLK_DREF_96M
CLK_DREF_96M#
R193 1
R201 1
2PM@ 0_0402_5%
2PM@ 0_0402_5%
CLK_DREF_SSC
CLK_DREF_SSC#
R235 1
R234 1
2PM@ 0_0402_5%
2PM@ 0_0402_5%
0 = Normal Operation
*(Default)
1 = DMI Lane Reversal Enable
0 = Only PCIE or SDVO is operational.
* (Default)
1 = PCIE/SDVO are operating simu.
CFG19
CFG20
(PCIE/SDVO select)
SDVO_CTRLDATA
* (Default)
+1.25VS_AXD
R218
@ 4.02K_0402_1%
R401
@ 4.02K_0402_1%
R233
@ 4.02K_0402_1%
R212
@ 4.02K_0402_1%
R241
@ 4.02K_0402_1%
R243
@ 4.02K_0402_1%
R237
@ 4.02K_0402_1%
R183
10K_0402_5%
R196
10K_0402_5%
R197
10K_0402_5%
MCH_CFG_9
CL_CLK
CL_DATA
CL_PWROK
CL_RST#
CL_VREF
AM49
AK50
AT43
AN49
AM50
SYS_PWROK
CL_RST#0 22
CL_VREF
MCH_CFG_12
R304
1K_0402_1%
CL_CLK0 22
CL_DATA0 22
MCH_CFG_13
MCH_CFG_16
R305
392_0402_1%
MCH_CFG_19
+3VS
MCH_CFG_20
0.1U_0402_16V4Z
2
SDVO_CTRL_CLK
SDVO_CTRL_DATA
CLK_REQ#
ICH_SYNC#
H35
K36
G39
G40
MCH_CLKREQ#
TEST_1
TEST_2
A37
R32
MCH_TEST_1
MCH_TEST_2
MCH_CLKREQ# 16
MCH_ICH_SYNC# 22
R194
R247
PM_EXTTS#0
+3VS
PM_EXTTS#1
0_0402_5%
20K_0402_5%
MCH_CLKREQ#
PM@
Security Classification
2006/12/25
Issued Date
Deciphered Date
2007/12/25
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
C529
2.2U_0805_10V6K
0.01U_0402_16V7K
+1.8V
CLK
C535
CRESTLINE_1p0
SM_RCOMP_VOL
R433
1K_0402_1%
14
14
15
15
SM_VREF
E35
A39
C38
B39
E36
2.2U_0805_10V6K
0.01U_0402_16V7K
R334
1K_0402_1%
DPLL_REF_CLK
DPLL_REF_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
GFX_VID_0
GFX_VID_1
GFX_VID_2
GFX_VID_3
GFX_VR_EN
C528
R426 1
R425 1
SM_RCOMP_VOH
C534
MUXING
DDR
SM_CKE_0
SM_CKE_1
SM_CKE_3
SM_CKE_4
14
14
15
15
C312 1
NC
16,22,45 VGATE
G41
L39
L36
J36
AW49
AV20
N20
G36
DDRA_CLK0#
DDRA_CLK1#
DDRB_CLK0#
DDRB_CLK1#
+1.05VS
PM
22 PM_BMBUSY#
5,21,45 H_DPRSTP#
14 PM_EXTTS#0
15 PM_EXTTS#1
AW30
BA23
AW25
AW23
R431
1K_0402_1%
MCH_CFG_19
MCH_CFG_20
SM_CK#_0
SM_CK#_1
SM_CK#_3
SM_CK#_4
14
14
15
15
MCH_CFG_16
DDRA_CLK0
DDRA_CLK1
DDRB_CLK0
DDRB_CLK1
MCH_CFG_12
MCH_CFG_13
CFG
MCH_CFG_9
CFG_0
CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8
CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15
CFG_16
CFG_17
CFG_18
CFG_19
CFG_20
AV29
BB23
BA25
AV23
MCH_CFG_5
P27
N27
N24
C21
C23
F23
N23
G23
J20
C20
R24
L23
J23
E23
E20
K23
M20
M24
L32
N33
L35
DMI
MCH_CLKSEL0
MCH_CLKSEL1
MCH_CLKSEL2
16 MCH_CLKSEL0
16 MCH_CLKSEL1
16 MCH_CLKSEL2
SM_CK_0
SM_CK_1
SM_CK_3
SM_CK_4
C354
GRAPHICS VID
RSVD20
RSVD21
RSVD22
RSVD23
RSVD24
RSVD25
RSVD26
RSVD27
RSVD28
RSVD29
RSVD30
RSVD31
RSVD32
RSVD33
RSVD34
RSVD35
RSVD36
RSVD37
RSVD38
RSVD39
RSVD40
RSVD41
RSVD42
RSVD43
RSVD44
RSVD45
ME
DDRA_SMA14
DDRB_SMA14
14 DDRA_SMA14
15 DDRB_SMA14
H10
B51
BJ20
BK22
BF19
BH20
BK18
BJ18
BF23
BG23
BC23
BD24
BJ29
BE24
BH39
AW20
BK20
C48
D47
B44
C44
A35
B37
B36
B34
C34
+1.8V
MISC
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD
P36
P37
R35
N35
AR12
AR13
AM12
AN13
J12
AR37
AM36
AL36
AM37
D20
Title
Rev
1.0
ICL50/ICK70 M/B LA-3551P Schematic
Date:
Sheet
of
49
DDRA_SDQ[0..63]
DDRA_SMA[0..13]
DDRB_SMA[0..13]
15 DDRB_SMA[0..13]
MEMORY
SA_BS_0
SA_BS_1
SA_BS_2
BB19
BK19
BF29
DDRB_SDQ0
DDRB_SDQ1
DDRB_SDQ2
DDRB_SDQ3
DDRB_SDQ4
DDRB_SDQ5
DDRB_SDQ6
DDRB_SDQ7
DDRB_SDQ8
DDRB_SDQ9
DDRB_SDQ10
DDRB_SDQ11
DDRB_SDQ12
DDRB_SDQ13
DDRB_SDQ14
DDRB_SDQ15
DDRB_SDQ16
DDRB_SDQ17
DDRB_SDQ18
DDRB_SDQ19
DDRB_SDQ20
DDRB_SDQ21
DDRB_SDQ22
DDRB_SDQ23
DDRB_SDQ24
DDRB_SDQ25
DDRB_SDQ26
DDRB_SDQ27
DDRB_SDQ28
DDRB_SDQ29
DDRB_SDQ30
DDRB_SDQ31
DDRB_SDQ32
DDRB_SDQ33
DDRB_SDQ34
DDRB_SDQ35
DDRB_SDQ36
DDRB_SDQ37
DDRB_SDQ38
DDRB_SDQ39
DDRB_SDQ40
DDRB_SDQ41
DDRB_SDQ42
DDRB_SDQ43
DDRB_SDQ44
DDRB_SDQ45
DDRB_SDQ46
DDRB_SDQ47
DDRB_SDQ48
DDRB_SDQ49
DDRB_SDQ50
DDRB_SDQ51
DDRB_SDQ52
DDRB_SDQ53
DDRB_SDQ54
DDRB_SDQ55
DDRB_SDQ56
DDRB_SDQ57
DDRB_SDQ58
DDRB_SDQ59
DDRB_SDQ60
DDRB_SDQ61
DDRB_SDQ62
DDRB_SDQ63
DDRA_SBS0# 14
DDRA_SBS1# 14
DDRA_SBS2# 14
SA_CAS#
BL17
SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7
AT45
BD44
BD42
AW38
AW13
BG8
AY5
AN6
DDRA_SDM0
DDRA_SDM1
DDRA_SDM2
DDRA_SDM3
DDRA_SDM4
DDRA_SDM5
DDRA_SDM6
DDRA_SDM7
SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6
SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7
AT46
BE48
BB43
BC37
BB16
BH6
BB2
AP3
AT47
BD47
BC41
BA37
BA16
BH7
BC1
AP2
DDRA_SDQS0
DDRA_SDQS1
DDRA_SDQS2
DDRA_SDQS3
DDRA_SDQS4
DDRA_SDQS5
DDRA_SDQS6
DDRA_SDQS7
DDRA_SDQS0#
DDRA_SDQS1#
DDRA_SDQS2#
DDRA_SDQS3#
DDRA_SDQS4#
DDRA_SDQS5#
DDRA_SDQS6#
DDRA_SDQS7#
SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8
SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
BJ19
BD20
BK27
BH28
BL24
BK28
BJ27
BJ25
BL28
BA28
BC19
BE28
BG30
BJ16
DDRA_SMA0
DDRA_SMA1
DDRA_SMA2
DDRA_SMA3
DDRA_SMA4
DDRA_SMA5
DDRA_SMA6
DDRA_SMA7
DDRA_SMA8
DDRA_SMA9
DDRA_SMA10
DDRA_SMA11
DDRA_SMA12
DDRA_SMA13
SA_RAS#
SA_RCVEN#
BE18
AY20
SA_WE#
BA19
DDRA_SCAS# 14
DDRA_SDQS0
DDRA_SDQS1
DDRA_SDQS2
DDRA_SDQS3
DDRA_SDQS4
DDRA_SDQS5
DDRA_SDQS6
DDRA_SDQS7
DDRA_SDQS0#
DDRA_SDQS1#
DDRA_SDQS2#
DDRA_SDQS3#
DDRA_SDQS4#
DDRA_SDQS5#
DDRA_SDQS6#
DDRA_SDQS7#
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
DDRA_SRAS# 14
PAD
T13
SA_RCVEN#
@
DDRA_SWE# 14
AP49
AR51
AW50
AW51
AN51
AN50
AV50
AV49
BA50
BB50
BA49
BE50
BA51
AY49
BF50
BF49
BJ50
BJ44
BJ43
BL43
BK47
BK49
BK43
BK42
BJ41
BL41
BJ37
BJ36
BK41
BJ40
BL35
BK37
BK13
BE11
BK11
BC11
BC13
BE12
BC12
BG12
BJ10
BL9
BK5
BL5
BK9
BK10
BJ8
BJ6
BF4
BH5
BG1
BC2
BK3
BE4
BD3
BJ2
BA3
BB3
AR1
AT3
AY2
AY3
AU2
AT2
SB_DQ_0
SB_DQ_1
SB_DQ_2
SB_DQ_3
SB_DQ_4
SB_DQ_5
SB_DQ_6
SB_DQ_7
SB_DQ_8
SB_DQ_9
SB_DQ_10
SB_DQ_11
SB_DQ_12
SB_DQ_13
SB_DQ_14
SB_DQ_15
SB_DQ_16
SB_DQ_17
SB_DQ_18
SB_DQ_19
SB_DQ_20
SB_DQ_21
SB_DQ_22
SB_DQ_23
SB_DQ_24
SB_DQ_25
SB_DQ_26
SB_DQ_27
SB_DQ_28
SB_DQ_29
SB_DQ_30
SB_DQ_31
SB_DQ_32
SB_DQ_33
SB_DQ_34
SB_DQ_35
SB_DQ_36
SB_DQ_37
SB_DQ_38
SB_DQ_39
SB_DQ_40
SB_DQ_41
SB_DQ_42
SB_DQ_43
SB_DQ_44
SB_DQ_45
SB_DQ_46
SB_DQ_47
SB_DQ_48
SB_DQ_49
SB_DQ_50
SB_DQ_51
SB_DQ_52
SB_DQ_53
SB_DQ_54
SB_DQ_55
SB_DQ_56
SB_DQ_57
SB_DQ_58
SB_DQ_59
SB_DQ_60
SB_DQ_61
SB_DQ_62
SB_DQ_63
CRESTLINE_1p0
CRESTLINE_1p0
PM@
PM@
U23E
SYSTEM
SA_DQ_0
SA_DQ_1
SA_DQ_2
SA_DQ_3
SA_DQ_4
SA_DQ_5
SA_DQ_6
SA_DQ_7
SA_DQ_8
SA_DQ_9
SA_DQ_10
SA_DQ_11
SA_DQ_12
SA_DQ_13
SA_DQ_14
SA_DQ_15
SA_DQ_16
SA_DQ_17
SA_DQ_18
SA_DQ_19
SA_DQ_20
SA_DQ_21
SA_DQ_22
SA_DQ_23
SA_DQ_24
SA_DQ_25
SA_DQ_26
SA_DQ_27
SA_DQ_28
SA_DQ_29
SA_DQ_30
SA_DQ_31
SA_DQ_32
SA_DQ_33
SA_DQ_34
SA_DQ_35
SA_DQ_36
SA_DQ_37
SA_DQ_38
SA_DQ_39
SA_DQ_40
SA_DQ_41
SA_DQ_42
SA_DQ_43
SA_DQ_44
SA_DQ_45
SA_DQ_46
SA_DQ_47
SA_DQ_48
SA_DQ_49
SA_DQ_50
SA_DQ_51
SA_DQ_52
SA_DQ_53
SA_DQ_54
SA_DQ_55
SA_DQ_56
SA_DQ_57
SA_DQ_58
SA_DQ_59
SA_DQ_60
SA_DQ_61
SA_DQ_62
SA_DQ_63
DDR
AR43
AW44
BA45
AY46
AR41
AR45
AT42
AW47
BB45
BF48
BG47
BJ45
BB47
BG50
BH49
BE45
AW43
BE44
BG42
BE40
BF44
BH45
BG40
BF40
AR40
AW40
AT39
AW36
AW41
AY41
AV38
AT38
AV13
AT13
AW11
AV11
AU15
AT11
BA13
BA11
BE10
BD10
BD8
AY9
BG10
AW9
BD7
BB9
BB5
AY7
AT5
AT7
AY6
BB7
AR5
AR8
AR9
AN3
AM8
AN10
AT9
AN9
AM9
AN11
U23D
DDRA_SDQ0
DDRA_SDQ1
DDRA_SDQ2
DDRA_SDQ3
DDRA_SDQ4
DDRA_SDQ5
DDRA_SDQ6
DDRA_SDQ7
DDRA_SDQ8
DDRA_SDQ9
DDRA_SDQ10
DDRA_SDQ11
DDRA_SDQ12
DDRA_SDQ13
DDRA_SDQ14
DDRA_SDQ15
DDRA_SDQ16
DDRA_SDQ17
DDRA_SDQ18
DDRA_SDQ19
DDRA_SDQ20
DDRA_SDQ21
DDRA_SDQ22
DDRA_SDQ23
DDRA_SDQ24
DDRA_SDQ25
DDRA_SDQ26
DDRA_SDQ27
DDRA_SDQ28
DDRA_SDQ29
DDRA_SDQ30
DDRA_SDQ31
DDRA_SDQ32
DDRA_SDQ33
DDRA_SDQ34
DDRA_SDQ35
DDRA_SDQ36
DDRA_SDQ37
DDRA_SDQ38
DDRA_SDQ39
DDRA_SDQ40
DDRA_SDQ41
DDRA_SDQ42
DDRA_SDQ43
DDRA_SDQ44
DDRA_SDQ45
DDRA_SDQ46
DDRA_SDQ47
DDRA_SDQ48
DDRA_SDQ49
DDRA_SDQ50
DDRA_SDQ51
DDRA_SDQ52
DDRA_SDQ53
DDRA_SDQ54
DDRA_SDQ55
DDRA_SDQ56
DDRA_SDQ57
DDRA_SDQ58
DDRA_SDQ59
DDRA_SDQ60
DDRA_SDQ61
DDRA_SDQ62
DDRA_SDQ63
MEMORY
14 DDRA_SMA[0..13]
DDRB_SDM[0..7]
15 DDRB_SDM[0..7]
SYSTEM
DDRB_SDQ[0..63]
15 DDRB_SDQ[0..63]
DDRA_SDM[0..7]
14 DDRA_SDM[0..7]
DDR
14 DDRA_SDQ[0..63]
SB_BS_0
SB_BS_1
SB_BS_2
AY17
BG18
BG36
DDRB_SBS0# 15
DDRB_SBS1# 15
DDRB_SBS2# 15
SB_CAS#
BE17
SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7
AR50
BD49
BK45
BL39
BH12
BJ7
BF3
AW2
DDRB_SDM0
DDRB_SDM1
DDRB_SDM2
DDRB_SDM3
DDRB_SDM4
DDRB_SDM5
DDRB_SDM6
DDRB_SDM7
SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6
SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7
AT50
BD50
BK46
BK39
BJ12
BL7
BE2
AV2
AU50
BC50
BL45
BK38
BK12
BK7
BF2
AV3
DDRB_SDQS0
DDRB_SDQS1
DDRB_SDQS2
DDRB_SDQS3
DDRB_SDQS4
DDRB_SDQS5
DDRB_SDQS6
DDRB_SDQS7
DDRB_SDQS0#
DDRB_SDQS1#
DDRB_SDQS2#
DDRB_SDQS3#
DDRB_SDQS4#
DDRB_SDQS5#
DDRB_SDQS6#
DDRB_SDQS7#
SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8
SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
BC18
BG28
BG25
AW17
BF25
BE25
BA29
BC28
AY28
BD37
BG17
BE37
BA39
BG13
DDRB_SMA0
DDRB_SMA1
DDRB_SMA2
DDRB_SMA3
DDRB_SMA4
DDRB_SMA5
DDRB_SMA6
DDRB_SMA7
DDRB_SMA8
DDRB_SMA9
DDRB_SMA10
DDRB_SMA11
DDRB_SMA12
DDRB_SMA13
SB_RAS#
SB_RCVEN#
AV16
AY18
SB_WE#
BC17
DDRB_SCAS# 15
DDRB_SDQS0
DDRB_SDQS1
DDRB_SDQS2
DDRB_SDQS3
DDRB_SDQS4
DDRB_SDQS5
DDRB_SDQS6
DDRB_SDQS7
DDRB_SDQS0#
DDRB_SDQS1#
DDRB_SDQS2#
DDRB_SDQS3#
DDRB_SDQS4#
DDRB_SDQS5#
DDRB_SDQS6#
DDRB_SDQS7#
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
DDRB_SRAS# 15
PAD
T14
SB_RCVEN#
@
DDRB_SWE# 15
Security Classification
2006/12/25
Issued Date
Deciphered Date
2007/12/25
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
Document Number
Rev
1.0
ICL50/ICK70 M/B LA-3551P Schematic
Wednesday, August 15, 2007
Sheet
1
of
49
U23C
18 GMCH_LCD_CLK
18 GMCH_LCD_DATA
18 GMCH_ENVDD
R236
LVDS_IBG
2.4K_0402_1%
GMCH_TXCLKGMCH_TXCLK+
GMCH_TZCLKGMCH_TZCLK+
R171
GMCH_TXOUT0GMCH_TXOUT1GMCH_TXOUT2-
G51
E51
F49
LVDSA_DATA#_0
LVDSA_DATA#_1
LVDSA_DATA#_2
GMCH_TXOUT0+
GMCH_TXOUT1+
GMCH_TXOUT2+
G50
E50
F48
LVDSA_DATA_0
LVDSA_DATA_1
LVDSA_DATA_2
GMCH_TZOUT0GMCH_TZOUT1GMCH_TZOUT2-
G44
B47
B45
LVDSB_DATA#_0
LVDSB_DATA#_1
LVDSB_DATA#_2
GMCH_TZOUT0+
GMCH_TZOUT1+
GMCH_TZOUT2+
E44
A47
A45
LVDSB_DATA_0
LVDSB_DATA_1
LVDSB_DATA_2
GMCH_TV_COMPS
GMCH_TV_LUMA
GMCH_TV_CRMA
E27
G27
K27
TVA_DAC
TVB_DAC
TVC_DAC
F27
J27
L27
TVA_RTN
TVB_RTN
TVC_RTN
M35
P33
TV_DCONSEL_0
TV_DCONSEL_1
R170
TV_DCONSEL_0
TV_DCONSEL_1
GM@
GM@
150_0402_1%
150_0402_1%
GM@
150_0402_1%
LVDS_IBG
LVDS_VBG
LVDS_VREFH
LVDS_VREFL
LVDSA_CLK#
LVDSA_CLK
LVDSB_CLK#
LVDSB_CLK
2
R222
GMCH_TXCLKGMCH_TXCLK+
GMCH_TZCLKGMCH_TZCLK+
L41
L43
N41
N40
D46
C45
D44
E42
TV
19 GMCH_TV_COMPS
19 GMCH_TV_LUMA
19 GMCH_TV_CRMA
L_BKLT_CTRL
L_BKLT_EN
L_CTRL_CLK
L_CTRL_DATA
L_DDC_CLK
L_DDC_DATA
L_VDD_EN
LVDS
18
18
18
18
J40
H39
E39
E40
C37
D35
K40
GRAPHICS
ENBKL
LBKLT_EN
LCTLA_CLK
LCTLB_DATA
GMCH_LCD_CLK
GMCH_LCD_DATA
PCI-EXPRESS
17,30
18 DPST_PWM
1
2
R182 GM@ 0_0402_5%
19 GMCH_CRT_R
H32
G32
K29
J29
F29
E29
1
GM@ 150_0402_1%
1
GM@ 150_0402_1%
1
GM@ 150_0402_1%
CRT_BLUE
CRT_BLUE#
CRT_GREEN
CRT_GREEN#
CRT_RED
CRT_RED#
GMCH_CRT_CLK
GMCH_CRT_DATA
19 GMCH_CRT_CLK
19 GMCH_CRT_DATA
19 GMCH_CRT_HSYNC
CRT_IREF
R390 1
2 10K_0402_5%
GMCH_LCD_CLK
R389 1
2 10K_0402_5%
GMCH_LCD_DATA
R187 1
2 10K_0402_5%
LCTLB_DATA
R188 1
2 10K_0402_5%
LCTLA_CLK
R173 1
2 2.2K_0402_5%
GMCH_CRT_CLK
R172 1
2 2.2K_0402_5%
GMCH_CRT_DATA
R174
@ 2.2K_0402_5%
TV_DCONSEL_0
R192
@ 2.2K_0402_5%
TV_DCONSEL_1
J51
L51
N47
T45
T50
U40
Y44
Y40
AB51
W49
AD44
AD40
AG46
AH49
AG45
AG41
PCIE_GTX_C_MRX_N0
PCIE_GTX_C_MRX_N1
PCIE_GTX_C_MRX_N2
PCIE_GTX_C_MRX_N3
PCIE_GTX_C_MRX_N4
PCIE_GTX_C_MRX_N5
PCIE_GTX_C_MRX_N6
PCIE_GTX_C_MRX_N7
PCIE_GTX_C_MRX_N8
PCIE_GTX_C_MRX_N9
PCIE_GTX_C_MRX_N10
PCIE_GTX_C_MRX_N11
PCIE_GTX_C_MRX_N12
PCIE_GTX_C_MRX_N13
PCIE_GTX_C_MRX_N14
PCIE_GTX_C_MRX_N15
PEG_RX_0
PEG_RX_1
PEG_RX_2
PEG_RX_3
PEG_RX_4
PEG_RX_5
PEG_RX_6
PEG_RX_7
PEG_RX_8
PEG_RX_9
PEG_RX_10
PEG_RX_11
PEG_RX_12
PEG_RX_13
PEG_RX_14
PEG_RX_15
J50
L50
M47
U44
T49
T41
W45
W41
AB50
Y48
AC45
AC41
AH47
AG49
AH45
AG42
PCIE_GTX_C_MRX_P0
PCIE_GTX_C_MRX_P1
PCIE_GTX_C_MRX_P2
PCIE_GTX_C_MRX_P3
PCIE_GTX_C_MRX_P4
PCIE_GTX_C_MRX_P5
PCIE_GTX_C_MRX_P6
PCIE_GTX_C_MRX_P7
PCIE_GTX_C_MRX_P8
PCIE_GTX_C_MRX_P9
PCIE_GTX_C_MRX_P10
PCIE_GTX_C_MRX_P11
PCIE_GTX_C_MRX_P12
PCIE_GTX_C_MRX_P13
PCIE_GTX_C_MRX_P14
PCIE_GTX_C_MRX_P15
PEG_TX#_0
PEG_TX#_1
PEG_TX#_2
PEG_TX#_3
PEG_TX#_4
PEG_TX#_5
PEG_TX#_6
PEG_TX#_7
PEG_TX#_8
PEG_TX#_9
PEG_TX#_10
PEG_TX#_11
PEG_TX#_12
PEG_TX#_13
PEG_TX#_14
PEG_TX#_15
N45
U39
U47
N51
R50
T42
Y43
W46
W38
AD39
AC46
AC49
AC42
AH39
AE49
AH44
PCIE_MTX_GRX_N0
PCIE_MTX_GRX_N1
PCIE_MTX_GRX_N2
PCIE_MTX_GRX_N3
PCIE_MTX_GRX_N4
PCIE_MTX_GRX_N5
PCIE_MTX_GRX_N6
PCIE_MTX_GRX_N7
PCIE_MTX_GRX_N8
PCIE_MTX_GRX_N9
PCIE_MTX_GRX_N10
PCIE_MTX_GRX_N11
PCIE_MTX_GRX_N12
PCIE_MTX_GRX_N13
PCIE_MTX_GRX_N14
PCIE_MTX_GRX_N15
PEG_TX_0
PEG_TX_1
PEG_TX_2
PEG_TX_3
PEG_TX_4
PEG_TX_5
PEG_TX_6
PEG_TX_7
PEG_TX_8
PEG_TX_9
PEG_TX_10
PEG_TX_11
PEG_TX_12
PEG_TX_13
PEG_TX_14
PEG_TX_15
M45
T38
T46
N50
R51
U43
W42
Y47
Y39
AC38
AD47
AC50
AD43
AG39
AE50
AH43
PCIE_MTX_GRX_P0
PCIE_MTX_GRX_P1
PCIE_MTX_GRX_P2
PCIE_MTX_GRX_P3
PCIE_MTX_GRX_P4
PCIE_MTX_GRX_P5
PCIE_MTX_GRX_P6
PCIE_MTX_GRX_P7
PCIE_MTX_GRX_P8
PCIE_MTX_GRX_P9
PCIE_MTX_GRX_P10
PCIE_MTX_GRX_P11
PCIE_MTX_GRX_P12
PCIE_MTX_GRX_P13
PCIE_MTX_GRX_P14
PCIE_MTX_GRX_P15
R177
0_0402_5%
PM@
R195
1.3K_0402_1%
10mils
C188 1
C201 1
C217 1
C240 1
C252 1
C270 1
C285 1
C304 1
C180 1
C198 1
C214 1
C232 1
C248 1
C263 1
C283 1
C297 1
24.9_0402_1%
+1.05VS
PCIE_MTX_C_GRX_N[0..15]
PCIE_MTX_C_GRX_N[0..15] 17
PCIE_MTX_C_GRX_P[0..15]
PCIE_MTX_C_GRX_P[0..15] 17
PCIE_GTX_C_MRX_N[0..15]
PCIE_GTX_C_MRX_N[0..15] 17
PCIE_GTX_C_MRX_P[0..15]
PCIE_GTX_C_MRX_P[0..15] 17
C179
2 PM@ 0.1U_0402_16V7K
C195
2 PM@ 0.1U_0402_16V7K
C212
2 PM@ 0.1U_0402_16V7K
C229
2 PM@ 0.1U_0402_16V7K
C246
2 PM@ 0.1U_0402_16V7K
C261
2 PM@ 0.1U_0402_16V7K
C277
2 PM@ 0.1U_0402_16V7K
C296
2 PM@ 0.1U_0402_16V7K
C176
2 PM@ 0.1U_0402_16V7K
C189
PM@
0.1U_0402_16V7K
2
C204
2 PM@ 0.1U_0402_16V7K
C219
PM@
0.1U_0402_16V7K
2
C241
2 PM@ 0.1U_0402_16V7K
C253
2 PM@ 0.1U_0402_16V7K
C272
2 PM@ 0.1U_0402_16V7K
C288
2 PM@ 0.1U_0402_16V7K
1
1
1
1
1
1
1
1
1
1
1
1
1
1
CRESTLINE_1p0
R175
0_0402_5%
PM@
+3VS
CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_TVO_IREF
CRT_VSYNC
PEG_RX#_0
PEG_RX#_1
PEG_RX#_2
PEG_RX#_3
PEG_RX#_4
PEG_RX#_5
PEG_RX#_6
PEG_RX#_7
PEG_RX#_8
PEG_RX#_9
PEG_RX#_10
PEG_RX#_11
PEG_RX#_12
PEG_RX#_13
PEG_RX#_14
PEG_RX#_15
19 GMCH_CRT_VSYNC
K33
G35
F33
C32
E33
1
R240
N43
M43
VGA
2
R179
2
R176
2
R178
19 GMCH_CRT_G
PEG_COMP
PEG_COMPI
PEG_COMPO
PM@
R181 1
2 100K_0402_5%
LBKLT_EN
Security Classification
2006/12/25
Issued Date
Deciphered Date
2007/12/25
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
Rev
1.0
ICL50/ICK70 M/B LA-3551P Schematic
Date:
Sheet
1
10
of
49
U23G
+VGFX_CORE
B
AW45
BC39
BE39
BD17
BD4
AW8
AT6
+1.05VS
+1.05VS
1
C501
C264
C289
C269
C255
220U_D2_2VMR15
0.22U_0603_16V7K
0.1U_0402_16V4Z
2
2
2
@
10U_0805_10V4Z
0.22U_0603_16V7K
C361
C628
VCC_SM: 2400mA
(330UF*1, 22UF*2, 0.1UF*1)
+1.8V
C524
0.1U_0402_16V4Z
2
2
0.1U_0402_16V4Z
1
1
C356
C355
C346
330U_D2E_2.5VM
10U_0805_10V4Z
2
2
2
2
10U_0805_10V4Z
0.1U_0402_16V4Z
VCC_AXG: 7700mA
(330UF*2, 22UF*1, 10UF*1, 1U*1, 0.47U*1, 0.1UF*2)
+VGFX_CORE
1
R518
1
R519
1
R520
+1.05VS
2
GM@ 0_1206_5%
2
GM@ 0_1206_5%
2
GM@ 0_1206_5%
C218
C278
C302 1
C276 1
C293
330U_D2E_2.5VM
10U_0805_10V4Z
1U_0402_6.3V4Z
2
2
2
GM@
GM@ 2
GM@
330U_D2E_2.5VM
10U_0805_10V4Z
GM@
GM@
R255
0_0603_5%
PM@
C273
C267 1
C303 1
VCC_AXM: 540mA
(22UF*2, 0.22UF*2, 0.1UF*2)
+1.05VS
C316
C325
C322
C311
C317
C318
10U_0805_10V4Z
0.22U_0603_16V7K
0.1U_0402_16V4Z
2
2
2
2
0.22U_0603_16V7K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+1.05VS
C637
C638
C639
C351
C352
C353
C350
VSS_SCB1
VSS_SCB2
VSS_SCB3
VSS_SCB4
VSS_SCB5
VSS_SCB6
A3
B2
C1
BL1
BL51
A51
VCC_AXM_1
VCC_AXM_2
VCC_AXM_3
VCC_AXM_4
VCC_AXM_5
VCC_AXM_6
VCC_AXM_7
AT33
AT31
AK29
AK24
AK23
AJ26
AJ23
+1.05VS
CRESTLINE_1p0
PM@
FOR EMI
C338
VCC_AXM_NCTF_1
VCC_AXM_NCTF_2
VCC_AXM_NCTF_3
VCC_AXM_NCTF_4
VCC_AXM_NCTF_5
VCC_AXM_NCTF_6
VCC_AXM_NCTF_7
VCC_AXM_NCTF_8
VCC_AXM_NCTF_9
VCC_AXM_NCTF_10
VCC_AXM_NCTF_11
VCC_AXM_NCTF_12
VCC_AXM_NCTF_13
VCC_AXM_NCTF_14
VCC_AXM_NCTF_15
VCC_AXM_NCTF_16
VCC_AXM_NCTF_17
VCC_AXM_NCTF_18
VCC_AXM_NCTF_19
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
0.1U_0402_16V4Z
VCCSM_LF1
VCCSM_LF2
VCCSM_LF3
VCCSM_LF4
VCCSM_LF5
VCCSM_LF6
VCCSM_LF7
1
C339
AL24
AL26
AL28
AM26
AM28
AM29
AM31
AM32
AM33
AP29
AP31
AP32
AP33
AL29
AL31
AL32
AR31
AR32
AR33
T27
T37
U24
U28
V31
V35
AA19
AB17
AB35
AD19
AD37
AF17
AF35
AK17
AM17
AM24
AP26
AP28
AR15
AR19
AR28
POWER
0.1U_0402_16V4Z
2
2
GM@
0.47U_0603_16V4Z
0.1U_0402_16V4Z
GM@
GM@
+1.05VS
VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
C337
0.1U_0402_16V4Z
0.22U_0603_16V7K
0.47U_0603_16V4Z
1U_0402_6.3V4Z
2
2
0.1U_0402_16V4Z
0.22U_0603_16V7K
1U_0402_6.3V4Z
Issued Date
Security Classification
CRESTLINE_1p0
2006/12/25
Deciphered Date
2007/12/25
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
PM@
+1.05VS
VCC_NCTF_1
VCC_NCTF_2
VCC_NCTF_3
VCC_NCTF_4
VCC_NCTF_5
VCC_NCTF_6
VCC_NCTF_7
VCC_NCTF_8
VCC_NCTF_9
VCC_NCTF_10
VCC_NCTF_11
VCC_NCTF_12
VCC_NCTF_13
VCC_NCTF_14
VCC_NCTF_15
VCC_NCTF_16
VCC_NCTF_17
VCC_NCTF_18
VCC_NCTF_19
VCC_NCTF_20
VCC_NCTF_21
VCC_NCTF_22
VCC_NCTF_23
VCC_NCTF_24
VCC_NCTF_25
VCC_NCTF_26
VCC_NCTF_27
VCC_NCTF_28
VCC_NCTF_29
VCC_NCTF_30
VCC_NCTF_31
VCC_NCTF_32
VCC_NCTF_33
VCC_NCTF_34
VCC_NCTF_35
VCC_NCTF_36
VCC_NCTF_37
VCC_NCTF_38
VCC_NCTF_39
VCC_NCTF_40
VCC_NCTF_41
VCC_NCTF_42
VCC_NCTF_43
VCC_NCTF_44
VCC_NCTF_45
VCC_NCTF_46
VCC_NCTF_47
VCC_NCTF_48
VCC_NCTF_49
VCC_NCTF_50
VSS NCTF
VCC_SM_LF1
VCC_SM_LF2
VCC_SM_LF3
VCC_SM_LF4
VCC_SM_LF5
VCC_SM_LF6
VCC_SM_LF7
VCC: 1300mA
(220UF*1, 22UF*1, 0.22UF*1, 0.1UF*1)
AB33
AB36
AB37
AC33
AC35
AC36
AD35
AD36
AF33
AF36
AH33
AH35
AH36
AH37
AJ33
AJ35
AK33
AK35
AK36
AK37
AD33
AJ36
AM35
AL33
AL35
AA33
AA35
AA36
AP35
AP36
AR35
AR36
Y32
Y33
Y35
Y36
Y37
T30
T34
T35
U29
U31
U32
U33
U35
U36
V32
V33
V36
V37
VSS SCB
VCC_AXG_1
VCC_AXG_2
VCC_AXG_3
VCC_AXG_4
VCC_AXG_5
VCC_AXG_6
VCC_AXG_7
VCC_AXG_8
VCC_AXG_9
VCC_AXG_10
VCC_AXG_11
VCC_AXG_12
VCC_AXG_13
VCC_AXG_14
VCC_AXG_15
VCC_AXG_16
VCC_AXG_17
VCC_AXG_18
VCC_AXG_19
VCC_AXG_20
VCC_AXG_21
VCC_AXG_22
VCC_AXG_23
VCC_AXG_24
VCC_AXG_25
VCC_AXG_26
VCC_AXG_27
VCC_AXG_28
VCC_AXG_29
VCC_AXG_30
VCC_AXG_31
VCC_AXG_32
VCC_AXG_33
VCC_AXG_34
+1.05VS
VCC AXM
R20
T14
W13
W14
Y12
AA20
AA23
AA26
AA28
AB21
AB24
AB29
AC20
AC21
AC23
AC24
AC26
AC28
AC29
AD20
AD23
AD24
AD28
AF21
AF26
AA31
AH20
AH21
AH23
AH24
AH26
AD31
AJ20
AN14
VCC_SM_1
VCC_SM_2
VCC_SM_3
VCC_SM_4
VCC_SM_5
VCC_SM_6
VCC_SM_7
VCC_SM_8
VCC_SM_9
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_SM_13
VCC_SM_14
VCC_SM_15
VCC_SM_16
VCC_SM_17
VCC_SM_18
VCC_SM_19
VCC_SM_20
VCC_SM_21
VCC_SM_22
VCC_SM_23
VCC_SM_24
VCC_SM_25
VCC_SM_26
VCC_SM_27
VCC_SM_28
VCC_SM_29
VCC_SM_30
VCC_SM_31
VCC_SM_32
VCC_SM_33
VCC_SM_34
VCC_SM_35
VCC_SM_36
VCC GFX
AU32
AU33
AU35
AV33
AW33
AW35
AY35
BA32
BA33
BA35
BB33
BC32
BC33
BC35
BD32
BD35
BE32
BE33
BE35
BF33
BF34
BG32
BG33
BG35
BH32
BH34
BH35
BJ32
BJ33
BJ34
BK32
BK33
BK34
BK35
BL33
AU30
VCC SM
POWER
+1.8V
+VGFX_CORE
VCC NCTF
VCC_13
T17
T18
T19
T21
T22
T23
T25
U15
U16
U17
U19
U20
U21
U23
U26
V16
V17
V19
V20
V21
V23
V24
Y15
Y16
Y17
Y19
Y20
Y21
Y23
Y24
Y26
Y28
Y29
AA16
AA17
AB16
AB19
AC16
AC17
AC19
AD15
AD16
AD17
AF16
AF19
AH15
AH16
AH17
AH19
AJ16
AJ17
AJ19
AK16
AK19
AL16
AL17
AL19
AL20
AL21
AL23
AM15
AM16
AM19
AM20
AM21
AM23
AP15
AP16
AP17
AP19
AP20
AP21
AP23
AP24
AR20
AR21
AR23
AR24
AR26
V26
V28
V29
Y31
R30
U23F
VCC_AXG_NCTF_1
VCC_AXG_NCTF_2
VCC_AXG_NCTF_3
VCC_AXG_NCTF_4
VCC_AXG_NCTF_5
VCC_AXG_NCTF_6
VCC_AXG_NCTF_7
VCC_AXG_NCTF_8
VCC_AXG_NCTF_9
VCC_AXG_NCTF_10
VCC_AXG_NCTF_11
VCC_AXG_NCTF_12
VCC_AXG_NCTF_13
VCC_AXG_NCTF_14
VCC_AXG_NCTF_15
VCC_AXG_NCTF_16
VCC_AXG_NCTF_17
VCC_AXG_NCTF_18
VCC_AXG_NCTF_19
VCC_AXG_NCTF_20
VCC_AXG_NCTF_21
VCC_AXG_NCTF_22
VCC_AXG_NCTF_23
VCC_AXG_NCTF_24
VCC_AXG_NCTF_25
VCC_AXG_NCTF_26
VCC_AXG_NCTF_27
VCC_AXG_NCTF_28
VCC_AXG_NCTF_29
VCC_AXG_NCTF_30
VCC_AXG_NCTF_31
VCC_AXG_NCTF_32
VCC_AXG_NCTF_33
VCC_AXG_NCTF_34
VCC_AXG_NCTF_35
VCC_AXG_NCTF_36
VCC_AXG_NCTF_37
VCC_AXG_NCTF_38
VCC_AXG_NCTF_39
VCC_AXG_NCTF_40
VCC_AXG_NCTF_41
VCC_AXG_NCTF_42
VCC_AXG_NCTF_43
VCC_AXG_NCTF_44
VCC_AXG_NCTF_45
VCC_AXG_NCTF_46
VCC_AXG_NCTF_47
VCC_AXG_NCTF_48
VCC_AXG_NCTF_49
VCC_AXG_NCTF_50
VCC_AXG_NCTF_51
VCC_AXG_NCTF_52
VCC_AXG_NCTF_53
VCC_AXG_NCTF_54
VCC_AXG_NCTF_55
VCC_AXG_NCTF_56
VCC_AXG_NCTF_57
VCC_AXG_NCTF_58
VCC_AXG_NCTF_59
VCC_AXG_NCTF_60
VCC_AXG_NCTF_61
VCC_AXG_NCTF_62
VCC_AXG_NCTF_63
VCC_AXG_NCTF_64
VCC_AXG_NCTF_65
VCC_AXG_NCTF_66
VCC_AXG_NCTF_67
VCC_AXG_NCTF_68
VCC_AXG_NCTF_69
VCC_AXG_NCTF_70
VCC_AXG_NCTF_71
VCC_AXG_NCTF_72
VCC_AXG_NCTF_73
VCC_AXG_NCTF_74
VCC_AXG_NCTF_75
VCC_AXG_NCTF_76
VCC_AXG_NCTF_77
VCC_AXG_NCTF_78
VCC_AXG_NCTF_79
VCC_AXG_NCTF_80
VCC_AXG_NCTF_81
VCC_AXG_NCTF_82
VCC_AXG_NCTF_83
VCC SM LF
VCC_1
VCC_2
VCC_3
VCC_5
VCC_4
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC CORE
AT35
AT34
AH28
AC32
AC31
AK32
AJ31
AJ28
AH32
AH31
AH29
AF32
+1.05VS
Document Number
Rev
1.0
ICL50/ICK70 M/B LA-3551P Schematic
Wednesday, August 15, 2007
Sheet
11
1
of
49
B49
VCCA_DPLLA
+1.25VS_DPLLB
H49
VCCA_DPLLB
+1.25VS_HPLL
AL2
VCCA_HPLL
+1.25VS_MPLL
AM2
VCCA_MPLL
VCCA_LVDS: 10mA
(0.1UF*1)
A41
VCCA_LVDS
B41
VSSA_LVDS
K50
VCCA_PEG_BG
K49
VSSA_PEG_BG
U51
VCCA_PEG_PLL
+3VS
C243
0.1U_0402_16V4Z
2
VCCA_PEG_BG: 5mA
(0.1UF*1)
L41 1
2 +1.25VS_A_PEGPLL
MBK1608121YZF_0603
1
C260
2
1
C513
R254
1_0603_5%
VCCA_PEG_PLL:
10U_0805_10V4Z
0.1U_0402_16V4Z
(0.1UF*1)
2
+1.25VS_A_SM
+1.25VS
+1.25VS
+3VS_SYNC
R239
1 R314
0_0603_5%
1
C336
100mA
VCCA_SM
(22UF*21, 4.7UF*1, 1UF*1)
C320
C321
C340
4.7U_0805_10V4Z
0_0402_5% 1
GM@ C234
0.1U_0402_16V4Z
2
GM@
R219
0_0402_5%
PM@
+1.25VS_A_SM_CK
+1.25VS
R339
0_0603_5% 1
C364
1U_0402_6.3V4Z
VCCA_SM_CK
(22UF*1, 1UF*2, 0.1UF*1)
C358
C360
+3VS
220U_D2_2VMR15
2
GM@
B
C205
0.1U_0402_16V4Z
2
GM@
0.022U_0402_16V7K
GM@
R198
0_0402_5%
PM@
L15 1
2
MBK1608121YZF_0603
GM@
1
C202
+3VS
+3VS_A_TVDAC
+1.5VS_TV
+1.5VS_CRT
C244
C209
0.1U_0402_16V4Z
2
0.022U_0402_16V7K
+1.25VS
1
C661
C662
R190
C315
0_0402_5%
0.1U_0402_16V4Z
10U_0805_10V4Z
2
2 GM@
GM@
GM@
GM@
0.022U_0402_16V7K
4.7U_0805_10V4Z
0.1U_0402_16V4Z
2
PM@
VCCA_PEG_PLL: 100mA
(0.1UF*1)
+1.25VS_A_PEGPLL
1
C265
+3VS_A_TVDAC +1.8V
+3VS
1
1
1
C493
C486
C491
C500
C494
C487
GM@
GM@
GM@
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
2
10U_0805_10V4Z
GM@
0.022U_0402_16V7K
0.022U_0402_16V7K
0.022U_0402_16V7K
GM@
GM@
GM@
+1.5VS_TV
L13 1
2
MBK1608121YZF_0603
+1.5VS
R244
0_0402_5%
GM@
1
C636
+1.5VS_CRT
220U_D2_2VMR15
2
GM@
+1.5VS
R249
0_0402_5%
PM@
VCCA_SM_7
VCCA_SM_8
VCCA_SM_9
VCCA_SM_10
VCCA_SM_11
VCCA_SM_NCTF_1
VCCA_SM_NCTF_2
BC29
BB29
VCCA_SM_CK_1
VCCA_SM_CK_2
VCCA_TVA_DAC_1
VCCA_TVA_DAC_2
VCCA_TVB_DAC_1
VCCA_TVB_DAC_2
VCCA_TVC_DAC_1
VCCA_TVC_DAC_2
M32
L29
VCCD_CRT
VCCD_TVDAC
VCCD_QDAC: 5mA
(0.1UF*1, 0.022UF*1)
2
L17 1
MBK1608121YZF_0603
1
C210
GM@
N28
VCCD_QDAC
AN2
VCCD_HPLL
U48
VCCD_PEG_PLL
J41
H42
VCCD_LVDS_1
VCCD_LVDS_2
R393
0_0402_5%
PM@
0_0402_5%
GM@
1
C257
R421
C324
C490
0_0603_5%
+1.25VS
C489
C314
0.1U_0402_16V4Z
2
+1.8V_SM_CK
BK24
BK23
BJ24
BJ23
VCC_TX_LVDS
+1.8V_TX_LVDS:
(220UF*1, 1000PF*1)
A43
C532
1
2
+1.8V
L45
MBK1608121YZF_0603
C530
1
2
C359
10U_0805_10V4Z
10U_0805_10V4Z
R430
2
2
1_0603_5%
100mA
+1.8V_TX_LVDS
0.1U_0402_16V4Z
L39
2
1
+1.8V
KC FBM-L11-201209-221LMAT_0805
GM@
R405
0_0402_5%
PM@
VCC_HV: 100mA
C40
B40
+3VS
C499
2
GM@
1000P_0402_50V7K
AD51
W50
W51
V49
V50
+1.05VS_PEG
1
AH50
AH51
C284
C275
+1.05VS_PEG
C517
C505
C496
C516
0.47U_0603_16V4Z
2
10U_0805_10V4Z
R217
0_0402_5%
PM@
+3VS
D23
+1.05VS
R402
RB751V_SOD323
VCCD_LVDS: 150mA
(10UF*1, 0.1UF*1)
220U_D2_2VMR15
2
2
10U_0805_10V4Z
VTTLF_CAP1
A7
VTTLF_CAP2
F2
AH1 VTTLF_CAP3
C250
+3VS
0.1U_0402_16V4Z
2
10_0603_5%
+1.5VS_QDAC
C251
0.1U_0402_16V4Z
2
GM@
0.022U_0402_16V7K
GM@
R202
0_0402_5%
PM@
Security Classification
2006/12/25
Issued Date
Deciphered Date
2007/12/25
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
0.47U_0603_16V4Z
C215
10U_0805_10V4Z
2
2
0.1U_0402_16V4Z
GM@
GM@
VCC_AXF: 350mA
(10UF*1, 1UF*1)
+1.25VS
B23
B21
A21
VCC_SM_CK_1
VCC_SM_CK_2
VCC_SM_CK_3
VCC_SM_CK_4
VTTLF1
VTTLF2
VTTLF3
+1.25VS
10U_0805_10V4Z
2
1U_0402_6.3V4Z
0.47U_0603_16V4Z
0_0603_5%
R400
AJ50
VCC_RXR_DMI_1
VCC_RXR_DMI_2
C335
+1.25VS_AXF
VCC_DMI
VCC_PEG_1
VCC_PEG_2
VCC_PEG_3
VCC_PEG_4
VCC_PEG_5
C262
22U_0805_6.3V6M
2
@
1U_0402_6.3V4Z
AR29
VCC_HV_1
VCC_HV_2
C509
VCC_AXD: 200mA
(22UF*1, 1UF*1)
CRESTLINE_1p0
C231
C268
+1.25VS_AXD
PM@
+1.8V_LVDS
R220
220U_D2_2VMR15
4.7U_0805_10V4Z
0.47U_0603_16V4Z
2
4.7U_0805_10V4Z
2.2U_0805_10V6K
VCC_AXD_NCTF
VCC_AXF_1
VCC_AXF_2
VCC_AXF_3
VTT: 850mA
(220UF*1, 4.7UF*21, 2.2UF*1, 0.47UF*1)
1
C507
AT23
AU28
AU24
AT29
AT25
AT30
POWER
C25
B25
C27
B27
B28
A28
0.1U_0402_16V4Z
2
L38 1
2
MBK1608121YZF_0603
GM@
C488
+1.5VS_QDAC
AT22
AT21
AT19
AT18
AT17
AR17
AR16
+3VS_DACBG
VCCA_SM_1
VCCA_SM_2
VCCA_SM_3
VCCA_SM_4
VCCA_SM_5
C348
10U_0805_10V4Z
1U_0402_6.3V4Z
2
2
1U_0402_6.3V4Z
0.1U_0402_16V4Z
2
10U_0805_10V4Z
220U_D2_2VMR15
2
AW18
AV19
AU19
AU18
AU17
U13
U12
U11
U9
U8
U7
U5
U3
U2
U1
T13
T11
T10
T9
T7
T6
T5
T3
T2
R3
R2
R1
VCC_AXD_1
VCC_AXD_2
VCC_AXD_3
VCC_AXD_4
VCC_AXD_5
VCC_AXD_6
VTTLF
+1.8V_TX_LVDS
1
C497
GM@
1000P_0402_50V7K
2
VTT
+1.25VS_DPLLA
AXD
1
C323
10U_0805_10V4Z
2
VSSA_DAC_BG
AXF
2
0.1U_0402_16V4Z
VCCA_DAC_BG
B32
+3VS_DACBG
22U_0805_6.3V6M
2
2
0.1U_0402_16V4Z
GM@
SM CK
A30
VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8
VTT_9
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14
VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
HV
C233
VCCA_CRT_DAC_1
VCCA_CRT_DAC_2
PEG
(470UF*1, 0.1UF*1)
VCCSYNC
CRT
J32
A33
B33
DMI
R315
0.5_0603_1%
+3VS_SYNC
+3VS_CRTDAC
PLL
C313
VCCA_MPLL: 150mA
(10UF*1, 0.1UF*1)
+1.25VS_DPLLB
L22 1
2
MBK1608121YZF_0603
1
VCCA_DPLLB: 80mA C230
+1.05VS
U23H
A LVDS
L25 1
2
MBK1608121YZF_0603
A PEG
+1.25VS_MPLL
C207
22U_0805_6.3V6M
2
2
0.1U_0402_16V4Z
GM@
A SM
(470UF*1, 0.1UF*1)
A CK
22U_0805_6.3V6M
2
2
0.1U_0402_16V4Z
TV
C307
+1.25VS_DPLLA
L20 1
2
+1.25VS
MBK1608121YZF_0603
1
VCCA_DPLLA: 80mA C191
D TV/CRT
(22UF*1, 0.1UF*1)
LVDS
+1.25VS_HPLL
L24 1
2
+1.25VS
MBK1608121YZF_0603
1
C306
VCCA_HPLL: 50mA
Title
Document Number
Rev
1.0
ICL50/ICK70 M/B LA-3551P Schematic
Wednesday, August 15, 2007
Sheet
1
12
of
49
U23I
U23J
A13
A15
A17
A24
AA21
AA24
AA29
AB20
AB23
AB26
AB28
AB31
AC10
AC13
AC3
AC39
AC43
AC47
AD1
AD21
AD26
AD29
AD3
AD41
AD45
AD49
AD5
AD50
AD8
AE10
AE14
AE6
AF20
AF23
AF24
AF31
AG2
AG38
AG43
AG47
AG50
AH3
AH40
AH41
AH7
AH9
AJ11
AJ13
AJ21
AJ24
AJ29
AJ32
AJ43
AJ45
AJ49
AK20
AK21
AK26
AK28
AK31
AK51
AL1
AM11
AM13
AM3
AM4
AM41
AM45
AN1
AN38
AN39
AN43
AN5
AN7
AP4
AP48
AP50
AR11
AR2
AR39
AR44
AR47
AR7
AT10
AT14
AT41
AT49
AU1
AU23
AU29
AU3
AU36
AU49
AU51
AV39
AV48
AW1
AW12
AW16
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
AW24
AW29
AW32
AW5
AW7
AY10
AY24
AY37
AY42
AY43
AY45
AY47
AY50
B10
B20
B24
B29
B30
B35
B38
B43
B46
B5
B8
BA1
BA17
BA18
BA2
BA24
BB12
BB25
BB40
BB44
BB49
BB8
BC16
BC24
BC25
BC36
BC40
BC51
BD13
BD2
BD28
BD45
BD48
BD5
BE1
BE19
BE23
BE30
BE42
BE51
BE8
BF12
BF16
BF36
BG19
BG2
BG24
BG29
BG39
BG48
BG5
BG51
BH17
BH30
BH44
BH46
BH8
BJ11
BJ13
BJ38
BJ4
BJ42
BJ46
BK15
BK17
BK25
BK29
BK36
BK40
BK44
BK6
BK8
BL11
BL13
BL19
BL22
BL37
BL47
C12
C16
C19
C28
C29
C33
C36
C41
C46
C50
C7
D13
D24
D3
D32
D39
D45
D49
E10
E16
E24
E28
E32
E47
F19
F36
F4
F40
F50
G1
G13
G16
G19
G24
G28
G29
G33
G42
G45
G48
G8
H24
H28
H4
H45
J11
J16
J2
J24
J28
J33
J35
J39
VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233
VSS_234
VSS_235
VSS_236
VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
VSS_243
K12
K47
K8
L1
L17
L20
L24
L28
L3
L33
L49
M28
M42
M46
M49
M5
M50
M9
N11
N14
N17
N29
N32
N36
N39
N44
N49
N7
P19
P2
P23
P3
P50
R49
T39
T43
T47
U41
U45
U50
V2
V3
VSS_245
VSS_246
VSS_247
VSS_248
VSS_249
VSS_250
VSS_251
VSS_252
VSS_253
VSS_254
VSS_255
VSS_256
VSS_257
VSS_258
VSS_259
VSS_260
VSS_261
VSS_262
VSS_263
VSS_264
VSS_265
VSS_266
VSS_267
VSS_268
VSS_269
VSS_270
VSS_271
VSS_272
VSS_273
VSS_274
VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
VSS_285
VSS_286
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296
VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
W11
W39
W43
W47
W5
W7
Y13
Y2
Y41
Y45
Y49
Y5
Y50
Y11
P29
T29
T31
T33
R28
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
AA32
AB32
AD32
AF28
AF29
AT27
AV25
H50
VSS
CRESTLINE_1p0
PM@
CRESTLINE_1p0
Security Classification
PM@
2006/12/25
Issued Date
Deciphered Date
2007/12/25
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
Document Number
Rev
1.0
ICL50/ICK70 M/B LA-3551P Schematic
Wednesday, August 15, 2007
Sheet
1
13
of
49
+1.8V
+1.8V
+1.8V
JP28
DDRA_SDQS1#
DDRA_SDQS1
9 DDRA_SDQS1#
9 DDRA_SDQS1
DDRA_SDQ10
DDRA_SDQ11
DDRA_SDQ16
DDRA_SDQ17
DDRA_SDQS2#
DDRA_SDQS2
9 DDRA_SDQS2#
9 DDRA_SDQS2
DDRA_SDQ18
DDRA_SDQ19
DDRA_SDQ24
DDRA_SDQ25
DDRA_SDM3
DDRA_SDQ26
DDRA_SDQ27
C
8
9
DDRA_CKE0
DDRA_CKE0
DDRA_SBS2#
DDRA_SBS2#
DDRA_SMA12
DDRA_SMA9
DDRA_SMA8
DDRA_SMA5
DDRA_SMA3
DDRA_SMA1
9
9
DDRA_SBS0#
DDRA_SWE#
9
8
DDRA_SCAS#
DDRA_SCS1#
DDRA_ODT1
DDRA_SMA10
DDRA_SBS0#
DDRA_SWE#
DDRA_SCAS#
DDRA_SCS1#
DDRA_ODT1
DDRA_SDQ32
DDRA_SDQ33
DDRA_SDQS4#
DDRA_SDQS4
9 DDRA_SDQS4#
9 DDRA_SDQS4
DDRA_SDQ34
DDRA_SDQ35
DDRA_SDQ40
DDRA_SDQ41
B
DDRA_SDM5
DDRA_SDQ42
DDRA_SDQ43
DDRA_SDQ48
DDRA_SDQ49
DDRA_SDQS6#
DDRA_SDQS6
9 DDRA_SDQS6#
9 DDRA_SDQS6
DDRA_SDQ50
DDRA_SDQ51
DDRA_SDQ56
DDRA_SDQ57
DDRA_SDM7
DDRA_SDQ58
DDRA_SDQ59
D_CK_SDATA
D_CK_SCLK
15,16 D_CK_SDATA
15,16 D_CK_SCLK
+3VS
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD
GND
VSS
DQ20
DQ21
VSS
NC
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
A11
A7
A6
VDD
A4
A2
A0
VDD
BA1
RAS#
S0#
VDD
ODT0
NC/A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SAO
SA1
GND
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
204
20mils
+5VALW
R345
+5VALW
DDRA_SDM0
DDRA_SDQ12
DDRA_SDQ13
20mils
0.1U_0402_16V4Z
+DIMM_VREF1
3 +
DDRA_SDM1
2 C376
220P_0402_50V7K
R344
1K_0402_1%
U17A
P
G
1K_0402_1%
C410
DDRA_SDQ6
DDRA_SDQ7
+DIMM_VREF
TLV2462CDR_SO8
@
5 +
6 -
U17B
O
TLV2462CDR_SO8
@
DDRA_CLK0 8
DDRA_CLK0# 8
DDRA_SDQ14
DDRA_SDQ15
1
R343
DDRA_SDQ[0..63]
9 DDRA_SDQ[0..63]
R346 1
DDRA_SDM2
DDRA_SDM[0..7]
9 DDRA_SDM[0..7]
2 0_0402_5%
+1.8V
PM_EXTTS#0 8
DDRA_SDQ22
DDRA_SDQ23
C611
C605
C608
C606
C389
C400
C388
DDRA_SDQS3# 9
DDRA_SDQS3 9
+1.8V
DDRA_SDQ30
DDRA_SDQ31
DDRA_CKE1
2.2U_0805_10V6K
2.2U_0805_10V6K
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
2
2
2
2
2
2
2.2U_0805_10V6K
2.2U_0805_10V6K
1U_0402_6.3V4Z
DDRA_SDQ28
DDRA_SDQ29
DDRA_SDQS3#
DDRA_SDQS3
0_0402_5%
DDRA_SMA[0..14]
8,9 DDRA_SMA[0..14]
DDRA_SDQ20
DDRA_SDQ21
+0.9VS
DDRA_CKE0
1
DDRA_SBS2#
2
RP19
DDRA_CKE1 8
4
3
56_0404_4P2R_5%
C411
C414
C417
C413
DDRA_SMA14
DDRA_SMA11
DDRA_SMA7
DDRA_SMA6
DDRA_SMA4
DDRA_SMA2
DDRA_SMA0
DDRA_SBS1#
DDRA_SRAS#
DDRA_SCS0#
DDRA_ODT0
DDRA_SMA13
DDRA_SBS1# 9
DDRA_SRAS# 9
DDRA_SCS0# 8
DDRA_ODT0 8
DDRA_SDQ36
DDRA_SDQ37
DDRA_SDM4
DDRA_SMA12
1
DDRA_SMA9
2
RP20
4
3
56_0404_4P2R_5%
DDRA_SMA8
DDRA_SMA5
1
2
RP21
4
3
56_0404_4P2R_5%
DDRA_SMA3
DDRA_SMA1
1
2
RP22
4
3
56_0404_4P2R_5%
DDRA_SMA10
1
DDRA_SBS0#
2
RP23
4
3
56_0404_4P2R_5%
DDRA_SWE#
1
DDRA_SCAS#
2
RP24
4
3
56_0404_4P2R_5%
DDRA_SCS1#
1
DDRA_ODT1
2
RP25
4
3
56_0404_4P2R_5%
DDRA_SMA11
1
DDRA_SMA14
2
RP26
4
3
56_0404_4P2R_5%
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+0.9VS
C427
C404
C407
C425
C403
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+0.9VS
DDRA_SDQ38
DDRA_SDQ39
DDRA_SDQ44
DDRA_SDQ45
DDRA_SDQS5#
DDRA_SDQS5
DDRA_SDQS5# 9
DDRA_SDQS5 9
DDRA_CLK1 8
DDRA_CLK1# 8
1
C405
C409
C408
C406
1
B
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DDRA_SMA6
DDRA_SMA7
1
2
RP27
4
3
56_0404_4P2R_5%
DDRA_SMA2
DDRA_SMA4
1
2
RP28
4
3
56_0404_4P2R_5%
DDRA_SBS1#
1
DDRA_SMA0
2
RP29
4
3
56_0404_4P2R_5%
C424
DDRA_SCS0#
1
DDRA_SRAS#
2
RP30
4
3
56_0404_4P2R_5%
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
0.1U_0402_16V4Z
DDRA_SMA13
1
DDRA_ODT0
2
RP31
4
3
56_0404_4P2R_5%
DDRA_CKE1
2
56_0402_5%
DDRA_SDQ46
DDRA_SDQ47
DDRA_SDQ52
DDRA_SDQ53
C422
+0.9VS
C423
C426
DDRA_SDM6
DDRA_SDQ54
DDRA_SDQ55
DDRA_SDQ60
DDRA_SDQ61
DDRA_SDQS7#
DDRA_SDQS7
DDRA_SDQS7# 9
DDRA_SDQS7 9
1
R347
DDRA_SDQ62
DDRA_SDQ63
R353 1
R354 1
2 10K_0402_5%
2 10K_0402_5%
FOX_AS0A426-M2RN-7F
CONN@
+3VS
C607
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
203
+DIMM_VREF
DDRA_SDQ4
DDRA_SDQ5
DDRA_SDQ8
DDRA_SDQ9
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
DDRA_SDQ2
DDRA_SDQ3
D
VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS
DDRA_SDQS0#
DDRA_SDQS0
9 DDRA_SDQS0#
9 DDRA_SDQS0
VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
DDRA_SDQ0
DDRA_SDQ1
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
+DIMM_VREF
C402
0.1U_0402_16V4Z
2
2
2.2U_0805_10V6K
2006/12/25
Issued Date
Security Classification
2007/12/25
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
DDRII-SODIMM0
Size
B
Date:
Document Number
Rev
1.0
ICL50/ICK70 M/B LA-3551P Schematic
Sheet
14
of
49
+1.8V
JP29
+DIMM_VREF
DDRB_SDQ0
DDRB_SDQ1
9 DDRB_SDQS0#
9 DDRB_SDQS0
DDRB_SDQS0#
DDRB_SDQS0
DDRB_SDQ2
DDRB_SDQ3
DDRB_SDQ8
DDRB_SDQ9
9 DDRB_SDQS1#
9 DDRB_SDQS1
DDRB_SDQS1#
DDRB_SDQS1
DDRB_SDQ10
DDRB_SDQ11
DDRB_SDQ16
DDRB_SDQ17
9 DDRB_SDQS2#
9 DDRB_SDQS2
DDRB_SDQS2#
DDRB_SDQS2
DDRB_SDQ18
DDRB_SDQ19
DDRB_SDQ24
DDRB_SDQ25
DDRB_SDM3
DDRB_SDQ26
DDRB_SDQ27
DDRB_CKE0
DDRB_SBS2#
DDRB_CKE0
DDRB_SBS2#
DDRB_SMA12
DDRB_SMA9
DDRB_SMA8
DDRB_SMA5
DDRB_SMA3
DDRB_SMA1
9
9
DDRB_SBS0#
DDRB_SWE#
9
8
DDRB_SCAS#
DDRB_SCS1#
DDRB_ODT1
DDRB_SMA10
DDRB_SBS0#
DDRB_SWE#
DDRB_SCAS#
DDRB_SCS1#
DDRB_ODT1
DDRB_SDQ32
DDRB_SDQ33
9 DDRB_SDQS4#
9 DDRB_SDQS4
DDRB_SDQS4#
DDRB_SDQS4
DDRB_SDQ34
DDRB_SDQ35
DDRB_SDQ40
DDRB_SDQ41
DDRB_SDM5
DDRB_SDQ42
DDRB_SDQ43
DDRB_SDQ48
DDRB_SDQ49
9 DDRB_SDQS6#
9 DDRB_SDQS6
DDRB_SDQS6#
DDRB_SDQS6
DDRB_SDQ50
DDRB_SDQ51
DDRB_SDQ56
DDRB_SDQ57
DDRB_SDM7
DDRB_SDQ58
DDRB_SDQ59
14,16 D_CK_SDATA
14,16 D_CK_SCLK
D_CK_SDATA
D_CK_SCLK
+3VS
+1.8V
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD
GND
VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS
VSS
DQ20
DQ21
VSS
NC
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
A11
A7
A6
VDD
A4
A2
A0
VDD
BA1
RAS#
S0#
VDD
ODT0
NC/A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SAO
SA1
GND
+DIMM_VREF
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
+1.8V
DDRB_SDQ4
DDRB_SDQ5
1
DDRB_SDM0
C373
DDRB_SDQ6
DDRB_SDQ7
C386
C519 +
2.2U_0805_10V6K
2
2
0.1U_0402_16V4Z
C556+
2
DDRB_SDQ12
DDRB_SDQ13
330U_D2E_2.5VM_R9
C420
C429
C385
C374
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
150U_D2_6.3VM
@
1
DDRB_SDM1
DDRB_CLK0 8
DDRB_CLK0# 8
For EMI
DDRB_SDQ14
DDRB_SDQ15
+1.8V
DDRB_SDQ20
DDRB_SDQ21
R356 1
DDRB_SDM2
8,9 DDRB_SMA[0..14]
0_0402_5%
2
9 DDRB_SDQ[0..63]
PM_EXTTS#1 8
9 DDRB_SDM[0..7]
DDRB_SMA[0..14]
C615
+1.8V
C616
C617
+1.8V
C618
C619
+1.8V
C620
C622
C621
DDRB_SDQ[0..63]
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
2
2
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DDRB_SDM[0..7]
DDRB_SDQ22
DDRB_SDQ23
DDRB_SDQ28
DDRB_SDQ29
DDRB_SDQS3#
DDRB_SDQS3
+1.05VS
+5VALW
+1.5VS
DDRB_SDQS3# 9
DDRB_SDQS3 9
DDRB_SDQ30
DDRB_SDQ31
DDRB_CKE1
+1.8V
DDRB_CKE1 8
+0.9VS
2
DDRB_SMA14
DDRB_SMA11
DDRB_SMA7
DDRB_SMA6
DDRB_SMA4
DDRB_SMA2
DDRB_SMA0
DDRB_SBS1#
DDRB_SRAS#
DDRB_SCS0#
DDRB_ODT0
DDRB_SMA13
DDRB_SBS1# 9
DDRB_SRAS# 9
DDRB_SCS0# 8
DDRB_ODT0 8
DDRB_CKE0
DDRB_SBS2#
1
2
RP32
4
3
56_0404_4P2R_5%
DDRB_SMA12
DDRB_SMA9
1
2
RP33
4
3
56_0404_4P2R_5%
DDRB_SMA8
DDRB_SMA5
1
2
RP34
4
3
56_0404_4P2R_5%
DDRB_SMA3
DDRB_SMA1
1
2
RP35
4
3
56_0404_4P2R_5%
DDRB_SMA10
DDRB_SBS0#
1
2
RP36
4
3
56_0404_4P2R_5%
DDRB_SWE#
DDRB_SCAS#
1
2
RP37
4
3
56_0404_4P2R_5%
DDRB_SCS1#
DDRB_ODT1
1
2
RP38
4
3
56_0404_4P2R_5%
DDRB_SMA11
DDRB_SMA14
1
2
RP39
4
3
56_0404_4P2R_5%
DDRB_SMA6
DDRB_SMA7
1
2
RP40
4
3
56_0404_4P2R_5%
DDRB_SMA2
DDRB_SMA4
1
2
RP41
4
3
56_0404_4P2R_5%
DDRB_SBS1#
DDRB_SMA0
1
2
RP42
4
3
56_0404_4P2R_5%
DDRB_SDQ36
DDRB_SDQ37
DDRB_SDM4
DDRB_SDQ38
DDRB_SDQ39
DDRB_SDQ44
DDRB_SDQ45
DDRB_SDQS5#
DDRB_SDQS5
DDRB_SDQS5# 9
DDRB_SDQS5 9
DDRB_SDQ46
DDRB_SDQ47
DDRB_SDQ52
DDRB_SDQ53
DDRB_CLK1 8
DDRB_CLK1# 8
C372
C369
C370
C371
C421
C419
C428
2.2U_0805_10V6K
2.2U_0805_10V6K
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
2
2
2
2
2
2
2.2U_0805_10V6K
2.2U_0805_10V6K
1U_0402_6.3V4Z
+1.8V
C384
C398
C375
C399
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+0.9VS
C382
C391
C392
C378
C393
1
3
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+0.9VS
DDRB_SDM6
DDRB_SDQ54
DDRB_SDQ55
DDRB_SDQ60
DDRB_SDQ61
DDRB_SDQS7#
DDRB_SDQS7
DDRB_SDQS7# 9
DDRB_SDQS7 9
DDRB_SCS0#
DDRB_SRAS#
1
2
RP43
4
3
56_0404_4P2R_5%
DDRB_SMA13
DDRB_ODT0
1
2
RP44
4
3
56_0404_4P2R_5%
DDRB_CKE1
1
R355
DDRB_SDQ62
DDRB_SDQ63
1
R3481
R349
2
2 10K_0402_5%
10K_0402_5%
2
56_0402_5%
C397
C383
C379
C394
+0.9VS
C381
+3VS
C396
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C395
C380
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
0.1U_0402_16V4Z
FOX_AS0A426-MARG-7F
CONN@
2006/12/25
Issued Date
Security Classification
2007/12/25
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
Title
DDRII-SODIMM1
Size
B
Date:
Document Number
Rev
1.0
ICL50/ICK70 M/B LA-3551P Schematic
Sheet
15
of
49
+CLK_VDDSRC
FSLC
FSLB
FSLA
CPU
MHz
SRC
MHz
PCI
MHz
200
100
33.3
166
100
33.3
Clock Generator
+CLK_VDD
L10 2
1
1 KC FBM-L11-201209-221LMAT_0805
1
1
1
1
1
1
1
C109
C125
C47
C49
C46
C102
C103
C100
10U_0805_10V4Z
2
10U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
2
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+1.25VS
+3VS
L9
2
1
KC FBM-L11-201209-221LMAT_0805
1
1
1
1
1
1
1
1
C51
C44
C45
C48
C99
C98
C101
C79
10U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
2
2
2
2
2
10U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Table : ICS9LPR365
1
CLK_REQ#
Control
Free-Run
CR#_A(WLAN)
PCIEX2
PCIEX0
CR#_B(MCH)
PCIEX4
PCIEX1
CR#_G(NEW CARD)
PCIEX9
CR#_H(MINI CARDII)
PCIEX10
+CLK_VDD
+3VS
CLK_PCI2
2
10K_0402_5%
1
R104
U1
2
9
16
61
VDDPCI
VDD48
VDDPLL3
VDDREF
39
55
VDDSRC
VDDCPU
12
20
26
VDD96_IO
VDDPLL3_IO
VDDSRC_IO
36
49
VDDSRC_IO
VDDCPU_IO
2
@ 10K_0402_5%
CLK_PCI5
2
10K_0402_5%
1
R107
R72
+3VS
2 10K_0402_5%
R76
28 MINI1_CLKREQ#
25 CLK_PCI_1394
R90
2
@ 10K_0402_5%
2
G
PCI1/CR#_B
CLK_PCI2
PCI2/TME
CLK_PCI_LPC
R79
1 33_0402_5%
CLK_PCI3
PCI3
CLK_PCI4
PCI4/27_Select
CLK_PCI5
PCI_F5/ITP_EN
R75
1 33_0402_5%
CLK_XTALIN
R47
4.7K_0402_5%
1
2
C33
27P_0402_50V8J
1
2
+3VS
D_CK_SDATA
2 475_0402_1%
CLK_XTALOUT
Y1
14.31818MHz_20P_FSX8L14.318181M20FDB
60
X1
59
X2
SCLK
SDATA
64
63
PCI_STOP#
CPU_STOP#
38
37
PM_STP_PCI#
PM_STP_CPU#
CPU0
CPU0#
54
53
CLK_CPU0 R44
CLK_CPU0# R45
1
1
2 0_0402_5%
2 0_0402_5%
CLK_CPU_BCLK
CLK_CPU_BCLK#
CPU1_F
CPU1#_F
51
50
CLK_CPU1 R31
CLK_CPU1# R32
1
1
2 0_0402_5%
2 0_0402_5%
CLK_MCH_BCLK
CLK_MCH_BCLK#
SRC8/CPU2_ITP
SRC8#/CPU2_ITP#
47
46
CLK_SRC8 R39
CLK_SRC8# R40
1
1
2 0_0402_5%
2 0_0402_5%
CLK_PCIE_LAN
CLK_PCIE_LAN#
SRC10
SRC10#
34
35
SRC11/CR#_H
SRC11#/CR#_G
33
32
CLK_ICH_48M
22 CLK_ICH_48M
2
G
R27
4.7K_0402_5%
1
2
22,26,28,29 ICH_SMBCLK
R80
1 33_0402_5%
CLKSEL0
10
D_CK_SCLK
CLK_ICH_14M
22 CLK_ICH_14M
R43
1 33_0402_5%
+1.05VS
R110
1K_0402_5%
1
2
1
R99
0_0402_5%
MCH_CLKSEL0 8
CPU_BSEL0 5
R372
@ 1K_0402_5%
R370
1K_0402_5%
1
2
R92
@ 56_0402_5%
CLKSEL1
1
R373
@ 0_0402_5%
+CLK_VDDSRC
1
R371
0_0402_5%
MCH_CLKSEL1 8
CPU_BSEL1 5
+1.05VS
R362
1K_0402_5%
1
2
R25
10K_0402_5%
@
MCH_CLKSEL2 8
1
R364
0_0402_5%
CPU_BSEL2 5
57
CLKSEL2
62
2 475_0402_1%
2 475_0402_1%
1
1
CLK_PCIE_LAN 26
CLK_PCIE_LAN# 26
CLK_PCIE_MINI2 28
CLK_PCIE_MINI2# 28
2 10K_0402_5%
+3VS
MINI2_CLKREQ# 28
EXP_CLKREQ# 29
2
+3VS
10K_0402_5%
1
1
SRC9
SRC9#
30
31
SRC7/CR#_F
SRC7#/CR#_E
44
43
CLK_SRC7 R33
CLK_SRC7# R34
1
1
2 0_0402_5%
2 0_0402_5%
CLK_PCIE_SATA
CLK_PCIE_SATA#
SRC6
SRC6#
41
40
CLK_SRC6 R41
CLK_SRC6# R42
1 PM@
1 PM@
2 0_0402_5%
2 0_0402_5%
CLK_PCIE_VGA
CLK_PCIE_VGA#
REF0/FSLC/TEST_SEL
45
FSLB/TEST_MODE
1
1
2 0_0402_5%
2 0_0402_5%
CLK_PCIE_CARD
CLK_PCIE_CARD#
SRC4
SRC4#
27
28
CLK_SRC4 R86
CLK_SRC4# R87
1
1
2 0_0402_5%
2 0_0402_5%
CLK_MCH_3GPLL
CLK_MCH_3GPLL#
VDDSRC_IO
SRC3/CR#_C
SRC3#/CR#_D
24
25
CLK_SRC3 R95
CLK_SRC3# R96
1
1
2 0_0402_5%
2 0_0402_5%
CLK_PCIE_ICH
CLK_PCIE_ICH#
42
GNDSRC
SRC2/SATA
SRC2#/SATA#
21
22
CLK_SRC2 R84
CLK_SRC2# R85
1
1
2 0_0402_5%
2 0_0402_5%
CLK_PCIE_MINI1
CLK_PCIE_MINI1#
GNDPCI
11
GND48
SRC1/SE1/27MHz_NonSS
SRC1#/SE2/27MHz_SS
17
18
CLK_SRC1 R93
CLK_SRC1# R94
1 GM@
1 GM@
2 0_0402_5%
2 0_0402_5%
CLK_DREF_SSC
CLK_DREF_SSC#
15
GND
19
GND
52
GNDCPU
SRC0/DOT96
SRC0#/DOT96#
13
14
CLK_DOT
CLK_DOT#
1 GM@
1 GM@
2 0_0402_5%
2 0_0402_5%
CLK_DREF_96M
CLK_DREF_96M#
23
GNDSRC
29
GNDSRC
CK_PWRGD/PD#
56
CK505_PWRGD
58
GNDREF
R82
R83
R29 1
R30 1
ICS9LPRS365AGLFT_TSSOP64
CLK_PCIE_CARD 29
CLK_PCIE_CARD# 29
CLK_PCIE_SATA 21
CLK_PCIE_SATA# 21
CLK_PCIE_VGA 17
CLK_PCIE_VGA# 17
2 0_0402_5%
CK_PWRGD 22
2 0_0402_5%
VGATE
CLK_MCH_3GPLL 8
CLK_MCH_3GPLL# 8
CLK_PCIE_ICH 22
CLK_PCIE_ICH# 22
CLK_PCIE_MINI1 28
CLK_PCIE_MINI1# 28
CLK_DREF_SSC 8
CLK_DREF_SSC# 8
CLK_DREF_96M 8
CLK_DREF_96M# 8
8,22,45
CK505_PWRGD
R55
R97
CLK_PCIE_MINI2
CLK_PCIE_MINI2#
CLK_MCH_BCLK 7
CLK_MCH_BCLK# 7
1
R35
@ 0_0402_5%
2 0_0402_5%
2 0_0402_5%
1
1
CLK_CPU_BCLK 4
CLK_CPU_BCLK# 4
R363
@ 1K_0402_5%
R36
10K_0402_5%
CLKSEL2 1
2
+3VS
CLK_SRC10 R53
CLK_SRC10# R52
CLK_SRC9 R73
CLK_SRC9# R74
USB_48MHZ/FSLA
CLKSEL1
+3VS
+1.05VS
1
2
R100
@ 1K_0402_5%
PM_STP_PCI# 22
PM_STP_CPU# 22
R103
Q7
2N7002_SOT23
R81
2.2K_0402_5%
CLKSEL0 1
2
D_CK_SCLK 14,15
D_CK_SDATA 14,15
R60
Q8
2N7002_SOT23
+3VS
3
D_CK_SCLK
D_CK_SDATA
2 33_0402_5%
C32
27P_0402_50V8J
1
2
+3VS
22,26,28,29 ICH_SMBDATA
PCI0/CR#_A
R105 1
CLK_PCI_ICH
20 CLK_PCI_ICH
CK_PWRGD
48
1
R22
30 CLK_PCI_LPC
2 475_0402_1%
CLK_PCI_1394
8 MCH_CLKREQ#
CLK_PCI4
2
10K_0402_5%
1
R91
NC
CLK_ENABLE# 45
Issued Date
Security Classification
2
G
Q5
2N7002_SOT23
@
2006/12/25
Deciphered Date
2007/12/25
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
Title
Document Number
Rev
1.0
ICL50/ICK70 M/B LA-3551P Schematic
Wednesday, August 15, 2007
G
Sheet
16
of
H
49
10 PCIE_MTX_C_GRX_N[0..15]
10 PCIE_GTX_C_MRX_N[0..15]
PCIE_MTX_C_GRX_N[0..15]
PCIE_GTX_C_MRX_N[0..15]
PCIE_GTX_C_MRX_P[0..15]
PCIE_GTX_C_MRX_N12
PCIE_GTX_C_MRX_P12
PCIE_GTX_C_MRX_N11
PCIE_GTX_C_MRX_P11
PCIE_GTX_C_MRX_N10
PCIE_GTX_C_MRX_P10
PCIE_GTX_C_MRX_N9
PCIE_GTX_C_MRX_P9
PCIE_GTX_C_MRX_N8
PCIE_GTX_C_MRX_P8
PCIE_GTX_C_MRX_N7
PCIE_GTX_C_MRX_P7
PCIE_GTX_C_MRX_N6
PCIE_GTX_C_MRX_P6
PCIE_GTX_C_MRX_N5
PCIE_GTX_C_MRX_P5
B
PCIE_GTX_C_MRX_N4
PCIE_GTX_C_MRX_P4
PCIE_GTX_C_MRX_N3
PCIE_GTX_C_MRX_P3
PCIE_GTX_C_MRX_N2
PCIE_GTX_C_MRX_P2
PRSNT2#
PEX_TX15#
PEX_TX15
GND
PEX_TX14#
PEX_TX14
GND
PEX_TX13#
PEX_TX13
GND
PEX_TX12#
PEX_TX12
GND
PEX_TX11#
PEX_TX11
GND
PEX_TX10#
PEX_TX10
GND
PEX_TX9#
PEX_TX9
GND
PEX_TX8#
PEX_TX8
GND
PEX_TX7#
PEX_TX7
GND
PEX_TX6#
PEX_TX6
GND
PEX_TX5#
PEX_TX5
GND
PEX_TX4#
PEX_TX4
GND
PEX_TX3#
PEX_TX3
GND
PEX_TX2#
PEX_TX2
+1.8VS
140mil(3.5A)
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203
205
207
209
211
213
215
217
219
221
223
225
227
229
231
PCIE_GTX_C_MRX_N0
PCIE_GTX_C_MRX_P0
VGA_ON 33
16 CLK_PCIE_VGA#
16 CLK_PCIE_VGA
CLK_PCIE_VGA#
CLK_PCIE_VGA
+5VS
20 PLTRST_VGA#
D_EC_SMB_DA1
D_EC_SMB_CK1
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
19 VGA_CRT_HSYNC
19 VGA_CRT_VSYNC
19 VGA_DDC_CLK
19 VGA_DDC_DATA
PCIE_MTX_C_GRX_N15
PCIE_MTX_C_GRX_P15
VGA_CRT_HSYNC
VGA_CRT_VSYNC
VGA_DDC_CLK
VGA_DDC_DATA
PCIE_MTX_C_GRX_N14
PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_N13
PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_N12
PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_N10
PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_N9
PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_N8
PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_N7
PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_N6
PCIE_MTX_C_GRX_P6
18
DVI_DET
18 VGA_DVI_TXC18 VGA_DVI_TXC+
DVI_DET
VGA_DVI_TXCVGA_DVI_TXC+
PCIE_MTX_C_GRX_N4
PCIE_MTX_C_GRX_P4
18 VGA_DVI_TXD218 VGA_DVI_TXD2+
VGA_DVI_TXD2VGA_DVI_TXD2+
PCIE_MTX_C_GRX_N3
PCIE_MTX_C_GRX_P3
18 VGA_DVI_TXD118 VGA_DVI_TXD1+
VGA_DVI_TXD1VGA_DVI_TXD1+
PCIE_MTX_C_GRX_N2
PCIE_MTX_C_GRX_P2
18 VGA_DVI_TXD018 VGA_DVI_TXD0+
VGA_DVI_TXD0VGA_DVI_TXD0+
PCIE_MTX_C_GRX_N5
PCIE_MTX_C_GRX_P5
ACES_88990-2D08
CONN@
1
C526
PM@
680P_0603_50V7K 68P_0402_50V8J
2
2
PCIE_MTX_C_GRX_N1
PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_N0
PCIE_MTX_C_GRX_P0
VGA_TV_CRMA
+2.5VS
C471
C520
0.1U_0402_16V4Z
PM@ 2
1
0.1U_0603_25V7K
VGA_TV_COMPS 19
VGA_CRT_R
VGA_CRT_R 19
VGA_CRT_G
VGA_CRT_G 19
VGA_CRT_B
VGA_CRT_B 19
VGA_TZCLKVGA_TZCLK+
VGA_TZCLK- 18
VGA_TZCLK+ 18
VGA_TZOUT2VGA_TZOUT2+
VGA_TZOUT2- 18
VGA_TZOUT2+ 18
VGA_TZOUT1VGA_TZOUT1+
VGA_TZOUT1- 18
VGA_TZOUT1+ 18
VGA_TZOUT0VGA_TZOUT0+
VGA_TZOUT0- 18
VGA_TZOUT0+ 18
VGA_TXCLKVGA_TXCLK+
VGA_TXCLK- 18
VGA_TXCLK+ 18
VGA_TXOUT2VGA_TXOUT2+
VGA_TXOUT2- 18
VGA_TXOUT2+ 18
VGA_TXOUT1VGA_TXOUT1+
VGA_TXOUT1- 18
VGA_TXOUT1+ 18
VGA_TXOUT0VGA_TXOUT0+
VGA_TXOUT0- 18
VGA_TXOUT0+ 18
I2CC_SDA
I2CC_SCL
ENVDD
I2CC_SDA 18
I2CC_SCL 18
ENVDD
18
ENBKL
VGA_DVI_SDATA
VGA_DVI_SCLK
ENBKL
10,30
VGA_DVI_SDATA 18
VGA_DVI_SCLK 18
+2.5VS
+3VS
+3VS
30,32,41 EC_SMB_DA1
160mil(4A)
VGA_TV_LUMA 19
VGA_TV_COMPS
+5VS
B+
C525
VGA_TV_CRMA 19
VGA_TV_LUMA
D_EC_SMB_DA1
Q46
PM@ 2N7002_SOT23
2
G
L44 2
1
KC FBM-L11-201209-221LMAT_0805
PM@
L43 2
1
KC FBM-L11-201209-221LMAT_0805
PM@
1
C527
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
206
208
210
212
214
216
218
220
222
224
226
228
230
232
ACES_88990-2D08
CONN@
+MXM_B+
160mil(4A)
PEX_RX1#
GND
PEX_RX1
PEX_TX1#
GND
PEX_TX1
PEX_RX0#
GND
PEX_RX0
PEX_TX0#
GND
PEX_TX0
PEX_REFCLK#
PRSNT1#
PEX_REFCLK
TV_C/HDTV_Pr
CLK_REQ#
GND
PEX_RST#
TV_Y/HDTV_Y
RSVD
GND
RSVD
TV_CVBS/HDTV_Pb
SMB_DAT
GND
SMB_CLK
VGA_RED
THERM#
GND
VGA_HSYNC
VGA_GRN
VGA_VSYNC
GND
DDCA_CLK
VGA_BLU
DDCA_DAT
GND
IGP_UCLK#
LVDS_UCLK#
IGP_UCLK
LVDS_UCLK
GND
GND
RSVD
LVDS_UTX3#
RSVD
LVDS_UTX3
RSVD
GND
IGP_UTX2#
LVDS_UTX2#
IGP_UTX2
LVDS_UTX2
GND
GND
IGP_UTX1#
LVDS_UTX1#
IGP_UTX1
LVDS_UTX1
GND
GND
IGP_UTX0#
LVDS_UTX0#
IGP_UTX0
LVDS_UTX0
GND
GND
IGP_LCLK#/DVI_B_CLK#
LVDS_LCLK#
IGP_LCLK/DVI_B_CLK
LVDS_LCLK
DVI_B_HPD/GND
GND
RSVD
LVDS_LTX3#
RSVD
LVDS_LTX3
GND
GND
IGP_LTX2#/DVI_B_TX2#
LVDS_LTX2#
IGP_LTX2/DVI_B_TX2
LVDS_LTX2
GND
GND
IGP_LTX1#/DVI_B_TX1#
LVDS_LTX1#
IGP_LTX1/DVI_B_TX1
LVDS_LTX1
GND
GND
IGP_LTX0#/DVI_B_TX0#
LVDS_LTX0#
IGP_LTX0/DVI_B_TX0
LVDS_LTX0
DVI_A_HPD
GND
DVI_A_CLK#
DDCC_DAT
DVI_A_CLK
DDCC_CLK
GND
LVDS_PPEN
DVI_A_TX2#
LVDS_BL_BRGHT
DVI_A_TX2
LVDS_BLEN
GND
DDCB_DAT
DVI_A_TX1#
DDCB_CLK
DVI_A_TX1
2V5RUN
GND
GND
DVI_A_TX0#
3V3RUN
DVI_A_TX0
3V3RUN
GND
3V3RUN
GND
GND
2
0.1U_0402_16V4Z
PM@
30,32,41 EC_SMB_CK1
3
S
PCIE_GTX_C_MRX_N13
PCIE_GTX_C_MRX_P13
PEX_RX15#
PEX_RX15
GND
PEX_RX14#
PEX_RX14
GND
PEX_RX13#
PEX_RX13
GND
PEX_RX12#
PEX_RX12
GND
PEX_RX11#
PEX_RX11
GND
PEX_RX10#
PEX_RX10
GND
PEX_RX9#
PEX_RX9
GND
PEX_RX8#
PEX_RX8
GND
PEX_RX7#
PEX_RX7
GND
PEX_RX6#
PEX_RX6
GND
PEX_RX5#
PEX_RX5
GND
PEX_RX4#
PEX_RX4
GND
PEX_RX3#
PEX_RX3
GND
PEX_RX2#
PEX_RX2
GND
2
4
6
8
10
12
14
16
18
20
22
24
PCIE_GTX_C_MRX_N14
PCIE_GTX_C_MRX_P14
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
1V8RUN
1V8RUN
1V8RUN
1V8RUN
1V8RUN
1V8RUN
1V8RUN
RUNPWROK
5VRUN
GND
GND
GND
2
G
PCIE_GTX_C_MRX_N15
PCIE_GTX_C_MRX_P15
PWR_SRC
PWR_SRC
PWR_SRC
PWR_SRC
PWR_SRC
PWR_SRC
PWR_SRC
PWR_SRC
GND
GND
GND
GND
1
3
5
7
9
11
13
15
17
19
21
23
+MXM_B+
JP19B
PCIE_GTX_C_MRX_N1
PCIE_GTX_C_MRX_P1
10 PCIE_GTX_C_MRX_P[0..15]
JP19A
PCIE_MTX_C_GRX_P[0..15]
10 PCIE_MTX_C_GRX_P[0..15]
PM@
D_EC_SMB_CK1
A
Q47
2N7002_SOT23
Security Classification
2006/12/25
Issued Date
Deciphered Date
2007/12/25
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
MXM Connector
Size
B
Date:
Document Number
Rev
1.0
ICL50/ICK70 M/B LA-3551P Schematic
Wednesday, August 15, 2007
Sheet
1
17
of
49
TXOUT0TXOUT0+
RP4
TXOUT1TXOUT1+
RP6
+3VS
+3V
+LCDVDD
TXOUT2TXOUT2+
RP8
R11
300_0603_5%
R10
100K_0402_5%
R13
Q1
AO3413_SOT23-3
TZOUT2TZOUT2+
+LCDVDD
C17
4.7U_0805_10V4Z
2
R12
100K_0402_5%
TZCLKTZCLK+
W=60mils
0.047U_0402_16V7K
2
Q3
2N7002_SOT23
2
G
3
ENVDD
GM@
2 0_0402_5%
PM@
0_0402_5%
2
17
1
1K_0402_5%
1
C16
R9
2
G
TZOUT1TZOUT1+
Q2
2N7002_SOT23
R14
TZOUT0TZOUT0+
4.7U_0805_10V4Z
1
2
1
2
1
2
RP10
1
2
RP12
1
2
RP14
1
2
RP16
1
2
RP18
C19
1 2
10 GMCH_ENVDD
TXCLKTXCLK+
W=60mils
1
2
4
3
PM@
4
3
PM@
4
3
PM@
4
3
PM@
4
3
PM@
4
3
PM@
4
3
PM@
4
3
PM@
VGA_TXOUT0VGA_TXOUT0+
0_0404_4P2R_5%
VGA_TXOUT1VGA_TXOUT1+
0_0404_4P2R_5%
VGA_TXOUT2VGA_TXOUT2+
0_0404_4P2R_5%
VGA_TXCLKVGA_TXCLK+
0_0404_4P2R_5%
VGA_TZOUT0VGA_TZOUT0+
0_0404_4P2R_5%
VGA_TZOUT1VGA_TZOUT1+
0_0404_4P2R_5%
VGA_TZOUT2VGA_TZOUT2+
0_0404_4P2R_5%
VGA_TZCLKVGA_TZCLK+
0_0404_4P2R_5%
VGA_TXOUT0- 17
VGA_TXOUT0+ 17
VGA_TXOUT1- 17
VGA_TXOUT1+ 17
VGA_TXOUT2- 17
VGA_TXOUT2+ 17
VGA_TXCLK- 17
VGA_TXCLK+ 17
VGA_TZOUT0- 17
VGA_TZOUT0+ 17
VGA_TZOUT1- 17
VGA_TZOUT1+ 17
VGA_TZOUT2- 17
VGA_TZOUT2+ 17
VGA_TZCLK- 17
VGA_TZCLK+ 17
C10
I2CC_SCL
I2CC_SDA
0.1U_0402_16V4Z
1
2
GMCH_LCD_CLK
4
GMCH_LCD_DATA
3
GM@ 0_0404_4P2R_5%
2
1
3
4
GM@
3
4
GM@
3
4
GM@
3
4
GM@
3
4
GM@
3
4
GM@
3
4
GM@
3
4
GM@
GMCH_LCD_CLK 10
GMCH_LCD_DATA 10
RP2
TXOUT0TXOUT0+
+3VS
TXOUT1TXOUT1+
RP3
TXOUT2TXOUT2+
RP5
DAC_BRIG
R8
C9
INVTPWM
C15
4.7K_0402_5%
30
BKOFF#
BKOFF#
D4
2 RB751V_SOD323
DISPOFF#
DISPOFF#
C11
220P_0402_50V7K
RP7
TXCLKTXCLK+
220P_0402_50V7K
RP9
TZOUT0TZOUT0+
220P_0402_50V7K
2
1
2
1
2
1
RP11
2
1
RP13
2
1
RP15
2
1
RP17
TZOUT1TZOUT1+
TZOUT2TZOUT2+
2
1
TZCLKTZCLK+
GMCH_TXOUT0GMCH_TXOUT0+
GMCH_TXOUT0- 10
GMCH_TXOUT0+ 10
0_0404_4P2R_5%
GMCH_TXOUT1GMCH_TXOUT1+
GMCH_TXOUT1- 10
GMCH_TXOUT1+ 10
0_0404_4P2R_5%
GMCH_TXOUT2GMCH_TXOUT2+
GMCH_TXOUT2- 10
GMCH_TXOUT2+ 10
0_0404_4P2R_5%
GMCH_TXCLKGMCH_TXCLK+
GMCH_TXCLK- 10
GMCH_TXCLK+ 10
0_0404_4P2R_5%
GMCH_TZOUT0GMCH_TZOUT0+
GMCH_TZOUT0- 10
GMCH_TZOUT0+ 10
0_0404_4P2R_5%
GMCH_TZOUT1GMCH_TZOUT1+
GMCH_TZOUT1- 10
GMCH_TZOUT1+ 10
0_0404_4P2R_5%
GMCH_TZOUT2GMCH_TZOUT2+
GMCH_TZOUT2- 10
GMCH_TZOUT2+ 10
0_0404_4P2R_5%
GMCH_TZCLKGMCH_TZCLK+
GMCH_TZCLK- 10
GMCH_TZCLK+ 10
0_0404_4P2R_5%
JP1
R501 1
17 VGA_DVI_TXD017 VGA_DVI_TXD0+
1
2
RP45
17 VGA_DVI_TXD117 VGA_DVI_TXD1+
2
1
4
3
0_0404_4P2R_5%
PM@
R502 1
3
4
0_0404_4P2R_5%
PM@
3
4
0_0404_4P2R_5%
PM@
1
R503
TXCLKTXCLK+
+3VS
ACES_88242-4001
CONN@
17 VGA_DVI_TXD217 VGA_DVI_TXD2+
RP1
2
1
RP46
2 180_0402_1%
@
DVI_TXD1DVI_TXD1+
DVI_TXD2DVI_TXD2+
2
180_0402_1%
@
R504 1
DPST_PWM 10
17 VGA_DVI_TXC+
17 VGA_DVI_TXC-
NC7SZ14P5X_NL_SC70-5
@
1
2
RP47
4
3
0_0404_4P2R_5%
PM@
NC
INVTPWM
+3VS
U36
2 180_0402_1%
@
DVI_TXC+
DVI_TXC-
2
G
TMDS_DATA0TMDS_DATA0+
9
10
TMDS_DATA1TMDS_DATA1+
1
2
TMDS_DATA2TMDS_DATA2+
12
13
TMDS_DATA3TMDS_DATA3+
4
5
TMDS_DATA4TMDS_DATA4+
20
21
TMDS_DATA5TMDS_DATA5+
23
24
TMDS_Clock+
TMDS_Clock-
25
26
27
28
31
32
10K_0402_5%
8
Q50
2N7002_SOT23
@
@
A
Shield
Shield
Shield
Shield
Shield
Shield
+5V
14
R17
4.7K_0402_5%
PM@
DDC_CLOCK
DDC_DATA
L29 2
1
KC FBM-L11-201209-221LMAT_0805
C432
B+
R18
4.7K_0402_5%
PM@
VGA_DVI_SCLK 17
VGA_DVI_SDATA 17
Q36
2N7002_SOT23
PM@
R360
Hot Plug Detect
16
TMDS_DATA2/4 shield
TMDS_DATA1/3 shield
TMDS_DATA0/5 shield
TMDS_Clock shield
3
11
19
22
2
20K_0402_5%
PM@
R361
DVI_DET
DVI_DET
17
100K_0402_5%
PM@
D20
SKS10-04AT_TSMA
@
+3VS
Analog VSYNC
GND
15
1
SUYIN_070939FR024S531PL
CONN@
C664
C665
C666
A
@
@
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+3VS
1
1
C14
C8
C18
C433
680P_0603_50V7K 68P_0402_50V8J
2
2
+5VS
+3VS
Q35
2N7002_SOT23
PM@
1
+LCDVDD
L31 2
1
KC FBM-L11-201209-221LMAT_0805
RB411DT146_SOT23-3
PM@
+INVPWR_B+
W=40mils
1.1A_6VDC_FUSE
C23
PM@
0.1U_0402_16V4Z
PM@
+DVI_VCC
JP15
17
18
+3VS
DVI-D Connector
2 180_0402_1%
@
DVI_TXD0DVI_TXD0+
2
G
TXOUT1TXOUT1+
TXOUT0TXOUT0+
TXOUT2+
TXOUT2-
D7
1
1
2
G
USB20_CMOS_N3
USB20_CMOS_P3
F2
W=60mils
2
2
+DVI_VCC
0_0603_5%
R3
1
R4
1
0_0603_5%
USB20_N3
USB20_P3
W=40mils
INVT_PWM 30
22
22
0_0402_5%
TZCLKTZCLK+
+LCDVDD
TZOUT2+
TZOUT2-
DAC_BRIG 30
R7
TZOUT1+
TZOUT1-
DAC_BRIG
INVTPWM
DISPOFF#
TZOUT0TZOUT0+
41
39
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1
I2CC_SCL
I2CC_SDA
I2CC_SCL
I2CC_SDA
GND
39
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1
+3VS
17
17
GND
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
42
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
+INVPWR_B+
0.1U_0402_16V4Z
10U_0805_10V4Z
0.1U_0402_16V4Z
2006/12/25
Issued Date
Security Classification
2007/12/25
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
Title
Document Number
Rev
1.0
ICL50/ICK70 M/B LA-3551P Schematic
Sheet
18
of
49
CRT Connector
W=40mils
+5VS
+R_CRT_VCC
D19
D3
D2
D1
@
@
@
DAN217_SC59 DAN217_SC59 DAN217_SC59
1
C430
0.1U_0402_16V4Z
2
+3VS
CRT_R
L6
CRT_R_1
2
FCM2012C-800_0805
L5
CRT_G_1
2
FCM2012C-800_0805
L3
2
FCM2012C-800_0805
CRT_R_2
2
FCM2012C-800_0805
CRT_G_2
2
FCM2012C-800_0805
CRT_B_2
W=40mils
1.1A_6VDC_FUSE
1
RB411DT146_SOT23-3
+CRT_VCC
F1
JP14
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
GM@
CRT_G
L4
GM@
C13
C4
GM@
150_0402_1%
2
2
10P_0402_50V8J
C1
GM@
C12
GM@
2
10P_0402_50V8J
C6
C2
GM@ 2
GM@ 2
GM@ 2
22P_0402_50V8J
22P_0402_50V8J
22P_0402_50V8J
150_0402_1%
C7
C5
10P_0402_50V8J 10P_0402_50V8J
2
2
C3
10P_0402_50V8J
C436
10P_0402_50V8J
RP51
4
3
1
L30
CRT_VSYNC_2
2
FCM1608C-121T_0603
1
10K_0402_5%
C435
10P_0402_50V8J
CRT_DET 22
DSUB_12
R555
100K_0402_5%
C434
10P_0402_50V8J
C437 2
68P_0402_50V8J 1
CRT_HSYNC_1
SUYIN_070549FR015S208CR
CONN@
2
100P_0402_50V8J
CRT_G
16
17
SN74AHCT1G125DCKR_SC70-5
DSUB_15
C431
68P_0402_50V8J
+CRT_VCC
TV_COMPS
1
C438
TV_LUMA
1
TV_CRMA
2
GM@ 0_0404_4P2R_5%
2
0.1U_0402_16V4Z
+CRT_VCC
CRT_R
CRT_VSYNC
+CRT_VCC
U19
Y
CRT_VSYNC_1
10 GMCH_TV_LUMA
10 GMCH_TV_CRMA
CRT_HSYNC_2
2
FCM1608C-121T_0603
U18
10 GMCH_TV_COMPS
CRT_B
10 GMCH_CRT_R
CRT_HSYNC
OE#
10 GMCH_CRT_G
GM@ 0_0402_5%
1
GM@ 0_0402_5%
1
GM@ 0_0402_5%
1
GM@ 0_0402_5%
1
10 GMCH_CRT_B
R557
2
R558
2
R559
2
R560
2
2
R359
5
CRT_VSYNC
1
CRT_HSYNC
2
GM@ 33_0404_4P2R_5%
RP48
4
3
2
0.1U_0402_16V4Z
OE#
10 GMCH_CRT_VSYNC
10 GMCH_CRT_HSYNC
1
C439
1
L32
R1
150_0402_1%
R2
L1
GM@
R6
CRT_B_1
2
FCM2012C-800_0805
L2
CRT_B
17 VGA_TV_LUMA
17 VGA_TV_CRMA
RP55
1
2
D
D14
D24
D25
@
@
@
DAN217_SC59 DAN217_SC59 DAN217_SC59
TV_COMPS
TV-OUT Conn.
TV_LUMA
4
TV_CRMA
3
PM@ 0_0404_4P2R_5%
DSUB_15
Q20
2N7002_SOT23
1
Q21
2N7002_SOT23
2
1
R399
GM@ 0_0402_5%
2 R392
PM@ 0_0402_5%
VGA_DDC_CLK 17
GMCH_CRT_CLK 10
3
GMCH_CRT_DATA 10
2
G
4.7K_0402_5%
1
DSUB_12
CRT_R
VGA_DDC_DATA 17
2
G
CRT_G
2 R391
PM@ 0_0402_5%
CRT_B
R384
17 VGA_TV_COMPS
R381
4.7K_0402_5%
17 VGA_CRT_R
PM@ 0_0402_5%
1
PM@ 0_0402_5%
1
PM@ 0_0402_5%
1
PM@ 0_0402_5%
1
+3VS
17 VGA_CRT_G
R561
2
R562
2
R563
2
R564
2
CRT_VSYNC
4
CRT_HSYNC
3
PM@ 0_0404_4P2R_5%
17 VGA_CRT_B
RP52
1
2
17 VGA_CRT_VSYNC
17 VGA_CRT_HSYNC
SN74AHCT1G125DCKR_SC70-5
+3VS
TV_LUMA
L42
TV_CRMA
L40
TV_COMPS
R413
R205
L18
R416
C211
150_0402_1%
2
150_0402_1%
150_0402_1%
C510
C514
2
FCM1608C-121T_0603
2
FCM1608C-121T_0603
2
FCM1608C-121T_0603
GM@
2
2
6P_0402_50V8K
GM@
GM@
6P_0402_50V8K
6P_0402_50V8K
2
C216
GM@
6P_0402_50V8K
2
JP24
TV_CRMA_1
TV_COMPS_1
TV_LUMA_1
C508
C515
GM@
GM@
6P_0402_50V8K
2
2
6P_0402_50V8K
3
6
7
5
2
4
1
8
9
SUYIN_030107FR007SX08FU
CONN@
2006/12/25
Issued Date
Security Classification
2007/12/25
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
Title
Document Number
Rev
1.0
ICL50/ICK70 M/B LA-3551P Schematic
Sheet
19
of
49
+3VS
R143 1
2 8.2K_0402_5%
PCI_DEVSEL#
R144 1
2 8.2K_0402_5%
PCI_STOP#
R139 1
2 8.2K_0402_5%
PCI_TRDY#
U5B
R145 1
2 8.2K_0402_5%
PCI_FRAME#
R137 1
2 8.2K_0402_5%
PCI_PLOCK#
R122 1
2 8.2K_0402_5%
PCI_IRDY#
R124 1
2 8.2K_0402_5%
PCI_SERR#
R138 1
2 8.2K_0402_5%
PCI_PERR#
R109 1
2 8.2K_0402_5%
PCI_PIRQA#
R120 1
2 8.2K_0402_5%
PCI_PIRQB#
R136 1
2 8.2K_0402_5%
PCI_PIRQC#
R140 1
2 8.2K_0402_5%
PCI_PIRQD#
R108 1
2 8.2K_0402_5%
PCI_PIRQE#
R111 1
2 8.2K_0402_5%
PCI_PIRQF#
R112 1
2 8.2K_0402_5%
PCI_PIRQG#
R134 1
2 8.2K_0402_5%
PCI_PIRQH#
R135 1
2 8.2K_0402_5%
PCI_REQ#0
R125 1
2 8.2K_0402_5%
PCI_REQ#1
R146 1
2 8.2K_0402_5%
PCI_REQ#2
R142 1
2 8.2K_0402_5%
PCI_REQ#3
+3VS
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
D20
E19
D19
A20
D17
A21
A19
C19
A18
B16
A12
E16
A14
G16
A15
B6
C11
A9
D11
B12
C12
D10
C7
F13
E11
E13
E12
D8
A6
E8
D6
A3
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
F9
B5
C5
A10
PIRQA#
PIRQB#
PIRQC#
PIRQD#
PCI
REQ0#
GNT0#
REQ1#/GPIO50
GNT1#/GPIO51
REQ2#/GPIO52
GNT2#/GPIO53
REQ3#/GPIO54
GNT3#/GPIO55
A4
D7
E18
C18
B19
F18
A11
C10
PCI_REQ#0
PCI_GNT#0
PCI_REQ#1
C/BE0#
C/BE1#
C/BE2#
C/BE3#
C17
E15
F16
E17
PCI_CBE#0
PCI_CBE#1
PCI_CBE#2
PCI_CBE#3
IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR#
STOP#
TRDY#
FRAME#
C8
D9
G6
D16
A7
B7
F10
C16
C9
A17
PCI_IRDY#
PCI_PAR
PCI_RST#
PCI_DEVSEL#
PCI_PERR#
PCI_PLOCK#
PCI_SERR#
PCI_STOP#
PCI_TRDY#
PCI_FRAME#
PLTRST#
PCICLK
PME#
AG24
B10
G7
PLT_RST#
CLK_PCI_ICH
PCI_REQ#0 25
PCI_GNT#0 25
PCI_REQ#2
PCI_REQ#3
PCI_GNT#3
PCI_CBE#0
PCI_CBE#1
PCI_CBE#2
PCI_CBE#3
25
25
25
25
PCI_IRDY# 25
PCI_PAR 25
PCI_RST# 25,29
PCI_DEVSEL# 25
PCI_PERR# 25
PCI_SERR# 25
PCI_STOP# 25
PCI_TRDY# 25
PCI_FRAME# 25
CLK_PCI_ICH
25 PCI_AD[0..31]
R123
10_0402_5%
@
PLT_RST# 8,22,24,26,30
CLK_PCI_ICH 16
C126
10P_0402_50V8J
@
Interrupt I/F
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#
F8
G11
F12
B3
PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5
PCI_PIRQE# 25
PCI_PIRQG# 25
R141
2 1K_0402_5% PCI_GNT#3
@
R121
2 1K_0402_5% PCI_GNT#0
@
R126
2 1K_0402_5%
@
PCI_GNT#3
SPI_CS#1 22
LPC*
PCI
R316
100K_0402_5%
+3VS
U9
2 B
Y
A
NC7SZ08P5X_NL_SC70-5
PLT_RST_BUF# 28
2
R321
1
100_0402_5%
PM@
Y
A
NC7SZ08P5X_NL_SC70-5
SPI
U8
2 B
PLT_RST#
SPI_CS#1
PCI_GNT#0
+3VS
PLTRST_VGA# 17
R317
100K_0402_5%
PM@
PM@
Security Classification
2006/12/25
Issued Date
Deciphered Date
2007/12/25
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
ICH8M(1/4)-PCI
Size
Document Number
Rev
1.0
ICL50/ICK70 M/B LA-3551P Schematic
Date:
Sheet
1
20
of
49
+RTCVCC
SM_INTRUDER#
NC
OUT
NC
IN
C286
12P_0402_50V8J
2
1
+RTCVCC
1
2
R264
20K_0402_5%
+RTCVCC
ICH_RTCX2
AG25
AF24
RTCX1
RTCX2
ICH_RTCRST#
AF23
RTCRST#
SM_INTRUDER#
AD22
INTRUDER#
ICH_INTVRMEN
LAN100_SLP
AF25
AD21
INTVRMEN
LAN100_SLP
J1
R281
332K_0402_1%
10K_0603_5%
J1
C292
1U_0603_10V4Z
1
2
+RTCVCC
R238
332K_0402_1%
GLAN_CLK
D22
LAN_RSTSYNC
C21
B21
C22
LAN_RXD0
LAN_RXD1
LAN_RXD2
D21
E20
C20
LAN_TXD0
LAN_TXD1
LAN_TXD2
AH21
+1.5VS
R156
33 HDA_BITCLK_MDC
R293
33 HDA_SYNC_MDC
+3VS
R292
33 HDA_RST_MDC#
R301
GLAN_COMP
2
24.9_0402_1%
HDA_BITCLK_ICH
2
33_0402_5%
HDA_SYNC_ICH
2
33_0402_5%
HDA_RST_ICH#
2
33_0402_5%
1
1
1
1
HDA_SDOUT
HDA_DOCK_EN#/GPIO33
HDA_DOCK_RST#/GPIO34
SATA_LED#
AF10
SATALED#
24 SATA_DTX_C_IRX_N0
24 SATA_DTX_C_IRX_P0
SATA_DTX_C_IRX_N0
SATA_DTX_C_IRX_P0
SATA_ITX_DRX_N0
SATA_ITX_DRX_P0
AF6
AF5
AH5
AH6
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
24 SATA_DTX_C_IRX_N1
24 SATA_DTX_C_IRX_P1
SATA_DTX_C_IRX_N1
SATA_DTX_C_IRX_P1
SATA_ITX_DRX_N1
SATA_ITX_DRX_P1
AG3
AG4
AJ4
AJ3
SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP
AF2
AF1
AE4
AE3
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
AB7
AC6
SATA_CLKN
SATA_CLKP
AG1
AG2
SATARBIAS#
SATARBIAS
HDA_SDOUT_ICH
33_0402_5%
IDE_HRESET#
24 IDE_HRESET#
30
34 HDA_SYNC_AUDIO
1
R273
HDA_SYNC_ICH
2
33_0402_5%
34 HDA_RST_AUDIO#
1
R300
HDA_RST_ICH#
2
33_0402_5%
34 HDA_SDOUT_AUDIO
1
R299
HDA_SDOUT_ICH
2
33_0402_5%
SATA_LED#
16 CLK_PCIE_SATA#
16 CLK_PCIE_SATA
R242
CLK_PCIE_SATA#
CLK_PCIE_SATA
2 22.6_0402_1%
SATARBIAS
LPC_FRAME#
G9
E6
EC_GA20
H_A20M#
DPRSTP#
DPSLP#
AF26
AE26
DPRSTP# R260 1
DPSLP#
R261 1
AD24
H_FERR#
AG29
H_PWRGOOD
IGNNE#
AF27
H_IGNNE#
INIT#
INTR
RCIN#
AE24
AC20
AH14
H_INIT#
H_INTR
EC_KBRST#
NMI
SMI#
AD23
AG28
H_NMI
H_SMI#
STPCLK#
AA24
H_STPCLK#
THRMTRIP#
AE27
THRMTRIP_ICH#
TP8
AA23
V1
U2
V3
T1
V4
T5
AB2
T6
T3
R2
T4
V6
V5
U1
V2
U6
IDE_DD0
IDE_DD1
IDE_DD2
IDE_DD3
IDE_DD4
IDE_DD5
IDE_DD6
IDE_DD7
IDE_DD8
IDE_DD9
IDE_DD10
IDE_DD11
IDE_DD12
IDE_DD13
IDE_DD14
IDE_DD15
DA0
DA1
DA2
AA4
AA1
AB3
IDE_DA0
IDE_DA1
IDE_DA2
DCS1#
DCS3#
Y6
Y5
IDE_DCS1#
IDE_DCS3#
DIOR#
DIOW#
DDACK#
IDEIRQ
IORDY
DDREQ
W4
W3
Y2
Y3
Y1
W5
IDE_DIOR#
IDE_DIOW#
IDE_DDACK#
IDE_IRQ
IDE_DIORDY
IDE_DDREQ
@
@
1
1
1
56_0402_5%
56_0402_5%
56_0402_5%
D
30
30
30
30
1 R271 10K_0402_5%
EC_GA20 30
H_A20M# 4
AF13
AG26
DD0
DD1
DD2
DD3
DD4
DD5
DD6
DD7
DD8
DD9
DD10
DD11
DD12
DD13
DD14
DD15
LPC_FRAME# 30
A20GATE
A20M#
HDA_RST#
AE10
AG14
R310
C4
LDRQ0#
LDRQ1#/GPIO23
FERR#
HDA_BIT_CLK
HDA_SYNC
AE13
33 HDA_SDOUT_MDC
SATA_LED#
HDA_BITCLK_ICH
2
33_0402_5%
AE14
GLAN_COMPI
GLAN_COMPO
HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
HDA_SDIN3
10K_0402_5%
1
R279
AJ16
AJ15
GLAN_DOCK#/GPIO13
AJ17
AH17
AH15
AD13
34 HDA_SDIN0
33 HDA_SDIN1
R298
34 HDA_BITCLK_AUDIO
D25
C25
FWH4/LFRAME#
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
CPUPWRGD/GPIO49
IHDA
LAN100_SLP
B24
E5
F5
G8
F6
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3
IDE
ICH_INTVRMEN
U5A
SATA
32.768KHZ_12.5P_MC-306
H_DPRSTP#
R251
H_DPSLP#
R252
H_FERR#
R250
RTC
LPC
1M_0402_5%
+1.05VS
ICH_RTCX1
X1
LAN / GLAN
CPU
R265
R263
10M_0402_5%
2
1
C287
12P_0402_50V8J
2
1
+3VS
0_0402_5% H_DPRSTP#
0_0402_5% H_DPSLP#
2
2
H_DPRSTP# 5,8,45
H_DPSLP# 5
H_FERR# 4
H_PWRGOOD 5
H_IGNNE# 4
H_INIT#
H_INTR
4
4
H_NMI
H_SMI#
4
4
R272
1 10K_0402_5%
EC_KBRST# 30
+3VS
H_STPCLK# 4
R258 1
2 24.9_0402_1%
IDE_DD[0..15]
IDE_DA[0..2]
H_THERMTRIP#
2
R257
24
H_THERMTRIP# 4,8
1
56_0402_5%
+1.05VS
IDE_DIORDY
R203 1
2 4.7K_0402_5%
IDE_IRQ
R199 1
2 8.2K_0402_5%
+3VS
24
IDE_DCS1# 24
IDE_DCS3# 24
IDE_DIOR# 24
IDE_DIOW# 24
IDE_DDACK# 24
IDE_IRQ 24
IDE_DIORDY 24
IDE_DDREQ 24
1
C290
1
C291
SATA_ITX_C_DRX_N0
2
3900P_0402_50V7K
SATA_ITX_C_DRX_P0
2
3900P_0402_50V7K
1
C281
1
C280
SATA_ITX_C_DRX_N1
2
3900P_0402_50V7K
SATA_ITX_C_DRX_P1
2
3900P_0402_50V7K
SATA_ITX_C_DRX_N0 24
SATA_ITX_C_DRX_P0 24
MAINPWON 38,39,41
SATA_ITX_C_DRX_N1 24
SATA_ITX_C_DRX_P1 24
+1.05VS
R189
@ 330_0402_5%
1
2
22
ICH_TP3
R288
1K_0402_5%
@
RSVD
Normal Operation
Description
Security Classification
2006/12/25
Issued Date
Deciphered Date
2007/12/25
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
2SC2411K_SOT23
@
H_THERMTRIP#
ICH_TP3
HDA_SDOUT_ICH
Q10
+VCC_HDA_ICH
R297
1K_0402_5%
@
2
B
E
close ICH8
SATA_ITX_DRX_N0
Title
ICH8M(2/4)-LAN,IDELPC,RTC
Size
B
Date:
Document Number
Rev
1.0
ICL50/ICK70 M/B LA-3551P Schematic
Wednesday, August 15, 2007
Sheet
1
21
of
49
30 EC_LID_OUT#
+3V
10K_0402_5%
R276 1
2
LINKALERT#
26,28,29 ICH_PCIE_WAKE#
25,30
SERIRQ
30 EC_THERM#
8,16,45
XDP_DBRESET#
ICH_PCIE_WAKE#
8.2K_0402_5%
R287 2
1
PM_BATLOW#
10K_0402_5%
R277 1
2
SMBALERT#
R278 1
+3VS
30,41
1K_0402_5%
R302 1
2
BMBUSY#/GPIO0
SMBALERT#
AG22
SMBALERT#/GPIO11
PM_STP_PCI#
PM_STP_CPU#
AE20
AG18
STP_PCI#/GPIO15
STP_CPU#/GPIO25
PM_CLKRUN#
AH11
CLKRUN#/GPIO32
ICH_PCIE_WAKE#
SERIRQ
EC_THERM#
AE17
AF12
AC13
WAKE#
SERIRQ
THRM#
AJ20
VRMPWRGD
AJ22
TP7
AJ8
AJ9
AH9
AE16
AC19
AG8
AH12
AE11
AG10
AH25
AD16
AG13
AF9
AJ11
AD10
TACH1/GPIO1
TACH2/GPIO6
TACH3/GPIO7
GPIO8
GPIO12
TACH0/GPIO17
GPIO18
GPIO20
SCLOCK/GPIO22
QRT_STATE0/GPIO27
QRT_STATE1/GPIO28
SATACLKREQ#/GPIO35
SLOAD/GPIO38
SDATAOUT0/GPIO39
SDATAOUT1/GPIO48
2
R267
VGATE
30
30
T11
1 ICH_VGATE
0_0402_5%
@
PAD
CRT_DET#
2
RB751V_SOD323
EC_SMI#
EC_SCI#
EC_SMI#
EC_SCI#
@
10K_0402_5%
R269 1
2
10K_0402_5%
R268 1
2
10K_0402_5%
R290 1
2
34
PROJECT_ID0
SB_SPKR
SB_SPKR
AD9
8 MCH_ICH_SYNC#
PROJECT_ID1
21
ICH_TP3
SPKR
AJ13
MCH_SYNC#
AJ21
TP3
ICH8M REV 1.0
100K_0402_5%
R285 1
PM_DPRSLPVR
2
29
29
29
29
PCIE_PTX_C_IRX_N1
PCIE_PTX_C_IRX_P1
PCIE_ITX_C_PRX_N1
PCIE_ITX_C_PRX_P1
C175 2
C174 2
1
1
PCIE_PTX_C_IRX_N1
PCIE_PTX_C_IRX_P1
PCIE_ITX_PRX_N1
0.1U_0402_16V7K
0.1U_0402_16V7K
PCIE_ITX_PRX_P1
For TV-Tuner
28
28
28
28
PCIE_PTX_C_IRX_N2
PCIE_PTX_C_IRX_P2
PCIE_ITX_C_PRX_N2
PCIE_ITX_C_PRX_P2
C172 2
C170 2
1
1
0.1U_0402_16V7K
0.1U_0402_16V7K
26
26
26
26
PCIE_PTX_C_IRX_N3
PCIE_PTX_C_IRX_P3
PCIE_ITX_C_PRX_N3
PCIE_ITX_C_PRX_P3
C166 2
C168 2
1
1
0.1U_0402_16V7K
0.1U_0402_16V7K
28
28
28
28
PCIE_PTX_C_IRX_N4
PCIE_PTX_C_IRX_P4
PCIE_ITX_C_PRX_N4
PCIE_ITX_C_PRX_P4
C162 2
C158 2
1
1
0.1U_0402_16V7K
0.1U_0402_16V7K
20
2
1 1
3
PAD
AH27
SYS_PWROK
DPRSLPVR/GPIO16
AJ14
DPRSLPVR
BATLOW#
AE21
1
R286
PM_BATLOW#
PWRBTN#
C2
PBTN_OUT#
LAN_RST#
AH20
LAN_RST#
RSMRST#
AG27
E3
SYS_PWROK
PM_SLP_M#
SLP_M#
AJ25
CL_CLK0
CL_CLK1
F23
AE18
CL_DATA0
CL_DATA1
F22
AF19
2
100_0402_5%
PM_DPRSLPVR 8,45
PBTN_OUT# 30
2
0_0402_5%
PLT_RST# 8,20,24,26,30
CK_PWRGD 16
1
R262
LAN_RST#
1
R548
CL_VREF0
CL_VREF1
D24
AH23
CL_RST#
AJ23
MEM_LED/GPIO24
ME_EC_ALERT/GPIO10
EC_ME_ALERT/GPIO14
WOL_EN/GPIO9
AJ27
AJ24
AF22
AG19
PAD
PCIE_PTX_C_IRX_N3
PCIE_PTX_C_IRX_P3
PCIE_ITX_PRX_N3
PCIE_ITX_PRX_P3
K27
K26
J29
J28
PERN3
PERP3
PETN3
PETP3
PCIE_PTX_C_IRX_N4
PCIE_PTX_C_IRX_P4
PCIE_ITX_PRX_N4
PCIE_ITX_PRX_P4
H27
H26
G29
G28
PERN4
PERP4
PETN4
PETP4
F27
F26
E29
E28
PERN5
PERP5
PETN5
PETP5
D27
D26
C29
C28
PERN6/GLAN_RXN
PERP6/GLAN_RXP
PETN6/GLAN_TXN
PETP6/GLAN_TXP
C23
B23
E22
SPI_CLK
SPI_CS0#
SPI_CS1#
CRT_DET#
+3V
1
R294
1
R320
1
R296
1
R275
1
R274
1
R319
1
R512
1
R513
2 USB_OC#1
10K_0402_5%
2 USB_OC#3
10K_0402_5%
2 USB_OC#5
10K_0402_5%
2 USB_OC#9
10K_0402_5%
2 CP_PE#
10K_0402_5%
2 USB_OC#8
10K_0402_5%
2 USB_OC#4
10K_0402_5%
2 USB_OC#6
10K_0402_5%
29
USB_OC#0
29
USB_OC#2
29
CP_PE#
AJ19
AG16
AG15
AE15
AF15
AG17
AD12
AJ18
AD14
AH18
SPI_MOSI
SPI_MISO
OC0#
OC1#/GPIO40
OC2#/GPIO41
OC3#/GPIO42
OC4#/GPIO43
OC5#/GPIO29
OC6#/GPIO30
OC7#/GPIO31
OC8#
OC9#
2
10K_0402_5%
@
R453 2
1 0_0402_5%
Q14
MMBT3906_NL_SOT23-3
SB_RSMRST#
T9
EC_RSMRST# 30
R259
10K_0402_5%
CL_DATA0 8
CL_VREF0_ICH
CL_VREF1_ICH
1
R325
2
4.7K_0402_5%
+3V
D17A
1
6
CL_RST#0 8
R516 1
R517 1
R266 1
2 10K_0402_5%
2 10K_0402_5%
2 100K_0402_5%
2
BAV99DW-7_SOT363
+3V
D17B
4
DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP
V27
V26
U29
U28
DMI_MTX_IRX_N0
DMI_MTX_IRX_P0
DMI_ITX_MRX_N0
DMI_ITX_MRX_P0
DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP
Y27
Y26
W29
W28
DMI_MTX_IRX_N1
DMI_MTX_IRX_P1
DMI_ITX_MRX_N1
DMI_ITX_MRX_P1
DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP
AB26
AB25
AA29
AA28
DMI_MTX_IRX_N2
DMI_MTX_IRX_P2
DMI_ITX_MRX_N2
DMI_ITX_MRX_P2
DMI3RXN
DMI3RXP
DMI3TXN
DMI3TXP
AD27
AD26
AC29
AC28
DMI_MTX_IRX_N3
DMI_MTX_IRX_P3
DMI_ITX_MRX_N3
DMI_ITX_MRX_P3
DMI_CLKN
DMI_CLKP
T26
T25
DMI_ZCOMP
DMI_IRCOMP
Y23
Y24
USB
DMI_MTX_IRX_N0
DMI_MTX_IRX_P0
DMI_ITX_MRX_N0
DMI_ITX_MRX_P0
8
8
8
8
DMI_MTX_IRX_N1
DMI_MTX_IRX_P1
DMI_ITX_MRX_N1
DMI_ITX_MRX_P1
8
8
8
8
DMI_MTX_IRX_N2
DMI_MTX_IRX_P2
DMI_ITX_MRX_N2
DMI_ITX_MRX_P2
8
8
8
8
DMI_MTX_IRX_N3
DMI_MTX_IRX_P3
DMI_ITX_MRX_N3
DMI_ITX_MRX_P3
8
8
8
8
CLK_PCIE_ICH#
CLK_PCIE_ICH
DMI_IRCOMP
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
G3
G2
H5
H4
H2
H1
J3
J2
K5
K4
K2
K1
L3
L2
M5
M4
M2
M1
N3
N2
USB20_N0
USB20_P0
USB20_N1
USB20_P1
USB20_N2
USB20_P2
USB20_N3
USB20_P3
USB20_N4
USB20_P4
USB20_N5
USB20_P5
USB20_N6
USB20_P6
USB20_N7
USB20_P7
USB20_N8
USB20_P8
USBRBIAS#
USBRBIAS
F2
F3
USBRBIAS
BAV99DW-7_SOT363
R329
2.2K_0402_5%
+3VS
CL_VREF0_ICH
CLK_PCIE_ICH# 16
CLK_PCIE_ICH 16
R213 24.9_0402_1%
1
2
USB20_N0
USB20_P0
USB20_N1
USB20_P1
USB20_N2
USB20_P2
USB20_N3
USB20_P3
USB20_N4
USB20_P4
USB20_N5
USB20_P5
USB20_N6
USB20_P6
USB20_N7
USB20_P7
USB20_N8
USB20_P8
R133
3.24K_0402_1%
C144
R127
453_0402_1%
0.1U_0402_16V4Z
2
USB Conn.
New Card
+3V
USB Conn.
CMOS Camera
R280
3.24K_0402_1%
USB/B
Bluetooth
CL_VREF1_ICH
USB/B
Mini Card(WLAN)
C282
Mini Card(TV-Tuner)
R282
453_0402_1%
0.1U_0402_16V4Z
2
1
2
R160
22.6_0402_1%
Issued Date
2007/12/25
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
2
10K_0402_5%
PERN2
PERP2
PETN2
PETP2
USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5
USB_OC#6
CP_PE#
USB_OC#8
USB_OC#9
M27
M26
L29
L28
SPI_CS#1
C298
10P_0402_50V8J
@
CL_CLK0 8
Security Classification
SYS_PWROK
SYS_PWROK 8,33
CK_PWRGD
E1
CLPWROK
PM_SLP_S3# 30
PM_SLP_S4# 30
PM_SLP_S5# 30
1
R549
SB_RSMRST#
CK_PWRGD
T5
AE23
PCIE_PTX_C_IRX_N2
PCIE_PTX_C_IRX_P2
PCIE_ITX_PRX_N2
PCIE_ITX_PRX_P2
D23
F21
R525
10K_0402_5%
PM_SLP_S3#
PM_SLP_S4#
PM_SLP_S5#
PWROK
PERN1
PERP1
PETN1
PETP1
+3VS
SUS_CLK
S4_STATE#/GPIO26
P27
P26
N29
N28
2
Q48G
2N7002_SOT23
D3
AG23
AF21
AD18
C165
10P_0402_50V8J
@
U5D
@ 100K_0402_5%
R291 1
ICH_VGATE
2
1
AG12
2 100K_0402_5%
1
D15
ACIN
PM_BMBUSY#
SUSCLK
SLP_S3#
SLP_S4#
SLP_S5#
CLK_ICH_14M 16
CLK_ICH_48M 16
ICH_SMLINK1
10K_0402_5%
R311 1
2
25,30 PM_CLKRUN#
ICH_SMLINK0
10K_0402_5%
R303 1
2
SUS_STAT#/LPCPD#
SYS_RESET#
PCI-Express
Direct Media Interface
10K_0402_5%
R312 1
2
16 PM_STP_PCI#
16 PM_STP_CPU#
EC_SWI#
F4
AD15
SPI
10K_0402_5%
R313 1
2
SUS_STAT#
XDP_DBRESET#
1
CLK_ICH_14M
CLK_ICH_48M
PM_BMBUSY#
RI#
2 10K_0402_5%
AG9
G5
CLK14
CLK48
R283
10_0402_5%
@
R168
10_0402_5%
@
PAD
T6
4 XDP_DBRESET#
AF17
PROJECT_ID1
PROJECT_ID0
R284 1
SB_SPKR
EC_SWI#
CLK_ICH_14M
30
EC_SWI#
AJ12
AJ10
AF11
AG11
SATA0GP/GPIO21
SATA1GP/GPIO19
SATA2GP/GPIO36
SATA3GP/GPIO37
SATA
GPIO
PM_STP_CPU#
SMBCLK
SMBDATA
LINKALERT#
SMLINK0
SMLINK1
SMB
PM_STP_PCI#
@ 10K_0402_5%
R499 1
2
AJ26
AD19
AG21
AC17
AE19
Clocks
@ 10K_0402_5%
R498 1
2
+3VS
U5C
ICH_SMBCLK
ICH_SMBDATA
LINKALERT#
ICH_SMLINK0
ICH_SMLINK1
16,26,28,29 ICH_SMBCLK
16,26,28,29 ICH_SMBDATA
Power MGT
EC_THERM#
R155
2.2K_0402_5%
SYS
GPIO
8.2K_0402_5%
R309 1
2
R157
2.2K_0402_5%
CLK_ICH_48M
PM_CLKRUN#
8.2K_0402_5%
R270 1
2
CRT_DET
SERIRQ
@ 10K_0402_5%
R500 1
2
19
+3V
10K_0402_5%
R308 1
2
MISC
GPIO
Controller Link
+3VS
Title
ICH8M(3/4)-USB,GPIO,PCIE
Size Document Number
Custom
Rev
1.0
ICL50/ICK70 M/B LA-3551P Schematic
Date:
Sheet
22
of
49
+3VS
+ICH_V5REF
C150
0.1U_0402_16V4Z
1
R158
D10
10_0402_5% 10_0402_5%
@
RB751V_SOD323
1
R165
+3V
+5V
+5VALW
+ICH_V5REF_SUS
C159
0.1U_0402_16V4Z
C203
C238
C237
C236
220U_D2_2VMR15
10U_0805_10V4Z
2
2
2
10U_0805_10V4Z
2.2U_0805_10V6K
+1.5VS_SATAPLL_R
+1.5VS
+1.5VS_SATAPLL_ICH
L26 1
2
MBK1608121YZF_0603
R289
1_0603_5%
(10UF*1, 1UF*1)
1
1
C309
C328
10U_0805_10V4Z
2 1U_0402_6.3V4Z
2
+1.5VS
close to AE7
Q44
AO3413_SOT23-3
1
C630
B
1U_0402_6.3V4Z
2
2
1U_0402_6.3V4Z
SBPWR_EN#
C226
37
close to AC1
0.1U_0603_25V7K
2
+5V
+1.5VS
C225
C224
2
0.1U_0402_16V4Z
+1.5VS
PAD
PAD
VCC1_5_A[01]
VCC1_5_A[02]
VCC1_5_A[03]
VCC1_5_A[04]
VCC1_5_A[05]
AC1
AC2
AC3
AC4
AC5
VCC1_5_A[06]
VCC1_5_A[07]
VCC1_5_A[08]
VCC1_5_A[09]
VCC1_5_A[10]
AC10
AC9
VCC1_5_A[11]
VCC1_5_A[12]
AA5
AA6
VCC1_5_A[13]
VCC1_5_A[14]
G12
G17
H7
VCC1_5_A[15]
VCC1_5_A[16]
VCC1_5_A[17]
TP_VCCLAN1_05_ICH_1
TP_VCCLAN1_05_ICH_2
@
@
+VCC_GLANPLL_R 1
+VCC_GLANPLL_ICH
2
MBK1608121YZF_0603 1
L11
C141
C142
(10UF*1, 1UF*1) 10U_0805_10V4Z
2
2.2U_0805_10V6K
D1
VCCUSBPLL
F1
L6
L7
M6
M7
VCC1_5_A[20]
VCC1_5_A[21]
VCC1_5_A[22]
VCC1_5_A[23]
VCC1_5_A[24]
W23
VCC1_5_A[25]
F17
G18
VCCLAN1_05[1]
VCCLAN1_05[2]
F19
G20
VCCLAN3_3[1]
VCCLAN3_3[2]
A24
VCCGLANPLL
A26
A27
B26
B27
B28
VCCGLAN1_5[1]
VCCGLAN1_5[2]
VCCGLAN1_5[3]
VCCGLAN1_5[4]
VCCGLAN1_5[5]
B25
+1.5VS_PCIE_ICH
VCC1_05[01]
VCC1_05[02]
VCC1_05[03]
VCC1_05[04]
VCC1_05[05]
VCC1_05[06]
VCC1_05[07]
VCC1_05[08]
VCC1_05[09]
VCC1_05[10]
VCC1_05[11]
VCC1_05[12]
VCC1_05[13]
VCC1_05[14]
VCC1_05[15]
VCC1_05[16]
VCC1_05[17]
VCC1_05[18]
VCC1_05[19]
VCC1_05[20]
VCC1_05[21]
VCC1_05[22]
VCC1_05[23]
VCC1_05[24]
VCC1_05[25]
VCC1_05[26]
VCC1_05[27]
VCC1_05[28]
A13
B13
C13
C14
D14
E14
F14
G14
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18
VCCDMIPLL
R29
VCC_DMI[1]
VCC_DMI[2]
AE28
AE29
V_CPU_IO[1]
V_CPU_IO[2]
AC23
AC24
VCC3_3[01]
AF29
VCC3_3[02]
AD2
VCC3_3[03]
VCC3_3[04]
VCC3_3[05]
VCC3_3[06]
AC8
AD8
AE8
AF8
VCC3_3[07]
VCC3_3[08]
VCC3_3[09]
VCC3_3[10]
VCC3_3[11]
VCC3_3[12]
VCC3_3[13]
AA3
U7
V7
W1
W6
W7
Y7
VCC3_3[14]
VCC3_3[15]
VCC3_3[16]
VCC3_3[17]
VCC3_3[18]
VCC3_3[19]
VCC3_3[20]
VCC3_3[21]
VCC3_3[22]
VCC3_3[23]
VCC3_3[24]
A8
B15
B18
B4
B9
C15
D13
D5
E10
E7
F11
VCCHDA
AC12
VCCSUSHDA
AD11
C131
C132
+1.5VS_DMIPLL_ICH
1
(10UF*1,
C178
C185
10U_0805_10V4Z
2
0.01U_0402_16V7K
C259
VCCSUS3_3[07]
VCCSUS3_3[08]
VCCSUS3_3[09]
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]
VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]
VCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]
VCCCL1_05
VCCCL1_5
VCCCL3_3[1]
VCCCL3_3[2]
F20
G21
C258
(4.7UF*1, 0.1UF*2)
close to AD2
+3VS
C256
C266
C271
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
0.1U_0402_16V4Z
close to AF29
close to AA3
+3VS
C124
C122
C123
+VCC_HDA_ICH
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
0.1U_0402_16V4Z
C342
R327
0_0603_5%
+3VS
0.1U_0402_16V4Z
2
+VCCSUS_HDA_ICH
PAD
PAD
T7
T12
PAD
T10
PAD
T8
C332
C190
C181
+3V
+3V
1
C177
4.7U_0805_10V4Z
0.1U_0402_16V4Z
2
2
0.1U_0402_16V4Z
close to P6
R323
0_0603_5%
0.1U_0402_16V4Z
2
(0.1UF*1, 0.022UF*2)
close to AC18
C135
G22 TP_VCCCL1_05_ICH
A22
(22UF*1, 0.1UF*1)
0.1U_0402_16V4Z
2
2
0.1U_0402_16V4Z
P6
P7
C1
N7
P1
P2
P3
P4
P5
R1
R3
R5
R6
0.01UF*1)
4.7U_0805_10V4Z
TP_VCCSUS1_5_ICH_2
AC18
AC21
AC22
AG20
AH28
+1.5VS
+1.05VS
C279
@
@
VCCSUS3_3[02]
VCCSUS3_3[03]
VCCSUS3_3[04]
VCCSUS3_3[05]
VCCSUS3_3[06]
1_0603_5%
22U_0805_6.3V6M
2
AC16 TP_VCCSUS1_5_ICH_1
C3
R180
+1.25VS
C247
VCCSUS1_5[1]
J7
+1.5VS_DMIPLL_R
L16 1
2
MBK1608121YZF_0603
TP_VCCSUS1_05_ICH_1
J6
AF20 TP_VCCSUS1_05_ICH_2
VCCSUS1_5[2]
0.1U_0402_16V4Z
2
2
0.1U_0402_16V4Z
VCCSUS1_05[1]
VCCSUS1_05[2]
VCCSUS3_3[01]
C143
(0.1UF*1)
PAD
+VCCCL1_5_INT_ICH @
T1
1U_0402_6.3V4Z
2
2
0.1U_0402_16V4Z
VSS[001]
VSS[002]
VSS[003]
VSS[004]
VSS[005]
VSS[006]
VSS[007]
VSS[008]
VSS[009]
VSS[010]
VSS[011]
VSS[012]
VSS[013]
VSS[014]
VSS[015]
VSS[016]
VSS[017]
VSS[018]
VSS[019]
VSS[020]
VSS[021]
VSS[022]
VSS[023]
VSS[024]
VSS[025]
VSS[026]
VSS[027]
VSS[028]
VSS[029]
VSS[030]
VSS[031]
VSS[032]
VSS[033]
VSS[034]
VSS[035]
VSS[036]
VSS[037]
VSS[038]
VSS[039]
VSS[040]
VSS[041]
VSS[042]
VSS[043]
VSS[044]
VSS[045]
VSS[046]
VSS[047]
VSS[048]
VSS[049]
VSS[050]
VSS[051]
VSS[052]
VSS[053]
VSS[054]
VSS[055]
VSS[056]
VSS[057]
VSS[058]
VSS[059]
VSS[060]
VSS[061]
VSS[062]
VSS[063]
VSS[064]
VSS[065]
VSS[066]
VSS[067]
VSS[068]
VSS[069]
VSS[070]
VSS[071]
VSS[072]
VSS[073]
VSS[074]
VSS[075]
VSS[076]
VSS[077]
VSS[078]
VSS[079]
VSS[080]
VSS[081]
VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
K7
L1
L13
L15
L26
L27
L4
L5
M12
M13
M14
M15
M16
M17
M23
M28
M29
M3
N1
N11
N12
N13
N14
N15
N16
N17
N18
N26
N27
N4
N5
N6
P12
P13
P14
P15
P16
P17
P23
P28
P29
R11
R12
R13
R14
R15
R16
R17
R18
R28
R4
T12
T13
T14
T15
T16
T17
T2
U12
U13
U14
U15
U16
U17
U23
U26
U27
U3
U5
V13
V15
V28
V29
W2
W26
W27
Y28
Y29
Y4
AB4
AB23
AB5
AB6
AD5
U4
W24
VSS_NCTF[01]
VSS_NCTF[02]
VSS_NCTF[03]
VSS_NCTF[04]
VSS_NCTF[05]
VSS_NCTF[06]
VSS_NCTF[07]
VSS_NCTF[08]
VSS_NCTF[09]
VSS_NCTF[10]
VSS_NCTF[11]
VSS_NCTF[12]
A1
A2
A28
A29
AH1
AH29
AJ1
AJ2
AJ28
AJ29
B1
B29
+3VS
+3VS
VCCGLAN3_3
4.7U_0805_10V4Z
Security Classification
2006/12/25
Issued Date
Deciphered Date
2007/12/25
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
A23
A5
AA2
AA7
A25
AB1
AB24
AC11
AC14
AC25
AC26
AC27
AD17
AD20
AD28
AD29
AD3
AD4
AD6
AE1
AE12
AE2
AE22
AD1
AE25
AE5
AE6
AE9
AF14
AF16
AF18
AF3
AF4
AG5
AG6
AH10
AH13
AH16
AH19
AH2
AF28
AH22
AH24
AH26
AH3
AH4
AH8
AJ5
B11
B14
B17
B2
B20
B22
B8
C24
C26
C27
C6
D12
D15
D18
D2
D4
E21
E24
E4
E9
F15
E23
F28
F29
F7
G1
E2
G10
G13
G19
G23
G25
G26
G27
H25
H28
H29
H3
H6
J1
J25
J26
J27
J4
J5
K23
K28
K29
K3
K6
+1.05VS
(220UF*1, 1UF*1)
VCC1_5_A[18]
VCC1_5_A[19]
GLAN POWER
R147
1_0603_5%
T2
T3
VCCSATAPLL
USB CORE
+3VS
C145
AJ6
AE7
AF7
AG7
AH7
AJ7
AC7
AD7
close to F1
V5REF_SUS
VCC1_5_B[01]
VCC1_5_B[02]
VCC1_5_B[03]
VCC1_5_B[04]
VCC1_5_B[05]
VCC1_5_B[06]
VCC1_5_B[07]
VCC1_5_B[08]
VCC1_5_B[09]
VCC1_5_B[10]
VCC1_5_B[11]
VCC1_5_B[12]
VCC1_5_B[13]
VCC1_5_B[14]
VCC1_5_B[15]
VCC1_5_B[16]
VCC1_5_B[17]
VCC1_5_B[18]
VCC1_5_B[19]
VCC1_5_B[20]
VCC1_5_B[21]
VCC1_5_B[22]
VCC1_5_B[23]
VCC1_5_B[24]
VCC1_5_B[25]
VCC1_5_B[26]
VCC1_5_B[27]
VCC1_5_B[28]
VCC1_5_B[29]
VCC1_5_B[30]
VCC1_5_B[31]
VCC1_5_B[32]
VCC1_5_B[33]
VCC1_5_B[34]
VCC1_5_B[35]
VCC1_5_B[36]
VCC1_5_B[37]
VCC1_5_B[38]
VCC1_5_B[39]
VCC1_5_B[40]
VCC1_5_B[41]
VCC1_5_B[42]
VCC1_5_B[43]
VCC1_5_B[44]
VCC1_5_B[45]
VCC1_5_B[46]
0.1U_0402_16V4Z
2
2
0.1U_0402_16V4Z
close to D1
G4
AA25
AA26
AA27
AB27
AB28
AB29
D28
D29
E25
E26
E27
F24
F25
G24
H23
H24
J23
J24
K24
K25
L23
L24
L25
M24
M25
N23
N24
N25
P24
P25
R24
R25
R26
R27
T23
T24
T27
T28
T29
U24
U25
V23
V24
V25
W25
Y25
ATX
+5VALW
C227
V5REF[1]
V5REF[2]
ARX
A16
T7
VCCA3GP
+1.5VS_PCIE_ICH
L19 2
1
KC FBM-L11-201209-221LMAT_0805
1
+1.5VS
U5E
CORE
0.1U_0402_16V4Z
2
2
+ICH_V5REF_SUS
1U_0402_6.3V4Z
RB751V_SOD323
100_0402_5%
VCCRTC
VCCP_CORE
+ICH_V5REF
D8
AD25
IDE
C222
PCI
C220
VCCPSUS
2
R149
U5F
+RTCVCC
VCCPUSB
+5VS
Title
ICH8M(4/4)-POWER&GND
Size Document Number
Custom
Rev
1.0
ICL50/ICK70 M/B LA-3551P Schematic
Date:
Sheet
23
of
49
C183
10U_0805_10V4Z
C184
C194
+3VS
C192
1000P_0402_50V7K
10U_0805_10V4Z
1U_0402_6.3V4Z
IDE_DD[0..15]
21 IDE_DD[0..15]
C239
2 0.1U_0402_16V4Z
IDE_DA[0..2]
21 IDE_DA[0..2]
U7
21 IDE_HRESET#
8,20,22,26,30 PLT_RST#
C197
IDE_HRESET#
PLT_RST#
NC7SZ08P5X_NL_SC70-5
IDE_RST#
0.1U_0402_16V4Z
+5VS
JP25
IDE_RST#
IDE_DD7
IDE_DD6
IDE_DD5
IDE_DD4
IDE_DD3
IDE_DD2
IDE_DD1
IDE_DD0
21 IDE_DIOW#
21 IDE_DIORDY
21
IDE_IRQ
21
30
2
IDE_DCS1#
IDE_LED#
+5VS
R169
IDE_DIOW#
IDE_DIORDY
IDE_IRQ
IDE_DA1
IDE_DA0
IDE_DCS1#
IDE_LED#
2
475_0402_1%
IDE_CSEL
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
IDE_DD8
IDE_DD9
IDE_DD10
IDE_DD11
IDE_DD12
IDE_DD13
IDE_DD14
IDE_DD15
IDE_DDREQ
IDE_DIOR#
IDE_DDREQ 21
IDE_DIOR# 21
IDE_DDACK#
IDE_PDIAG#
IDE_DA2
IDE_DCS3#
IDE_DDACK# 21
1
2 R200
100K_0402_5%
+5VS
IDE_DCS3# 21
+5VS
+5VS
0.1U_0402_16V4Z
OCTEK_CDR-50JD1
CONN@
IDE_CSEL
Grounding for Master (When use SATA HDD)
Open or High for Slaver (Normal)
C196
C182
+3VS
C193
1
+5VS
R185
IDE_LED#
100K_0402_5%
1000P_0402_50V7K
2
2
1U_0402_6.3V4Z
C245
0.1U_0402_16V4Z
SATA_ITX_C_DRX_P0
SATA_ITX_C_DRX_N0
SATA_DTX_IRX_N0
SATA_DTX_IRX_P0
21 SATA_DTX_C_IRX_N0
SATA_DTX_C_IRX_N0
1
C566
SATA_DTX_IRX_N0
2
3900P_0402_50V7K
21 SATA_DTX_C_IRX_P0
SATA_DTX_C_IRX_P0
1
C562
SATA_DTX_IRX_P0
2
3900P_0402_50V7K
21 SATA_DTX_C_IRX_P1
SATA_DTX_C_IRX_P1
1
C541
SATA_DTX_IRX_P1
2
3900P_0402_50V7K
21 SATA_DTX_C_IRX_N1
SATA_DTX_C_IRX_N1
1
C539
SATA_DTX_IRX_N1
2
3900P_0402_50V7K
21 SATA_ITX_C_DRX_P1
21 SATA_ITX_C_DRX_N1
SATA_ITX_C_DRX_P1
SATA_ITX_C_DRX_N1
SATA_DTX_IRX_N1
SATA_DTX_IRX_P1
+3VS
+5VS
1
2
3
4
5
6
7
GND
HTX0+
HTX0GND
HRX0HRX0+
GND
23
24
25
26
27
28
29
GND
HTX1+
HTX1GND
HRX1HRX1+
GND
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
VCC3.3
VCC3.3
VCC3.3
GND
GND
GND
VCC5
VCC5
VCC5
GND
RESERVED
GND
VCC12
VCC12
VCC12
30
31
GND1
GND2
OCTEK_SAS-22CA1G
CONN@
Issued Date
Security Classification
2006/12/25
2007/12/25
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
Title
Document Number
Rev
1.0
ICL50/ICK70 M/B LA-3551P Schematic
Date:
Sheet
24
H
of
49
4.7U_0805_10V4Z
0.1U_0402_16V4Z
2
4.7U_0805_10V4Z
CARD@
0.1U_0402_16V4Z
0.1U_0402_16V4Z
CARD@
1000P_0402_50V7K
CARD@
MC_PWREN
CLK_PCI_1394
R295
@ 10_0402_5%
C305
@ 15P_0402_50V8J
PM_CLKRUN#
R417
100K_0402_5%
@
PCI_CBE#3
PCI_CBE#2
PCI_CBE#1
PCI_CBE#0
R322 100_0402_5%
PCI_AD16
1
2
CARD@
20
PCI_PAR
20 PCI_FRAME#
20
PCI_TRDY#
20
PCI_IRDY#
20
PCI_STOP#
20 PCI_DEVSEL#
20
20
PCI_PERR#
PCI_SERR#
20
20
7
21
35
45
C/BE3#
C/BE2#
C/BE1#
C/BE0#
33
23
25
24
29
26
8
30
31
PAR
FRAME#
TRDY#
IRDY#
STOP#
DEVSEL#
IDSEL
PERR#
SERR#
124
123
PCI_REQ#0
PCI_GNT#0
R5C833
VCC_RIN
VCC_ROUT
VCC_ROUT
VCC_ROUT
VCC_ROUT
VCC_ROUT
VCC_3V
VCC_MD3V
AVCC_PHY3V
AVCC_PHY3V
AVCC_PHY3V
AVCC_PHY3V
REQ#
GNT#
CLK_PCI_1394
16 CLK_PCI_1394
20,29 PCI_RST#
GBRST#
PM_CLKRUN#
22,30 PM_CLKRUN#
29,30,33,37,40,43,44
SUSP#
10K_0402_5%
1CARD@
1
0_0402_5%
@
69
66
PCICLK
PCIRST#
GBRST#
CLKRUN#
PME#
INTA#
INTB#
R231
100K_0402_5%
CARD@
111
107
103
102
99
AGND
AGND
AGND
AGND
AGND
+3VS
Y3
GBRST#
C200
1U_0603_10V4Z
CARD@
1394_XI
1394_XO
R191
100K_0402_5%
CARD@
97
24.576MHZ_16P_X8A024576FG1H
CARD@
1
2
C334
0.01U_0402_16V7K
86
98
106
110
112
TPBIAS0
TPA0+
TPA0-
TPBP0
TPBN0
105
104
TPB0+
TPB0-
MDIO00
MDIO01
MDIO02
MDIO03
MDIO04
MDIO05
MDIO06
MDIO07
MDIO08
MDIO09
MDIO10
MDIO11
MDIO12
MDIO13
MDIO14
MDIO15
MDIO16
MDIO17
MDIO18
MDIO19
80
79
78
77
76
75
74
73
88
84
82
81
93
90
91
89
92
87
85
83
XDCD0#_SDCD#
XDCD1#_MSCD#
XD_CE#
R229 1
XDRB#_SDWP R214 1
MC_PWREN
XD_WP#
R230 1
MSEN
XDEN
58
55
XI
XO
94
95
C308
C518
6
5
6
5
R419
5.1K_0402_1%
CARD@
270P_0402_50V7K
CARD@
0.47U_0603_16V4Z
XDWE#_SDCMD_MSBS
XDRE#_SDCLK_MSCLK
XD_SD_MS_D0
XD_SD_MS_D1
XD_SD_MS_D2
XD_SD_MS_D3
XD_D4
XD_D5
XD_D6
XD_D7
XD_CLE
XD_ALE
R248 1
R256 1
XD_R_CE#
2 0_0402_5% CARD@
2 0_0402_5% CARD@SDWP#_R_XDRB#
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
2
2 10K_0402_5% CARD@
2 10K_0402_5% CARD@
OUT
OUT
OUT
FLG
40mil
8
7
6
5
C549 1
MC_PWREN#
C554 1
C546 1
CARD@
4.7U_0805_10V4Z
0.1U_0402_16V4Z
2
2
CARD@2
0.1U_0402_16V4Z
CARD@
TPS2061DRG4_SO8
R451
CARD@
300_0603_5%
CARD@
2
G
R452
150K_0402_5%
@
Q30
2N7002_SOT23
CARD@
+3VS
33
XD-VCC
XD_SD_MS_R_D0
XD_SD_MS_R_D1
XD_SD_MS_R_D2
XD_SD_MS_R_D3
XD_R_D4
XD_R_D5
XD_R_D6
XD_R_D7
8
9
26
27
28
30
31
32
XD-D0
XD-D1
XD-D2
XD-D3
XD-D4
XD-D5
XD-D6
XD-D7
SDCMD_MSBS_R_XDWE#
XD_R_WP#
XD_R_ALE
XD_CD#
SDWP#_R_XDRB#
SDCLK_MSCLK_R_XDRE#
XD_R_CE#
XD_R_CLE
6
7
5
34
1
2
3
4
XD-WE
XD-WP
XD-ALE
XD-CD
XD-R/B
XD-RE
XD-CE
XD-CLE
13
22
4IN1 GND
4IN1 GND
37
38
4IN1 GND
4IN1 GND
+3V_MCVCC
CARD@
CARD@
CARD@
SERIRQ 22,30
4
13
22
28
54
62
63
68
118
122
GND
IN
IN
EN#
JP30
2 0.01U_0402_16V7K
1 10K_0402_5%
2
0.01U_0402_16V7K
R232 1
R245 1
R253 1
MC_PWREN#
1394_XI
1394_XO
C221 1
R246 2
1
C249
1
2
3
4
XD_R_WP#
2 0_0402_5% CARD@
5IN1_LED# 30
R209
R210
R228
R223
R224
R225
R207
R208
R206
R226
R227
R211
+3V_MCVCC
U30
2 10K_0402_5% CARD@
2 10K_0402_5% CARD@
2 100K_0402_5% CARD@
+3VS
D13
XDCD0#_SDCD#
XDCD1#_MSCD#
DAN202UT106_SC70-3
CARD@
XD_CD#
C623
270P_0402_50V7K
CARD@
CARD@
4 IN 1 CONN
SD-VCC
MS-VCC
23
14
SD_CLK
SD-DAT0
SD-DAT1
SD-DAT2
SD-DAT3
SD-CMD
SD-CD-SW
24
25
29
10
11
12
36
SDCLK_MSCLK_R_XDRE#
XD_SD_MS_R_D0
XD_SD_MS_R_D1
XD_SD_MS_R_D2
XD_SD_MS_R_D3
SDCMD_MSBS_R_XDWE#
XDCD0#_SDCD#
SD-WP-SW
35
SDWP#_R_XDRB#
MS-SCLK
MS-DATA0
MS-DATA1
MS-DATA2
MS-DATA3
MS-INS
MS-BS
15
19
20
18
16
17
21
SDCLK_MSCLK_R_XDRE#
XD_SD_MS_R_D0
XD_SD_MS_R_D1
XD_SD_MS_R_D2
XD_SD_MS_R_D3
XDCD1#_MSCD#
SDCMD_MSBS_R_XDWE#
+3V_MCVCC
TAITW_R015-312-LM
CONN@
C208
10P_0402_50V8J
CARD@
Security Classification
2006/12/25
Issued Date
Deciphered Date
2007/12/25
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
4
3
2
1
FOX_UV31413-4R1-TR
CONN@
R418
56_0402_1%
CARD@
+3VS_R5C833
113
72
60
56
65
59
57
C235
1
1
1
1
0.01U_0402_16V7K
0.47U_0603_16V4Z
CARD@ CARD@
CARD@CARD@
67
96
101
100
C295
R5C833-TQFP128P_TQFP128_14x14
C206
10P_0402_50V8J
CARD@
RSV
R420
56_0402_1%
CARD@
JP26
4
3
2
1
+R5C833_ROUT
16
34
64
114
120
109
108
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
TPBIAS0
TPA0+
TPA0TPB0+
TPB0-
61
TPAP0
TPAN0
UDIO0/SRIRQ#
UDIO1
UDIO2
UDIO3
UDIO4
UDIO5
HWSPND#
TEST
+3VS
TPBIAS0
FIL0
REXT
VREF
R216
2
2
R215
+3VS
115
116
PCI_PIRQE#
PCI_PIRQG#
20
20
121
119
71
117
70
10
20
27
32
41
128
56_0402_1%
CARD@
1
1
C522
C521
CARD@
0.33U_0603_10V7K
0.01U_0402_50V7K
2
2 CARD@
PCI_CBE#[0..3]
VCC_PCI3V
VCC_PCI3V
VCC_PCI3V
VCC_PCI3V
VCC_PCI3V
VCC_PCI3V
Q9
2N7002_SOT23
CARD@
20 PCI_AD[0..31]
20 PCI_CBE#[0..3]
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
R422
PCI_AD[0..31]
125
126
127
1
2
3
5
6
9
11
12
14
15
17
18
19
36
37
38
39
40
42
43
44
46
47
48
49
50
51
52
53
56_0402_1%
CARD@
2
G
U11
PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0
15mils
R423
MC_PWREN#
CARD@
2
CARD@
2
IEEE1394 CONN.
R186
10K_0402_5%
CARD@
CARD@
2
C512
CARD@
0.1U_0402_16V4Z
2
2
CARD@
2
C228
CARD@
2
1
C327
1
C310
0.1U_0402_16V4Z
CARD@
1
1
1
C274
C511
C242
1
C223
+3VS
40mil
1 2
1
C294
L21
1
2
BLM18AG601SN1D_0603
CARD@
1
C326
+3VS
0.1U_0402_16V4Z
CARD@
2
0.1U_0402_16V4Z
C331
+3VS_R5C833
40mil
0.1U_0402_16V4Z
+3VS
Title
Document Number
Rev
1.0
ICL50/ICK70 M/B LA-3551P Schematic
Wednesday, August 15, 2007
Sheet
E
25
of
49
+3VALW
+3V_LAN
U35
4.7U_0805_10V4Z
2
+VSB
S
S
S
G
C29
C58
C89
C111
2
G
C28
Q18
MMJT9435T1G_SOT223
C634
@
0.1U_0603_25V7K
C447
R23
2 1_1206_1%
R24
2 1_1206_1%
C30
0.1U_0402_16V4Z
2
2
4.7U_0805_10V4Z
LAN_REGCTL25 1
4.7U_0805_10V4Z
0.1U_0402_16V4Z
2
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
13VLAN_GATE
R508
200K_0402_5%
28,29,37 SYSON#
+3V_LAN
1
AO4468_SO8
@
+3V_LAN
60mil
1
2
3
4
Q6
MMJT9435T1G_SOT223
20mil
1
C52
C449
C110
C31
10U_0805_10V4Z
0.1U_0402_16V4Z
2
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Q40
S @
2N7002_SOT23
1
R19
+3VALW
2
0_1206_5%
LAN BCM5787M
C26
0.1U_0402_16V4Z
2
2
4.7U_0805_10V4Z
LAN_REGCTL12 1
+2.5V_LAN
60mil
+3V_LAN_R
1
C25
D
D
D
D
8
7
6
5
2
4
C24
+1.2V_LAN
60mil
2
4
C448
C80
C42
C91
C112
C39
C457
C450
C41
C464
10U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
2
2
2
2
2
2
2
2
4.7U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+3V_LAN
+3V_LAN
+3V_LAN
U3
2
G
SPROM_DOUT
SPROM_CLK
SPROM_CS
S
2N7002_SOT23
U2
16 CLK_PCIE_LAN
29
PCIE_REFCLK_P
11
CLKREQ
R526 1
2 0_0402_5%
R71
2 10K_0402_5%
+3VS
R88
+3V_LAN
R89
2 1K_0402_5%
2 1K_0402_5%
22 PCIE_PTX_C_IRX_N3
C38
22 PCIE_PTX_C_IRX_P3
C37
2
G
D
5787@
R130
4.7K_0402_5%
1
2
+3V_LAN
PCIE_ITX_C_PRX_N3
32
PCIE_RXD_N
PCIE_ITX_C_PRX_P3
31
PCIE_RXD_P
PCIE_PTX_IRX_N3
25
PCIE_TXD_N
0_0402_5% LAN_RESET#
10
2 @
2
0_0402_5% LAN_PME#
0_0402_5%
12
WAKE
LAN_SMBCLK
58
SMB_CLK
LAN_SMBDATA
57
SMB_DATA
LAN_SMBDATA
SPROM_WP
5787@
R64
4.7K_0402_5%
1
2
+3V_LAN
LAN_SMBCLK
Y2
1
1
2
1
67
66
SCLK(EECLK)
SI
SO(EEDATA)
CS
65
63
64
62
REGCTL12
REGCTL25
RDAC
14
18
37
25MHZ_20P
C136
R77
A0
A1
A2
GND
8
7
6
5
VCC
WP
SCL
SDA
SPROM_WP
SPROM_CLK
SPROM_DOUT
AT24C64AN-10SU-2.7_SO8
2 4.7K_0402_5%
5787@
R128
R102
4.7K_0402_5% 4.7K_0402_5%
0.1U_0402_16V4Z
2
@
2 4.7K_0402_5%
U4
1
2
3
4
LAN_ACTIVITY# 27
R78
+3V_LAN
+3V_LAN
LAN_LINK# 27
17
68
+2.5V_LAN
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
5
13
20
34
55
60
+1.2V_LAN
BIASVDD
PCIE_PLLVDD
PCIE_VDD
PCIE_VDD
36
30
27
33
+LAN_BIASVDD
+LAN_PCIEPLLVDD
+LAN_PCIEVDD
AVDD
AVDD
AVDD
38
45
52
+LAN_AVDD
AVDDL
AVDDL
AVDDL
AVDDL
EXPOSED PAD
39
44
46
51
69
+LAN_AVDDL
GPIO_0(SERIAL_DO)
GPIO_1(SERIAL_DI)
GPIO_2
UART_MODE
XTALI
XTALO
22
XTALO
16
REG_GND
24
PCIE_GND
+LAN_XTALVDD
VDDP
VDDP
21
LAN_REGCTL12
LAN_REGCTL25
LAN_RDAC
1
R62
1.24K_0402_1%
23
6
15
19
56
61
R119
4.7K_0402_5%
@
Change to SA000003510(AT24C64)
L7
1
2
BLM18AG601SN1D_0603
+3V_LAN
1
1K for BCM5906M
20mil
20mil
+2.5V_LAN
C43
0.1U_0402_16V4Z
+LAN_PCIEPLLVDD
1
1
C452
C451
20mil
+LAN_PCIEVDD
1
1
C455
C454
20mil
1
L33
1
2
BLM18AG601SN1D_0603
+1.2V_LAN
0.1U_0402_16V4Z
2
2
4.7U_0805_10V4Z
L8
1
2
BLM18AG601SN1D_0603
0.1U_0402_16V4Z
2
+2.5V_LAN
+LAN_AVDD
1
C107
C88
0.1U_0402_16V4Z
2
5787@
C463
0.1U_0402_16V4Z
2
1
C34
27P_0402_50V8J
2
+1.2V_LAN
L36
1
2
BLM18AG601SN1D_0603
+2.5V_LAN
2
0.1U_0402_16V4Z
20mil
+LAN_AVDDL
1
C95
L34
1
2
BLM18AG601SN1D_0603
2
4.7U_0805_10V4Z
20mil
C53
0.1U_0402_16V4Z
BCM5787MKML_QFN68
2 LAN_XTALO
C35
27P_0402_50V8J
2
R541
0_0402_5%
2
R542
0_0402_5%
SPROM_CLK
SPROM_DIN
SPROM_DOUT
SPROM_CS
XTALVDD
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
PERST
LAN_XTALI
R48
200_0402_1%
2
Q42
@ 2N7002_SOT23
LINKLED
SPD100LED
SPD1000LED
TRAFFICLED
PCIE_TXD_P
26
2
G
1
16,22,28,29 ICH_SMBCLK
VAUX_PRSNT
GPHY_PLLVDD
Q41
@ 2N7002_SOT23
+3V_LAN
VMAIN_PRSNT
ENERGY_DET
PCIE_PTX_IRX_P3
16,22,28,29 ICH_SMBDATA
R66 1
R511 1
22,28,29 ICH_PCIE_WAKE#
30
EC_PME#
+3V_LAN
2 0.1U_0402_16V7K
R67
8,20,22,24,30 PLT_RST#
2 0.1U_0402_16V7K
54
27
27
27
27
27
27
27
27
FOR EMI
35
+LAN_GPHYPLLVDD
22 PCIE_ITX_C_PRX_P3
53
LAN_MIDI0LAN_MIDI0+
LAN_MIDI1LAN_MIDI1+
LAN_MIDI2LAN_MIDI2+
LAN_MIDI3LAN_MIDI3+
LOW PWR
59
30 ENERGY_DET
22 PCIE_ITX_C_PRX_N3
LAN_MIDI0LAN_MIDI0+
LAN_MIDI1LAN_MIDI1+
LAN_MIDI2LAN_MIDI2+
LAN_MIDI3LAN_MIDI3+
+3V_LAN
2
1 LAN_PME#
R514
100K_0402_5%
41
40
42
43
48
47
49
50
TRD0_N
TRD0_P
TRD1_N
TRD1_P
TRD2_N
TRD2_P
TRD3_N
TRD3_P
PCIE_REFCLK_N
C114
0.1U_0402_16V4Z
@
28
30 LAN_LOWPWR
+3V_LAN
1
AT45DB011B-SU_SO8
@
16 CLK_PCIE_LAN#
SPROM_DIN
8
7
6
5
SO
GND
VCC
WP#
SI
SCK
RESET#
CS#
Q52
1
2
3
4
LAN_PME#
EC_PME#
L37
1
2
BLM18AG601SN1D_0603
+1.2V_LAN
2
4.7U_0805_10V4Z
20mil
+LAN_GPHYPLLVDD
1
1
C453
C456
L35
1
2
BLM18AG601SN1D_0603
+1.2V_LAN
0.1U_0402_16V4Z
2
2006/12/25
Issued Date
Security Classification
2007/12/25
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
2
4.7U_0805_10V4Z
Title
LAN BCM5787M
Size
B
Date:
Document Number
Rev
1.0
ICL50/ICK70 M/B LA-3551P Schematic
Sheet
26
of
49
LAN_ACTIVITY#
LAN_LINK#
LAN BCM5787M
@
PSOT24C-LF-T7_SOT23-3
D30
@
PSOT24C-LF-T7_SOT23-3
D31
1
+2.5V_LAN
+3V_LAN
L12
BLM18AG601SN1D_0603
26
26
LAN_MIDI0+
LAN_MIDI0-
LAN_MIDI0+
LAN_MIDI0-
26
26
LAN_MIDI1+
LAN_MIDI1-
LAN_MIDI1+
LAN_MIDI1-
26
26
LAN_MIDI2+
LAN_MIDI2-
LAN_MIDI2+
LAN_MIDI2-
26
26
LAN_MIDI3+
LAN_MIDI3-
LAN_MIDI3+
LAN_MIDI3-
26 LAN_ACTIVITY#
1
2
3
4
5
6
7
8
9
10
11
12
TCT1
TD1+
TD1TCT2
TD2+
TD2TCT3
TD3+
TD3TCT4
TD4+
TD4-
MCT1
MX1+
MX1MCT2
MX2+
MX2MCT3
MX3+
MX3MCT4
MX4+
MX4-
24
23
22
21
20
19
18
17
16
15
14
13
RJ45_MIDI0+
RJ45_MIDI0RJ45_MIDI1+
RJ45_MIDI1RJ45_MIDI2+
RJ45_MIDI2RJ45_MIDI3+
RJ45_MIDI3-
PR4+
RJ45_MIDI1-
PR2-
RJ45_MIDI2-
PR3-
RJ45_MIDI2+
PR3+
RJ45_MIDI1+
PR2+
RJ45_MIDI0-
PR1-
RJ45_MIDI0+
PR1+
15
SHLD2
14
SHLD1
13
Guide Pin
C151
220P_0402_50V7K
16
SHLD1
FOX_JM36113-L2R8-7F
CONN@
2
10
1
1K_0402_5%
SHLD2
PR4-
1
C138
C121
C152
R132
75_0402_1%
C106
R153
75_0402_1%
0.1U_0402_16V4Z
RJ45_GND
1
C108
RJ45_GND
0.1U_0402_16V4Z
LANGND
1
C154
1000P_1206_2KV7K
C134
0.1U_0402_16V4Z
2
5906@
40mil
40mil
C96
4.7U_0805_10V4Z
0.1U_0402_16V4Z
R115
75_0402_1%
RJ45_MIDI3+
0.1U_0402_16V4Z
Amber LED-
2
R154
+3V_LAN
R101
75_0402_1%
0.1U_0402_16V4Z
C146
0.1U_0402_16V4Z
2
5906@
11
RJ45_MIDI3-
LAN_LINK#
26 LAN_LINK#
R118
49.9_0402_1%
5906@
1
2
R152
49.9_0402_1%
5906@
1
1K_0402_5%
T4
350uH_GSL5009LF
5787@
R129
49.9_0402_1%
R148 5906@
49.9_0402_1%
5906@
2
R70
LAN_ACTIVITY#
C94
220P_0402_50V7K
JP18
12 Amber LED+
LAN_ACTIVITY#
1
2
C186
68P_0402_50V8J
@
LAN_LINK#
1
2
C187
68P_0402_50V8J
@
For EMI
Security Classification
2006/12/25
Issued Date
Deciphered Date
2007/12/25
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
Document Number
Rev
1.0
ICL50/ICK70 M/B LA-3551P Schematic
Wednesday, August 15, 2007
Sheet
1
27
of
49
+1.5VS
+3VS
+3VS
C139
4.7U_0805_10V4Z
C480
0.1U_0402_16V4Z
C147
4.7U_0805_10V4Z
C140
0.1U_0402_16V4Z
C133
0.1U_0402_16V4Z
C137
0.1U_0402_16V4Z
2
+1.5VS
C479
TV@
4.7U_0805_10V4Z
C478
TV@
0.1U_0402_16V4Z
+5VS
C477
TV@
4.7U_0805_10V4Z
C483
TV@
0.1U_0402_16V4Z
C482
TV@
0.1U_0402_16V4Z
C481
TV@
0.1U_0402_16V4Z
+5VS
JP21
29 WLAN_BT_DATA
29 WLAN_BT_CLK
16 MINI1_CLKREQ#
R543 1
@
2 0_0402_5%
WLAN_BT_DATA
WLAN_BT_CLK
16 CLK_PCIE_MINI1#
16 CLK_PCIE_MINI1
22 PCIE_PTX_C_IRX_N4
22 PCIE_PTX_C_IRX_P4
22 PCIE_ITX_C_PRX_N4
22 PCIE_ITX_C_PRX_P4
+3VS
E51TXD_P80DATA
E51RXD_P80CLK
30 E51TXD_P80DATA
30 E51RXD_P80CLK
1
3
5
7
9
11
13
15
2
4
6
8
10
12
14
16
2
4
6
8
10
12
14
16
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
ICH_PCIE_WAKE#
+3VS
+1.5VS
16 MINI2_CLKREQ#
16 CLK_PCIE_MINI2#
16 CLK_PCIE_MINI2
WL_OFF#
PLT_RST_BUF#
R544 1
R545 1
ICH_SMBCLK
ICH_SMBDATA
2 0_0603_5%
2 0_0603_5%
WL_OFF# 30
PLT_RST_BUF# 20
+3VS
+3V
ICH_SMBCLK 16,22,26,29
ICH_SMBDATA 16,22,26,29
TV_S_CIN
TV_S_YIN
22 PCIE_PTX_C_IRX_N2
22 PCIE_PTX_C_IRX_P2
22 PCIE_ITX_C_PRX_N2
22 PCIE_ITX_C_PRX_P2
USB20_N7 22
USB20_P7 22
+3VS
(MINI1_LED#)
MINI1_LED# 32
AUDIO_INL
AUDIO_INR
(9~16mA)
30 TV_THERM#
TV_CVBSIN
1
3
5
7
9
11
13
15
1
3
5
7
9
11
13
15
2
4
6
8
10
12
14
16
2
4
6
8
10
12
14
16
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
G1
G2
G3
G3
1
3
5
7
9
11
13
15
FOX_AS0B226-S99N-7F
CONN@
53
54
55
56
53
54
55
56
+3VS
+1.5VS
PLT_RST_BUF#
ICH_SMBCLK
ICH_SMBDATA
USB20_N8 22
USB20_P8 22
(MINI1_LED#)
G1
G2
G3
G3
ICH_PCIE_WAKE#
22,26,29 ICH_PCIE_WAKE#
JP20
FOX_AS0B226-S99N-7F
CONN@
Peak
Normal
+3VS
1000
750
+3V
330
250
+1.5VS
500
375
To USB/B Connector
3
80mil
JP11
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
AV-IN Connector
CIR
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
+5VALW
+5VALW
C368
USB20_N4
USB20_P4
USB20_N4 22
USB20_P4 22
USB20_N6
USB20_P6
USB20_N6 22
USB20_P6 22
AUDIO_INR
AUDIO_INL
TV_S_YIN
TV_S_CIN
TV_CVBSIN_L
R536 1
R537 1
4.7U_0805_10V4Z
2
R554 1
+3VALW
2 0_0402_5%
2 0_0402_5%
2 KC FBMA-11-100505-900T_0402 TV_CVBSIN
RCIRRX 30
SYSON# 26,29,37
ACES_87213-2000
CONN@
FOR EMI
2006/12/25
Issued Date
Security Classification
2007/12/25
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
Title
Document Number
Rev
1.0
ICL50/ICK70 M/B LA-3551P Schematic
Sheet
28
of
49
U16
+1.5VS
2 100K_0402_5% CP_USB#
2 100K_0402_5% CP_PE#
SUSP#
SYSON
PCI_RST#
Aux_out
20
3.3Vaux_in
18
19
1.5Vin1
1.5Vin2
14
15
4
3
2
CPUSB#
CPPE#
STBY#
SHDN#
SYSRST#
OC#
23
RCLKEN
PERST#
22
9
C390
40mil
+3VALW_CARD
40mil
16
17
1.5Vout1
1.5Vout2
Imax = 0.275A
+3VS_CARD
1
10
12
13
24
11
10U_0805_10V4Z
2
Imax = 1.35A
C387
C366
C362
C365
22
22
C401
USB20_N1
USB20_P1
CP_USB#
10U_0805_10V4Z
2
2
0.1U_0402_16V4Z
TPS2231PWPR_PWP24
2
5
2
NC7SZ32P5X_NL_SC70-5
Q15
2N7002_SOT23
PERST1#
+3VS_CARD
+3VS
+1.5VS
+3VS
2
1
22,26,28 ICH_PCIE_WAKE#
+3VALW_CARD
RCLKEN1
PERST1#
RCLKEN1 2
G
C363
C412
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
16,22,26,28 ICH_SMBCLK
16,22,26,28 ICH_SMBDATA
+1.5VS_CARD
CLKREQ1#
+3V
C367
10U_0805_10V4Z
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
R338
10K_0402_5%
+3VS
JP9
Imax = 0.75A
+1.5VS_CARD
NC1
NC2
NC3
NC4
NC5
GND
R341 1
+3V
R340 1
25,30,33,37,40,43,44 SUSP#
30,37,43 SYSON
20,25 PCI_RST#
7
8
C357
0.1U_0402_16V4Z
22 PCIE_PTX_C_IRX_N1
22 PCIE_PTX_C_IRX_P1
CLKREQ1#
CP_PE#
22 CP_PE#
16 CLK_PCIE_CARD#
16 CLK_PCIE_CARD
U15
G Vcc
21
+3V
3.3Vout1
3.3Vout2
+1.5VS_CARD
22 PCIE_ITX_C_PRX_N1
22 PCIE_ITX_C_PRX_P1
EXP_CLKREQ# 16
GND
USB_DUSB_D+
CPUSB#
RSV
RSV
SMB_CLK
SMB_DATA
+1.5V
+1.5V
WAKE#
+3.3VAUX
PERST#
+3.3V
+3.3V
CLKREQ#
CPPE#
REFCLKREFCLK+
GND
PERn0
PERp0
GND
PETn0
PETp0
GND
27
28
3.3Vin1
3.3Vin2
+3VS_CARD
5
6
+3VS
+3VALW_CARD
60mils
GND
GND
GND
GND
29
30
FOX_1CH4110C_LT
CONN@
10U_0805_10V4Z
2
10U_0805_10V4Z
2
10U_0805_10V4Z
2
W=80mils
+USB_VCCA
+3VS
D12
1
1
1
C173+
C164
USB20_P0
C597
BT@
0.1U_0402_16V4Z
22
22
USB20_N2
USB20_P2
22
22
USB20_N0
USB20_P0
W=40mils
+BT_VCC
1
2
3
4
VCC
D0D0+
GND
USB20_N0
USB20_P0
5
6
7
8
VCC
D1D1+
GND
9
10
GND1
GND2
R492
300_0603_5%
BT@
2
1
3
I/O
I/O
D11
USB20_P2
GND
I/O
USB20_N2
80mil
+5VALW
+USB_VCCA
U6
1
2
3
4
GND
IN
IN
EN#
OUT
OUT
OUT
FLG
8
7
6
5
R164
100K_0402_5%
R162 1
2 10K_0402_5%
4.7U_0805_10V4Z
2
R167 1
2 10K_0402_5%
JP12
C169
BT_LED# 30,32
USB_OC#0 22
+BT_VCC
10
1
2
10K_0402_5%
C161
USB_OC#2 22
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
26,28,37 SYSON#
R527
2
G
3
1 GND
2
3
4
5
6
7
8 GND
ACES_87213-0800G
CONN@
Q49
2N7002_SOT23
@
2006/12/25
Issued Date
Security Classification
2007/12/25
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
I/O
+USB_VCCA
TPS2061DRG4_SO8
1
2
3
4
5
6
7
8
28 WLAN_BT_DATA
28 WLAN_BT_CLK
+3V
Q34
2N7002_SOT23
BT@
C171
USB20_P5
USB20_N5
VCC
@ PRTR5V0U2X_SOT143
+BT_VCC
22
22
SUYIN_020122MR008S505ZL
CONN@
2
G
+USB_VCCA
USB20_N0
@ PRTR5V0U2X_SOT143
USB20_N2
USB20_P2
C590
C598
BT@
BT@
4.7U_0805_10V4Z
2
0.1U_0402_16V4Z
JP23
2
Q32
AO3413_SOT23-3
BT@
VCC
3
G
2
10K_0402_5%
BT@
1
R482
BT_ON#
30
150U_D2_6.3VM
470P_0402_50V7K
2
2
2
470P_0402_50V7K
C600
BT@
1U_0603_10V4Z
C592
BT@
0.1U_0402_16V4Z
GND
C167
Title
Document Number
Rev
1.0
ICL50/ICK70 M/B LA-3551P Schematic
Sheet
29
of
49
For EC Tools
+3VALW
L46
D28
28
RCIRRX
EC_RCIRRX
RB751V_SOD323
+5VS
1
R448
1
R444
2 TP_CLK
4.7K_0402_5%
2 TP_DATA
4.7K_0402_5%
17,32,41
17,32,41
4
4
+5VALW
B
1
R460
1
R458
1
R456
1
R454
EC_SMB_CK1
2
4.7K_0402_5%
EC_SMB_DA1
2
4.7K_0402_5%
EC_SMB_CK2
2
4.7K_0402_5%
EC_SMB_DA2
2
4.7K_0402_5%
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
22 PM_SLP_S3#
22 PM_SLP_S5#
22
EC_SMI#
32,35
LID_SW#
25,29,33,37,40,43,44 SUSP#
22 PBTN_OUT#
26
EC_PME#
22 EC_THERM#
36 FAN_SPEED1
29
BT_ON#
33
ON/OFF
32 PWR_SUSP_LED
32
NUM_LED#
67
9
22
33
96
111
125
KSI0/GPIO30
KSI1/GPIO31
KSI2/GPIO32
KSI3/GPIO33
KSI4/GPIO34
KSI5/GPIO35
KSI6/GPIO36
KSI7/GPIO37
KSO0/GPIO20
KSO1/GPIO21
KSO2/GPIO22
KSO3/GPIO23
KSO4/GPIO24
KSO5/GPIO25 Int. K/B
KSO6/GPIO26 Matrix
KSO7/GPIO27
KSO8/GPIO28
KSO9/GPIO29
KSO10/GPIO2A
KSO11/GPIO2B
KSO12/GPIO2C
KSO13/GPIO2D
KSO14/GPIO2E
KSO15/GPIO2F
KSO16/GPIO48
KSO17/GPIO49
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
77
78
79
80
SCL1/GPIO44
SDA1/GPIO45
SCL2/GPIO46
SDA2/GPIO47
PM_SLP_S3#
PM_SLP_S5#
EC_SMI#
LID_SW#
SUSP#
PBTN_OUT#
EC_PME#
6
14
15
16
17
18
19
25
28
29
30
31
32
34
36
AVCC
63
64
65
66
75
76
BATT_TEMP
BATT_OVP
DAC_BRIG/DA0/GPIO3C
EN_DFAN1/DA1/GPIO3D
IREF/DA2/GPIO3E
DA3/GPIO3F
68
70
71
72
DAC_BRIG
EN_DFAN1
IREF
PSCLK1/GPIO4A
PSDAT1/GPIO4B
PSCLK2/GPIO4C
PSDAT2/GPIO4D
TP_CLK/PSCLK3/GPIO4E
TP_DATA/PSDAT3/GPIO4F
83
84
85
86
87
88
EC_MUTE
SDICS#/GPXOA00
SDICLK/GPXOA01
SDIDO/GPXOA02
SDIDI/GPXID0
97
98
99
109
3S/4S#
65W/90W#
SBPWR_EN
TV_THERM#
SPIDI/RD#
SPIDO/WR#
SPICLK/GPIO58
SPICS#
119
120
126
128
EC_SPIDI/FWR#
EC_SPIDO/FRD#
EC_SPICLK
EC_SPICS#/FSEL#
CIR_RX/GPIO40
CIR_RLC_TX/GPIO41
FSTCHG/SELIO#/GPIO50
BATT_CHGI_LED#/GPIO52
CAPS_LED#/GPIO53
BATT_LOW_LED#/GPIO54
SUSP_LED#/GPIO55
SYSON/GPIO56
VR_ON/XCLK32K/GPIO57
AC_IN/GPIO59
73
74
89
90
91
92
93
95
121
127
EC_RCIRRX
EC_RSMRST#/GPXO03
EC_LID_OUT#/GPXO04
EC_ON/GPXO05
EC_SWI#/GPXO06
ICH_PWROK/GPXO06
GPO
BKOFF#/GPXO08
WL_OFF#/GPXO09
GPXO10
GPXO11
100
101
102
103
104
105
106
107
108
PM_SLP_S4#/GPXID1
ENBKL/GPXID2
GPXID3
GPXID4
GPXID5
GPXID6
GPXID7
110
112
114
115
116
117
118
122
123
V18R
124
PS2 Interface
GPIO
SM Bus
PM_SLP_S3#/GPIO04
PM_SLP_S5#/GPIO07
EC_SMI#/GPIO08
LID_SW#/GPIO0A
SUSP#/GPIO0B
PBTN_OUT#/GPIO0C
GPIO
EC_PME#/GPIO0D
EC_THERM#/GPIO11
FAN_SPEED1/FANFB1/GPIO14
FANFB2/GPIO15
EC_TX/GPIO16
EC_RX/GPIO17
ON_OFF/GPIO18
PWR_LED#/GPIO19
NUMLED#/GPIO1A
GPI
XCLK1
XCLK0
AD_BID0
11
24
35
94
113
A
20mil
3S/4S#
ENERGY_DET 26
+3VS
DAC_BRIG 18
EN_DFAN1 36
IREF
40
CHGSEL 40
TV_THERM#
2
R497
EC_MUTE 35
LAN_LOWPWR 26
WL_LED# 32
BT_LED# 29,32
TP_CLK 32
TP_DATA 32
WL_LED#
TP_CLK
TP_DATA
EC_RSMRST# 22
EC_LID_OUT# 22
EC_ON
33
EC_SWI# 22
EC_PWROK 33
BKOFF# 18
WL_OFF# 28
MEDIA_LED# 32
CALIBRATE 40
R465
100K_0402_5%
IDE_LED#
AD_BID0
R464
Rb
C538
C565
56K_0402_5%
2
5787@ 0.1U_0402_16V4Z
B
EC_CRY1
EC_CRY2
10P_0402_50V8J
2
PM_SLP_S4# 22
ENBKL
10,17
EAPD
34
SATA_LED# 21
5IN1_LED# 25
IDE_LED# 24
ARCADE# 32
C540
10P_0402_50V8J
2
X2
32.768KHZ_12.5P_MC-306
2
0.1U_0402_16V4Z
BATT_TEMP
BATT_OVP
ACIN
Deciphered Date
C640
2
C641
2
C642
2
100P_0402_50V8J
1
100P_0402_50V8J
1
100P_0402_50V8J
1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
+3VALW
Ra
ENBKL
EAPD
SATA_LED#
1
100K_0402_5%
ENCODER_PULSE 35
FSTCHG 40
BATT_GRN_LED# 32,35
CAPS_LED# 32
BATT_AMB_LED# 32,35
PWR_LED 32
SYSON
29,37,43
VR_ON
45
ACIN
22,41
EC_PWROK
BKOFF#
WL_OFF#
MEDIA_LED#
C663
65W/90W#
2
R528
EC_SI_SPI_SO 32
EC_SO_SPI_SI 32
EC_SPICLK 32
EC_SPICS#/FSEL# 32
EC_LID_OUT#
EC_ON
3S/4S# 40
65W/90W# 40
SBPWR_EN 37
TV_THERM# 28
FSTCHG
BATT_GRN_LED#
CAPS_LED#
BATT_AMB_LED#
PWR_LED
SYSON
VR_ON
ACIN
1
100K_0402_5%
+3VALW
Issued Date
2
4.7K_0402_5%
45
L48
ECAGND 2
1
FBM-L11-160808-800LMT_0603
Security Classification
1
R521
BATT_TEMP 41
BATT_OVP 40
ADP_I
40
POUT
@
KB926QFB1_LQFP128_14X14
ACES_85205-0400
@
INVT_PWM 18
BEEP#
34
ENCODER_DIR 35
ACOFF
38,40
ECAGND
2
1
C567 0.01U_0402_16V7K
GND
GND
GND
GND
GND
EC_CRY1
EC_CRY2
BATT_TEMP/AD0/GPIO38
BATT_OVP/AD1/GPIO39
ADP_I/AD2/GPIO3A
Input
AD3/GPIO3B
AD4/GPIO42
SELIO2#/AD5/GPIO43
PWM Output
DA Output
55
56
57
58
59
60
61
62
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
81
82
FAN_SPEED1
BT_ON#
E51TXD_P80DATA
E51RXD_P80CLK
ON/OFF
PWR_SUSP_LED
NUM_LED#
INVT_PWM
BEEP#
2
1
R466
10K_0402_5%
21
23
26
27
INVT_PWM/PWM1/GPIO0F
BEEP#/PWM2/GPIO10
FANPWM1/GPIO12
ACOFF/FANPWM2/GPIO13
AD
E51RXD_P80CLK
E51TXD_P80DATA
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17
+3VALW
EC_SCI#
1
2
3
4
IN
22
EC_SCI#
22,25 PM_CLKRUN#
2
1
R441
47K_0402_5%
2
1
C548
0.1U_0402_16V4Z
PCICLK
PCIRST#/GPIO05
ECRST#
SCI#/GPIO0E
CLKRUN#/GPIO1D
Place on MiniCard
+3VALW
1
2
3
4
OUT
8,20,22,24,26 PLT_RST#
+3VALW
12
13
37
20
38
E51RXD_P80CLK 28
E51TXD_P80DATA 28
NC
16 CLK_PCI_LPC
ACES_85205-0400
@
NC
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0
KSO[0..17] 32
E51RXD_P80CLK
E51TXD_P80DATA
1 @ 33_0402_5%
GA20/GPIO00
KBRST#/GPIO01
SERIRQ#
LFRAME#
LAD3
LAD2
LAD1
LAD0 LPC & MISC
1
2
3
4
1
2
3
4
0.1U_0402_16V4Z
AGND
R447 2
1
2
3
4
5
7
8
10
69
C555
@ 22P_0402_50V8J
2
1
21
EC_GA20
21 EC_KBRST#
22,25 SERIRQ
21 LPC_FRAME#
21
LPC_AD3
21
LPC_AD2
21
LPC_AD1
21
LPC_AD0
KSO[0..17]
C559
32
JP35
VCC
VCC
VCC
VCC
VCC
VCC
U28
KSI[0..7]
2
2
0.1U_0402_16V4Z
JP10
KSI[0..7]
2
2
0.1U_0402_16V4Z
EC_PME#
2
10K_0402_5%
@
C557
1
2+EC_VCCA
2 FBM-L11-160808-800LMT_0603
1
C536
C544
1000P_0402_50V7K
1000P_0402_50V7K
1
1
2
C552
1
R459
+3VALW
0.1U_0402_16V4Z
1
2
0.1U_0402_16V4Z
1 C537
1
C560
ECAGND
1
+3VALW
Title
EC ENE KB926
Size
B
Date:
Document Number
Rev
1.0
ICL50/ICK70 M/B LA-3551P Schematic
Wednesday, August 15, 2007
Sheet
1
30
of
49
Security Classification
2006/12/25
Issued Date
Deciphered Date
2007/12/25
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
EC ENE KB925(Reserved)
Size
B
Date:
Document Number
Rev
1.0
ICL50/ICK70 M/B LA-3551P Schematic
Wednesday, August 15, 2007
Sheet
1
31
of
49
To TP/B Conn.
+5VALW
+5VALW
+5VS
C551 1
100K_0402_5%
2 0.1U_0402_16V4Z
30
30
6
5
4
3
2
1
TP_DATA
TP_CLK
TP_DATA
TP_CLK
U26
8
7
6
5
+3VALW
R442
VCC
WP
SCL
SDA
A0
A1
A2
GND
1
2
3
4
U27
1
3
7
4
30 EC_SPICS#/FSEL#
AT24C16AN-10SI-2.7_SO8
@
CE#
WP#
HOLD#
VSS
C130
VDD
SCK
SI
SO
8
6
5
2
R443 1
R445 1
R438 1
2 0_0402_5%
2 0_0402_5%
2 0_0402_5%
100P_0402_50V8J
EC_SPICLK 30
EC_SO_SPI_SI 30
EC_SI_SPI_SO 30
TP_DATA
MX25L8005M2C-15G_SOP8
+5VS
R437
@
C149
D9
@
PSOT24C_SOT23
0.1U_0402_16V4Z
1
TP_CLK
2
100K_0402_5%
ACES_85201-0605
CONN@
C129
100P_0402_50V8J
2 0.1U_0402_16V4Z
@
17,30,41 EC_SMB_CK1
17,30,41 EC_SMB_DA1
JP6
C550 1
KSI[0..7]
INT_KBD Conn.
KSI[0..7]
KSO[0..17]
30
KSO[0..17] 30
JP5
G2
G1
28
27
To BTN/B Conn.
+3VS +5VS
+5VS
JP2
17
18
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
G17
G18
100P_0402_50V8J
KSO7
C66
100P_0402_50V8J
KSO14
C73
100P_0402_50V8J
KSO6
C65
100P_0402_50V8J
KSO13
C72
100P_0402_50V8J
KSO5
C64
100P_0402_50V8J
KSO12
C71
100P_0402_50V8J
KSO4
C63
100P_0402_50V8J
KSI0
C75
100P_0402_50V8J
KSO3
C62
100P_0402_50V8J
KSO11
C70
100P_0402_50V8J
KSI4
C54
100P_0402_50V8J
KSO10
C69
100P_0402_50V8J
KSO2
C61
100P_0402_50V8J
KSI1
C76
100P_0402_50V8J
KSO1
C60
100P_0402_50V8J
KSI2
C77
100P_0402_50V8J
KSO0
C59
100P_0402_50V8J
KSO9
C68
100P_0402_50V8J
KSI5
C55
100P_0402_50V8J
KSI3
C78
100P_0402_50V8J
KSI6
C56
100P_0402_50V8J
100P_0402_50V8J
C57
+5VALW
ARCADE# 30
51ON#
51ON#
33,38
DAN202UT106_SC70-3
+3VALW
C22
PWR_LED#
0.1U_0402_16V4Z
PWR_SUSP_LED#
R358
LED1
15@ 300_0402_5%
3
1
2
PWR_LED#
15@
1
PWR_SUSP_LED#
KSI5
KSO0
ARCADE_BTN#
30 PWR_SUSP_LED
S Q4
2N7002_SOT23
NUM_LED# 30
CAPS_LED# 30
MEDIA_LED# 30
R565
100K_0402_5%
30,35
2
G
+5VS
+3VALW
LID_SW#
S Q37
2N7002_SOT23
2
G
R566
100K_0402_5%
@
WL_R_LED#
1
R529
1
R530
2
0_0402_5%
2
0_0402_5%
WL_LED# 30
MINI1_LED# 28
PWR_LED#
C645 1
2 @ 100P_0402_50V8J
KSO0
(Acadia 960)
ON/OFFBTN#
C646 1
2 @ 100P_0402_50V8J
LID_SW#
C655 1
2 @ 100P_0402_50V8J
KSI1
WL_BTN#
WL_BTN#
WL_R_LED#
C647 1
2 @ 100P_0402_50V8J
KSI5
C656 1
2 @ 100P_0402_50V8J
KSI2
BT_BTN#
VOL_DOWN
BT_LED#
C648 1
2 @ 100P_0402_50V8J
KSI3
EMAIL_BTN#
VOL_UP
PWR_SUSP_LED#C649 1
2 @ 100P_0402_50V8J
ARCADE_BTN# C657 1
2 @ 100P_0402_50V8J
KSI4
IE_BTN#
N/A
KSO0
C650 1
2 @ 100P_0402_50V8J
NUM_LED#
C658 1
2 @ 100P_0402_50V8J
KSI5
E-KEY_BTN#
E-KEY_BTN#
KSI1
C651 1
2 @ 100P_0402_50V8J
CAPS_LED#
C659 1
2 @ 100P_0402_50V8J
KSI2
C652 1
2 @ 100P_0402_50V8J
MEDIA_LED#
C660 1
2 @ 100P_0402_50V8J
KSI3
C653 1
2 @ 100P_0402_50V8J
KSI4
C654 1
2 @ 100P_0402_50V8J
PWR_LED# 35
R495
2
453_0402_1%
PWR_LED
FOR EMI
100P_0402_50V8J
KSI7
YG
+5VS
ARCADE_BTN# 1
BT_LED# 29,30
ACES_85201-1205
CONN@
15@
Compal Footprint
ON/OFFBTN# 33
WL_R_LED#
BT_LED#
PWR_SUSP_LED#
KSO0
KSI1
KSI2
KSI3
KSI4
2
+3VALW
100K_0402_5%
1
R16
D6
0.1U_0402_16V4Z
30
1
2
3
4
5
6
7
8
9
10
11
12
CONN@
C74
C21
PWR_LED#
JP36
KSO15
C67
+5VALW
ACES_85201-16051
CONN@
ACES_85201-26051
KSO8
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
(Right)
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
(Left)
PWR_SUSP_LED# 35
HT-297DQ/GQ_AMB/YG_0603
15@
+5VALW
15@
+5VALW
R357
300_0402_5%
1
2
R494
1
2
453_0402_1%
LED2
3
4
BATT_GRN_LED#
BATT_GRN_LED# 30,35
15@
YG
15" ONLY
BATT_AMB_LED#
BATT_AMB_LED# 30,35
HT-297DQ/GQ_AMB/YG_0603
Issued Date
Security Classification
2006/12/25
Deciphered Date
2007/12/25
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Document Number
Rev
1.0
ICL50/ICK70 M/B LA-3551P Schematic
Monday, August 20, 2007
Sheet
32
of
49
Power Button
ON/OFF switch
TOP Side
R534
R535
+3V
2
@ 10K_0603_5%
2
@ 10K_0603_5%
R434
100K_0402_5%
D27
2
ON/OFF
51ON#
51ON#
21 HDA_SYNC_MDC
21 HDA_SDIN1
21 HDA_RST_MDC#
30
32,38
R117
HDA_SDIN1_MDC
33_0402_5%
1
3
5
7
9
11
GND1
RES0
IAC_SDATA_OUT
RES1
GND2
3.3V
IAC_SYNC
GND3
IAC_SDATA_IN
GND4
IAC_RESET#
IAC_BITCLK
2
4
6
8
10
12
1
R522
2
0_0402_5%
C127
1U_0603_10V4Z
+3V
HDA_BITCLK_MDC 21
1
ON/OFFBTN#
32 ON/OFFBTN#
21 HDA_SDOUT_MDC
Bottom Side
20mil
JP17
DAN202UT106_SC70-3
ACES_88018-124G
CONN@
13
14
15
16
17
18
1
C545
D26
GND
GND
GND
GND
GND
GND
R509
0_0402_5%
C128
22P_0402_50V8J
1000P_0402_50V7K
1
EC_ON
EC_ON
For EMI
D
Q27
2
G
3
30
R428
S 2N7002_SOT23
10K_0402_5%
2
Power ON Circuit
+3VS
+3VALW
RTC Battery
+3VALW
14
P
1
R324
2
@ 0_0402_5%
SYS_PWROK 8,22
BATT1
2
30
1
R318
EC_PWROK
+RTCBATT
+RTCBATT
2
0_0402_5%
+3VALW
+3VALW
R15
1K_0402_5%
ML1220T13RE
45@
+3VS
D5
1 1
C300
1U_0805_25V4Z
2
G
Q13
2N7002_SOT23
O
7
SUSP
U14B
SN74LVC14APWLE_TSSOP14
2
37,42
1
D
U14A
SN74LVC14APWLE_TSSOP14
14
R331
180K_0402_5%
14
I
VS_ON
44
For +VCCP/+1.05VS
BAS40-04_SOT23-3
1
2
+3VALW
C319
10
13
D16
14
12
1
R552
2
0_0402_5%
VGA_ON
17
+3VS
I
G
U14F
SN74LVC14APWLE_TSSOP14
14
U14E
SN74LVC14APWLE_TSSOP14
P
11
0.1U_0402_16V4Z
+3VALW
+CHGRTC
C20
2 0.1U_0402_16V4Z
2005/10/20
RB751V_SOD323
2
PM@
C330
PM@
0.1U_0402_16V4Z
1
SUSP#
1
R553
2
@ 0_0402_5%
2006/12/25
Issued Date
Security Classification
2007/12/25
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
+RTCVCC
P
6
O
G
0.1U_0402_16V4Z
C333
RB751V_SOD323
U14D
SN74LVC14APWLE_TSSOP14
SUSP# 1
SUSP#
U14C
SN74LVC14APWLE_TSSOP14
10K_0402_1%
D18
25,29,30,37,40,43,44
14
R328
Title
Document Number
Rev
1.0
ICL50/ICK70 M/B LA-3551P Schematic
Sheet
33
of
49
+VDDA
1
R478
10K_0402_5%
C591
2
1U_0402_6.3V4Z
R483
10K_0402_5%
60mil
U32
4
VIN
1
1
L50 1
C581
C588
2
KC FBM-L11-201209-221LMAT_0805
10U_0805_10V4Z
2
2
0.1U_0402_16V4Z
DELAY
ERROR
SD
VOUT
SENSE or ADJ
CNOISE
GND
40mil
R467
30K_0402_1%
1
C587
MONO_IN
R490
C
2
C609 1
1U_0402_6.3V4Z
R491
2
2.4K_0402_1%
2SC2411K_SOT23
560_0402_5%
SB_SPKR
22
1
R485
Q33
2
B
560_0402_5%
R470
10K_0402_1%
0.1U_0402_16V4Z
C604 1
1U_0402_6.3V4Z
C576
10U_0805_10V4Z
C599
1
1U_0402_6.3V4Z
BEEP#
4.85V
SI9182DH-AD_MSOP8
30
+VDDA
2
L49 1
2
KC FBM-L11-201209-221LMAT_0805
+5VS
D29
RB751V_SOD323
2
R493
10K_0402_5%
HD Audio Codec
+AVDD_HDA
C589
INT_MIC_R
C586
LINE_L
35
LINE_R
35
MIC1_L
35
MIC1_R
LINE_L
LINE_R
1
2
C580 AUDIO@
1
2
C577 AUDIO@
MIC1_L
C583
MIC1_R
C579
35 HP_PLUG#
1 5.1K_0402_1%
35 LINEIN_PLUG#
35 MIC_PLUG#
R484 1
R479 2
2 10K_0402_1%
1 20K_0402_1%
35
Sense Pin
SENSE A
SENSE B
Impedance
20K
10K
5.1K
39.2K
20K
10K
5.1K
HP_LEFT
36
HP_RIGHT
MIC2_L
HP_OUT_L
39
AMP_LEFT
MIC2_R
HP_OUT_R
41
AMP_RIGHT
LINE1_L
NC
45
LINE1_R
DMIC_CLK
46
CD_L
NC
43
20
CD_R
NC
44
19
CD_GND
MIC1_R
PCBEEP
RESET#
SYNC
BIT_CLK
SDATA_IN
MONO_OUT
37
LINE1_VREFO
29
GPIO1
31
MIC1_VREFO_L
28
SDATA_OUT
2
3
13
34
GPIO0
GPIO3
SENSE A
SENSE B
47
EAPD
2SPDIF_R 48
0_0402_5%
4
7
10U_0805_10V4Z
2
HP_LEFT 35
HP_RIGHT 35
AMP_LEFT 35
AMP_RIGHT 35
For EMI
1
R507
2
1
0_0402_5%
2 C596
22P_0402_50V8J
HDA_BITCLK_AUDIO
21
MIC1_L
10
SPDIF
+3VS
C593
9
35
LINE_OUT_R
21 HDA_SYNC_AUDIO
1
R480
DVDD
LINE_OUT_L
NC
21 HDA_RST_AUDIO#
MIC1_VREFO_R
32
MIC2_VREFO
30
VREF
27
JDREF
40
NC
33
AVSS1
AVSS2
26
42
HDA_SDIN0_AUDIO
1
R486
SPDIFO
DVSS1
DVSS2
DGND
2
33_0402_5%
HDA_SDIN0 21
WOOFER_MONO 35
10mil
MIC1_VREFO_L
MIC1_VREFO_R
MIC2_VREFO
CODEC_VREF
10mil
1
ALC268-GR_LQFP48_9X9
Codec Signals
39.2K
NC
MIC1_C_L
21
4.7U_0805_6.3V6K
MIC1_C_R
22
4.7U_0805_6.3V6K
MONO_IN
12
EAPD
15
11
30
C594
0.1U_0402_16V4Z
14
MIC2_C_L
16
4.7U_0805_6.3V6K
MIC2_C_R
17
4.7U_0805_6.3V6K
LINE_C_L
23
4.7U_0805_6.3V6K
LINE_C_R
24
4.7U_0805_6.3V6K
18
SENSE_A
2
DVDD_IO
U33
21 HDA_SDOUT_AUDIO
R481 2
L51
MBK1608121YZF_0603
1
2
C569
2
0.1U_0402_16V4Z
C595
35
38
40mil
1
+3VS_DVDD
0.1U_0402_16V4Z
C571
10U_0805_10V4Z
2
R476
20K_0402_1%
35
0.1U_0402_16V4Z
1
C573
25
C572
10U_0805_10V4Z
AVDD2
L47 1
2
FBM-L11-160808-800LMT_0603
AVDD1
+VDDA
20mil
AGND
1
R538
2
0_0805_5%
1
R489
2
0_0805_5%
1
R539
2
0_0805_5%
1
R463
2
0_0805_5%
1
R540
2
0_0805_5%
1
R496
2
0_0805_5%
GND
2006/12/25
2007/12/25
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
GND
GNDA
Security Classification
Issued Date
GNDA
Title
Document Number
Rev
1.0
ICL50/ICK70 M/B LA-3551P Schematic
Date:
Sheet
34
H
of
49
+5VAMP
HP EN
4
6
INR_H
INL_H
HP_R
HP_L
17
18
HPOUT_R
HPOUT_L
CVSS
15
VSS
16
GND
PGND
PGND
CGND
GND
2
23
7
13
29
2
0.01U_0402_16V7K
C575
/SD
28
BEEP
12
14
CP+
CP-
25
BIAS
G1
G2
Left
1
2
1
2
3
4
G1
G2
SPDIF_PLUG#
APA2057A_TSSOP28
2.2U_0805_10V6K
2
+5VSPDIF
Q17
AO3413_SOT23-3
AUDIO@
2
G
Q53
Right
HP_PLUG#
R550
100K_0402_5%
R350
100K_0402_5%
C563
1U_0603_10V4Z
ACES_88266-02001
CONN@
+5VAMP
2
G
Q54
1
2 EC_MUTE
G
Q51
2N7002_SOT23
26
+5VAMP
VOL_AMP
39K_0402_5%
3
4
2
1
2
C644
24
HP_RIGHT_R
39K_0402_5% HP_LEFT_R
R474
100K_0402_1%
VDD
2 100K_0402_5%
8
9
SPKL+
SPKL-
R469 1
LOUT+
LOUT-
C561
1U_0603_10V4Z
2
19
/AMP EN
R472
30K_0402_5%
20
10
27
HP_RIGHT_C 1
2.2U_0805_10V6K
R471
HP_LEFT_C
1
2.2U_0805_10V6K
R468
VOL_AMP
11
ROUT+
ROUT-
2 100K_0402_5%
SPK_R+
SPK_R-
2 0_0603_5%
2 0_0603_5%
1
1
1 1
INR_A
INL_A
R473 1
R28
R26
HP_LEFT
1
2
JP34
SPKR+
SPKRSPKR+
SPKR-
34
HP_RIGHT
1
C574
HP_LEFT
1
C570
1
2
ACES_88266-02001
CONN@
HP_RIGHT
SPK_L+
SPK_L-
<BOM Structure>
+5VAMP
34
2 0_0603_5%
2 0_0603_5%
1
1
20mil
22
21
3
5
HPF Fc = 604Hz
+5VAMP
U31
560_0402_5%
560_0402_5%
AMP_RIGHT_C
1U_0402_6.3V4Z
AMP_LEFT_C
1U_0402_6.3V4Z
PVDD
PVDD
HVDD
CVDD
AMP_RIGHT_C-1
1
C582
AMP_LEFT_C-1
1
2
1
C584
C585
0.47U_0603_16V4Z
R477
R475
1
AMP_LEFT
C643
0.1U_0402_16V4Z
2
C578
0.47U_0603_16V4Z
1
2
JP3
R50
R38
C568
C564
0.1U_0402_16V4Z
2
2
4.7U_0805_10V4Z
AMP_RIGHT
34
SPKL+
SPKL-
34
W=40mil
2 0_0603_5%
2 0_0402_5%
@
1
R531 1
R532 1
+3VS
+5VAMP
S
2N7002_SOT23
S
2N7002_SOT23
20mil
Gain= 14dB
2
C418
17" ONLY
+5VSPDIF
EC_MUTE
+3VALW
31
HPOUT_L_2
2
FBM-11-160808-700T_0603
HPOUT_R_2
2
FBM-11-160808-700T_0603
1
L27
1
L28
34
+5VAMP
BATT_GRN_LED#
BATT_AMB_LED#
PWR_LED#
PWR_SUSP_LED#
BATT_GRN_LED# 30,32
BATT_AMB_LED# 30,32 C612
PWR_LED# 32
0.1U_0402_16V4Z
PWR_SUSP_LED# 32
LID_SW# 30,32
+5VALW
S/PDIF Jack
LINE-IN Jack
MIC-IN Jack
Sub-Woofer
Lid Switch
+3VALW
R51
2.2K_0402_5%
JP4
1
2
1
2
G1
G2
3
4
INT_MIC_R
0_0603_5%
0_0603_5%
R523
R524
2
5
LINE-IN JACK
JP33
220P_0402_50V7K
8
7
@
34
PSOT24C-LF-T7_SOT23-3
D32
LINE_R
LINE_R
LINE_L
LINE_L
C613
220P_0402_50V7K
AUDIO@ 2
1
NC7SZ14P5X_NL_SC70-5
AUDIO@
MIC JACK
C349
0.1U_0402_16V4Z
AUDIO@
U13
1
2
3
4
5
6
7
CD1#
D1
CP1
SD1#
Q1
Q1#
GND
VCC
CD2#
D2
CP2
SD2#
Q2
Q2#
R488
2.2K_0402_5%
14
13
12
11
10
09
08
TC74LCX74FT_TSSOP14
AUDIO@
34
MIC1_R
34
MIC1_L
C345
0.1U_0402_16V4Z
AUDIO@
1
L52
1
L53
34
R487
2.2K_0402_5%
2 FBM-11-160808-700T_0603
8
7
MIC_PLUG#
MIC_PLUG#
MIC2_R_1
3
6
2
1
MIC2_L_1
1
C602
220P_0402_50V7K
SINGA_2SJ-E351-S01
CONN@
4
ENCODER_DIR 30
ENCODER_PULSE 30
Issued Date
2007/12/25
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
5
4
2 FBM-11-160808-700T_0603
C603
220P_0402_50V7K
JP32
MIC1_VREFO_R
1
MIC1_VREFO_L
Security Classification
SINGA_2SJ-E351-S03
CONN@
C601
220P_0402_50V7K
2 AUDIO@
+3VS
3
6
2
1
FOR EMI
5
4
LINE_L_R
2
FBM-11-160808-700T_0603
AUDIO@
1
1
1
L55
2
10K_0402_5%
AUDIO@ 1
1
C341
C329
AUDIO@ AUDIO@
2
LINEIN_PLUG#
AUDIO@
FBM-11-160808-700T_0603
LINE_R_R
2
L54
1
1
1
R446
U12
Y
SINGA_2SJ-E373-T01
CONN@
C36
34
R330
100K_0402_5%
AUDIO@
A
3
1
3
5
2
2
10K_0402_5%
AUDIO@
NC
XRE094PHDINB1-2-12-E-7016_3P
AUDIO@
1
R436
0.01U_0402_16V7K
GND
0.01U_0402_16V7K
COM
1
2
A
2
100P_0402_50V8J
34 LINEIN_PLUG#
+3VS
0.1U_0402_16V4Z
AUDIO@
4
GND
U29
4
7
8
10
SPDIF
INT_MIC_R 34
+3VS
C347
2
C416
R556
0_0402_5%
0.1U_0402_16V4Z
+3VS
SPDIF_PLUG#
INT_MIC_R
R435
10K_0402_5%
AUDIO@
1
2
6
3
SPDIF
+5VSPDIF
HPPLUG#
15mil
R450
10K_0402_5%
AUDIO@
1
2 HPPLUG#
R551 0_0402_5%
ACES_88266-02001
CONN@
C614
JP31
MIC2_VREFO
FOR EMI
SPDIF_PLUG#
HPPLUG#
LINEIN_PLUG#
MIC_PLUG#
ACES_88107-30001
CONN@
R351
HPOUT_L_1
47_0603_5%
HPOUT_R_1
47_0603_5%
R352
GNDGND
32
0.1U_0402_16V4Z
30
C543
+5VSPDIF
SPDIF
HP_PLUG# 34
MIC2_R_1
MIC2_L_1
+5VAMP
34 WOOFER_MONO
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
HPOUT_R 1
LINE_R_R
LINE_L_R
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
HPOUT_L 1
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
HP_PLUG#
C415
330P_0402_50V7K 330P_0402_50V7K
1
1
JP13
HPOUT_L_2
HPOUT_R_2
To AUDIO/B Connector
Title
Document Number
Rev
1.0
ICL50/ICK70 M/B LA-3551P Schematic
Sheet
35
of
49
H4
H_S354D138
H30
H_S354D138
H10
H_S354D138
H11
H_S354D138
H2
H_S354D138
H18
H_S354D138
H3
H_S354D138
FAN1 Conn
H20
H_S354D138
H29
H_S354D138
+5VS
+5VS
JP16
H21
H8
H_C236BC131D128 H_C236BC131D128
1
2
3
ACES_85205-03001
CONN@
H5
H_C158D158N
H27
H_O197X158D197X158N
For MDC
C442
1000P_0402_50V7K
30 FAN_SPEED1
40mil
H28
H_C335BC140D138
H13
H14
H32
H33
H31
H_C236BC131D128 H_C236BC131D128 H_C236BC131D128 H_C236BC131D128 H_C236BC131D128
R365
10K_0402_5%
+VCC_FAN1
H24
H_S354BC140D138
H6
H16
H17
H7
H_C236BC168D165 H_C236BC168D165 H_C236BC168D165 H_C236BC168D165
C445
1000P_0402_50V7K
1
2
+3VS
Change to SC1BAS16000
BAS16_SOT23-3
C446
10U_0805_10V4Z
1
2
D21
1
G993P1UF_SOP8
8
7
6
5
2
H25
H_C205D98
H26
H_C205D98
H22
H_O89X58D59X28
H23
H_O89X58D59X28
FD5
@
FD6
@
FD7
FD8
FD9
FD10
FD11
FIDUCIAL_C40M80
FIDUCIAL_C40M80
FIDUCIAL_C40M80
FIDUCIAL_C40M80
FD12
FD13
FD14
FD15
FD16
FIDUCIAL_C40M80
FIDUCIAL_C40M80
FIDUCIAL_C40M80
FIDUCIAL_C40M80
FIDUCIAL_C40M80
FIDUCIAL_C40M80
FIDUCIAL_C40M80
FIDUCIAL_C40M80
Security Classification
2006/12/25
Deciphered Date
FIDUCIAL_C40M80
FIDUCIAL_C40M80
FD4
@
1
FD3
FIDUCIAL_C40M80
FIDUCIAL_C40M80
Issued Date
FD2
@
FD1
GND
GND
GND
GND
VEN
VIN
VO
VSET
EN_DFAN1
1
2
3
4
30
+VCC_FAN1
EN_DFAN1
H19
H1
H_C315BC236D138 H_C315BC236D138
H15
H_S354D138
D22
1SS355_SOD323-2
U20
10U_0805_10V4Z
2
C443
1
2007/12/25
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Document Number
Rev
1.0
ICL50/ICK70 M/B LA-3551P Schematic
Wednesday, August 15, 2007
Sheet
36
of
49
+5VALW TO +5VS
+5VS
C631
1
2
3
4
C633
AO4468_SO8
C629
10U_0805_10V4Z
2
2
1U_0603_10V4Z
2
10U_0805_10V4Z
+VSB
3V_GATE
2
1
R505
200K_0402_5%
SYSON
D
2
2 SBPWR_EN#
G
Q38
2N7002_SOT23
Q29
2N7002_SOT23
2
G
R440
100K_0402_5%
C632
0.1U_0603_25V7K
+5VALW
S
2
SBPWR_EN# 2
Q39G
2N7002_SOT23
0.1U_0603_25V7K
S
1
C506
SUSP
2
Q24G
2N7002_SOT23
SYSON
2 SUSP
G
Q23
2N7002_SOT23
SYSON#
26,28,29 SYSON#
5VS_GATE
2
1
R412
200K_0402_5%
R506
470_0603_5%
29,30,43
+VSB
S
S
S
G
R411
470_0603_5%
D
D
D
D
C495
10U_0805_10V4Z
2
2
1U_0603_10V4Z
10U_0805_10V4Z
2
2
10U_0805_10V4Z
8
7
6
5
2
C503
AO4468_SO8
C504
1
2
3
4
R455
100K_0402_5%
U34
S
S
S
G
C498
D
D
D
D
+5VALW
+3V
U22
8
7
6
5
+5VALW
1
2
3
4
S
S
S
G
D
D
D
D
C301
AO4468_SO8
C299
10U_0805_10V4Z
2
2
1U_0603_10V4Z
10U_0805_10V4Z
2
2
10U_0805_10V4Z
Q31
2N7002_SOT23
R457
100K_0402_5%
R306
470_0603_5%
C343
8
7
6
5
2
G
25,29,30,33,40,43,44 SUSP#
1 1
SUSP
+3VS
U10
C344
SUSP
+3VALW
33,42
+3VALW TO +3VS
R462
100K_0402_5%
S
5VS_GATE
2 SUSP
G
Q12
2N7002_SOT23
+5VALW
+1.8V to +1.8VS
R379
100K_0402_5%
+1.8VS
+1.8V
U24
2
1
R439
510K_0402_5%
PM@
SUSP
S
1
30
SBPWR_EN
1.8VS_GATE
SBPWR_EN#
SBPWR_EN#
10U_0805_10V4Z
2
1U_0603_10V4Z
PM@ 2
PM@
23
R427
470_0603_5%
PM@
+VSB
C531
C547
SI4856ADY_SO8
PM@
10U_0805_10V4Z
2
10U_0805_10V4Z
PM@ 2
PM@
SI4856/AO4430
2 SUSP
G
Q26
2N7002_SOT23
PM@
2
G
Q43
S
2N7002_SOT23
3
C533
1
2
3
4
R510
100K_0402_5%
2
S
S
S
G
D
D
D
D
C553
8
7
6
5
C542
0.1U_0603_25V7K
2 PM@
2
G
2
1
D
2 SUSP
G
Q22
2N7002_SOT23
R424
470_0603_5%
@
1
1
1
1
R342
470_0603_5%
@
D
2 SUSP
G
Q16
2N7002_SOT23
@
D
2 SUSP
G
Q19
2N7002_SOT23
PM@
+1.8V
R403
470_0603_5%
D
2 SUSP
G
Q11
2N7002_SOT23
+0.9VS
2
2
1
R374
470_0603_5%
PM@
R204
470_0603_5%
+1.05VS
+2.5VS
+1.5VS
2
Q28
S
2N7002_SOT23
PM@
2 SYSON#
G
Q25
2N7002_SOT23
@
2006/12/25
Issued Date
Security Classification
2007/12/25
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
Title
DC Interface
Size
B
Date:
Document Number
Rev
1.0
ICL50/ICK70 M/B LA-3551P Schematic
Sheet
37
of
49
PD1
RLZ24B_LL34
PR7
1K_1206_5%
1
2
B+
E&T_4510-E04C-01R
PR4
1K_1206_5%
1
2
100K_0402_5%
RLS4148_LL34
PR6
PQ1
TP0610K-T1-E3_SOT23-3
PR5
1
PR3
1K_1206_5%
1
2
PD2
VIN
PR2
1K_1206_5%
1
2
1 2
PR1
10_1206_5%
560P_0402_50V7K
PC4
2
1
12P_0402_50V8J
PC3
2
1
VIN
12P_0402_50V8J
FBMA-L18-453215-900LMA90T_1812
1
2
PC2
2
1
G1
PL1
ADPIN
560P_0402_50V7K
PC1
1
G2
100K_0402_5%
PJP1
VIN
PD3
1 1
PR9
33_1206_5%
PQ4
TP0610K-T1-E3_SOT23-3
51ON#
ACOFF
PQ3
DTC115EUA_SC70-3
PC6
0.1U_0603_25V7K
PR10
100K_0402_5%
0.22U_1206_25V7K
PC5
2
1
CHGRTCP
B+
PR12
2.2M_0402_5%
1
VL
2
32,33
30,40
VS
PR11
22K_0402_5%
1
2
PQ2
DTC115EUA_SC70-3
1 2
RLS4148_LL34
BATT+
PR8
100K_0402_5%
PD4
RB751V-40TE17_SOD323-2
2
1
PR13
499K_0402_1%
ACIN
2006/08/22
1
2
PACIN 40,41
PQ6
DTC115EUA_SC70-3
@ PR22
66.5K_0402_1%
+5VALW
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
PQ5
PR21
RHU002N06_SOT323-3
47K_0402_5%
2
2
1
G
Security Classification
Issued Date
BATT ONLY
Precharge detector
Min.
typ.
Max.
H-->L 6.138V 6.214V 6.359V
L-->H 7.196V 7.349V 7.505V
PR20
34K_0402_1%
2
1
RTCVREF
PR19
499K_0402_1%
Precharge detector
Min.
typ.
Max.
H-->L 14.589V 14.84V 15.243V
L-->H 15.562V 15.97V 16.388V
PR18
191K_0402_1%
PC9
0.01U_0402_25V7K
PC10
0.1U_0603_25V7K
PRG++ 2
RB715F_SOT323-3
PC7
1U_0805_25V4Z
32.8
8
1
ACON
PC11
1000P_0402_50V7K
40
P
1
GND
1
IN
PU2A
LM393DT_SO8
OUT
PD5
560_0603_5% 560_0603_5%
21,39,41 MAINPWON
PR17
2 1
PC8
1
+CHGRTC
4.7U_0805_6.3V6K
PR16
PR14
100K_0402_1%
PR15
200_0805_5%
PU1
G920AT24U_SOT89-3
RTCVREF
3.3V
VS
Title
DCIN/DECTOR
Size
B
Date:
Document Number
Rev
1.0
ICL50/ICK70
Wednesday, August 15, 2007
D
Sheet
38
of
49
MAX8744_B+
MAX8744_B+
B+
PL2
5
6
7
8
PC16
2200P_0402_50V7K
2
1
D
D
D
D
4
3
2
1
1
2
3
4
CSH3
CSL3
28
CSL3
CSH5
12
CSH5
13
30
CSL5
CSL5
FB3
FB3
FB5
11
FB5
LDO5
20
SKIP
10
@ PR32
2
PGOODA
22
PR182
1
PGOOD3
27
PGOOD5
14
PC28
0.22U_0603_25V7K
Notes :
PR41
@ 47K_0402_5%
PC29
1U_0603_6.3V6M
fESR<=fOSC/ ; fESR=1/(2**RESR*COUT)
ON3 = REF --->3.3V starts up delay 2ms after 5V starts up
1 2
ON5
GND
ILIM
ILM
FSEL
9
ONA
2
1
SPOK
SHDN
ON3
@ PR196
2.2_1206_5%
1
5
6
7
8
FBA
2VREF_8744
PR179
0_0402_5%
2
1
0_0402_5%
12VREF_8744
0_0402_5%
2
41
+5VALWP
OUTA
PC26
4.7U_0805_6.3V6K
1
2
VL
PR33
10K_0402_1%
1
2
32
@ PR38
0_0402_5%
D
D
D
D
1
DRVA
2VREF_8744 1
21,38,41 MAINPWON
REF
PR36
0_0402_5%
2
12VREF_8744
@ PR37
499K_0402_1%
1
2
PC24 0.22U_0603_10V7K
2
PC25
1000P_0402_50V7K
PGND
19
29
PL4
10UH_SIL104R-100PF_4.4A_30%
CSH3
DL5
PC27
150U_D2_6.3VM
18
PR29
6.49K_0402_1%
DL5
PR31
15.4K_0402_1%
2
DL3
PR27
2.61K_0402_1%
2
1
PC22
0.22U_0603_16V7K
1
2
23
PC162
680P_0402_50V7K
17
LX5
G
S
S
S
1
PC20
4
3
2
1
PQ9
SI4810BDY-T1-E3_SO8
PR25
LX3
Delta I=((Vin-Vo)*D)/(F*L)
=((19-3.3)*(3.3/19))/(300K*10U)
=0.908A
BST5A 2
24
PC30
0.047U_0402_16V7K
2
1
DH5
15
DL3
31
16
BST5
DH5
BST3
0.1U_0603_25V7K
LX5
PR34
100K_0402_5%
21
2
PR35
200K_0402_5%
1
2
PZD1
RLZ5.1B_LL34
DH3
LX3
26
8
7
6
5
D
D
D
D
S
S
S
G
25
2VREF_8744
PC23
1000P_0402_50V7K
21
PR40
0_0402_5%
1
2
PC21
0.22U_0603_16V7K
IN
0_0603_5%
EP
PC19
0.1U_0603_25V7K
1
2
3
4
PQ10
SI4810BDY-T1-E3_SO8
DH3
PR24
1 BST3A
0_0603_5%
33
PR39
0_0402_5%
PC161
680P_0402_50V7K
2
1
PR23
2.61K_0402_1%
1
2
PR28
6.49K_0402_1%
2
1
PR30
10K_0402_1%
PR26
6.81K_0402_1%
1
2
PC18
330U_D3L_6.3VM_R25M
PC17
1U_1206_25V7K
1
2
2
@ PR195
2.2_1206_5%
2
1
PU3
MAX8744ETJ+_TQFN32_5X5
PL3
10UH_SIL104R-100PF_4.4A_30%
+3VALWP
PQ8
SI4800BDY-T1-E3_SO8
G
S
S
S
PC15
4.7U_1206_25V6K
2
1
PC14
4.7U_1206_25V6K
2
1
8
7
6
5
PQ7
SI4800BDY-T1-E3_SO8
S
S
S
G
D
D
D
D
PC13
4.7U_1206_25V6K
2
1
PC12
2200P_0402_50V7K
2
1
FBMA-L18-453215-900LMA90T_1812
1
2
Issued Date
Security Classification
2006/08/22
Deciphered Date
2007/08/22
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
Title
+5VALWP/+3VALWP
Size Document Number
Custom
ICL50/ICK70
Date:
Rev
1.0
Sheet
39
of
49
Iada=0~4.74A(90W)
B+
PL15
CSIN
17
CHLIM
BOOT
16
10
ACLIM
VDDP
15
VADJ
LGATE
14
GND
PGND
13
PC132
0.1U_0603_25V7K
PR192
11.5K_0402_1%
2
6251aclim
1
2
UMA@ PQ47
RHU002N06_SOT323-3
PC147
0.01U_0402_25V7K
1
PR178
200K_0402_1%
PR194
20K_0402_1%
2
1
2
8
P
G
6251VREF
PR176
300K_0603_0.1%
12.90V
PU11A
LM358ADT_SO8
+ 3
BATT-OVP=0.1487*BATT+
LOW
HIGH
PR177
10K_0402_5%
2
LI-3S :13.50V--BATT-OVP=2.007V
PR175
845K_0603_1%
@ PR187
@PR187
20K_0402_1%
PU11B
LM358ADT_SO8
13050mV
2800mAH 3S pack
2
G
30 65W/90W#
BATT-OVP=0.1487*BATT+
2
1
2
30 BATT_OVP
@ PQ46
2SC2411K_SOT23-3
E
17.20V
LI-4S :18.0V--BATT-OVP=2.677V
BATT+
VS
6251_EN
C
2
B
CV mode
LOW
2
1
2
G
CALIBRATE
30
PQ45
RHU002N06_SOT323-3
VS
LOW
OVP voltage :
UMA@ PR193
2.37K_0402_1%
17400mV
PC144
4.7U_0805_6.3V6K
@PR186
@PR186
100K_0402_1%
CSON
CHGSEL
IREF=0.43V~3.24V
3S/4S#
26251VDD
PR171
4.7_0603_5%
6251VREF
IREF=0.7224*Icharge
2800mAH 4S pack
DL_CHG
ISL6251AHAZ-T_QSOP24
CC=0.6~4.48A
Charging Voltage
(0x15)
PD14
RB751V-40TE17_SOD323-2
6251VDDP
2
CHGSEL
PC140
0.1U_0603_25V7K
BST_CHGA 2
1
PR183
274K_0402_1%
=1.502V
BATT Type
DH_CHG
PR167
2.2_0603_5%
BST_CHG 1
2
BATT+
PC141
10U_1206_25V6M
2
1
UGATE
PC163
680P_0402_50V7K
VREF
PR199
4.7_1206_5%
1
1 2
PHASE
PQ36
RHU002N06_SOT323-3
2 PACIN
G
PR165
0.02_2512_1%
PL16
10UH_PCMB104T-100MS_6A_20%
CHG
1
2
ICM
18
5
6
7
8
19
D
D
D
D
CSIP
G
S
S
S
VCOMP
PD13
1SS355TE-17_SOD323-2
1
2
4
3
2
1
5
6
7
8
20
D
D
D
D
CSIN
G
S
S
S
ICOMP
PQ38
SI4800BDY-T1-E3_SO8
4
3
2
1
CSOP
PQ40
SI4800BDY-T1-E3_SO8
21
CSOP
CELLS
PR197
20_0603_5%
1
2
PC133
0.047U_0603_16V7K
1
2
PR161
20_0603_5%
2
1
PR162 20_0603_5%
PC136
0.1U_0603_25V7K
1
2
PR198
2.2_0603_5%
LX_CHG
1
CSON
VIN
3
EN
PQ33
DTC115EUA_SC70-3
PQ42
SI2301BDS-T1-E3_SOT23-3
Vaclim=2.39*((10K//152K)/((5.76K//152K)+(10K//152K)))
30
1
2
PR174
100K_0402_1%
CP mode
Iinput=(1/0.02)((0.05*Vaclm)/2.39+0.05)
where Vaclm=1.502V, Iinput=4.07A
23
22
PC146
0.01U_0402_25V7K
6251VREF
ACSET ACPRN
12
DCIN
24
11
PR173
274K_0402_1%
1
2
DCIN
PC131
0.1U_0603_25V7K
2
1
6251aclim
VDD
PC154
0.01U_0402_25V7K
ACOFF
ACOFF
30,38
0.1U_0402_16V7K
PR170
100K_0402_1%
PR156
200K_0402_1%
1
2
PQ41
DTC115EUA_SC70-3
6251VREF
PC139
1
2
IREF
30
2
6251_EN
PR164
100_0402_1%
1
2
2
PC138
100P_0402_50V8J
ADP_I
PR168
80.6K_0402_1%
2
1
PQ39
RHU002N06_SOT323-3
30
PU10
10K_0402_1%
2
PC143
0.01U_0402_25V7K
2
1
1
3
2
G
ACON
ACON
38
PACIN
PR166
22K_0402_5%
PACIN 1
2
SUSP# 25,29,30,33,37,43,44
RB715F_SOT323-3
6800P_0402_25V7K
2
SUSP#
100K_0402_1%
PR163
1
21
VIN
PD11
1SS355TE-17_SOD323-2
ACOFF
1
2
PR155
10K_0402_1%
2FSTCHG
1
PC137
1
2
0.01U_0402_25V7K
38,41
PR184
100K_0402_1%
2
1
PC135
1
PR154
47K_0402_1%
1
2
3S/4S#
30
@ PC134
@PC134
680P_0402_50V7K
CSON 1
2
3
PR160
150K_0402_1%
2
G
2
PQ35
DTC115EUA_SC70-3
S PQ37
RHU002N06_SOT323-3
1
2
PC153
0.1U_0402_16V7K
PR158
47K_0402_5%
PQ34
DTC115EUA_SC70-3
6251VDD
PR159
2
6251VDD 1
PD17
100K_0402_1%
FSTCHG
PQ44
DTC115EUA_SC70-3
PR185
2
PR157
10K_0402_5%
2
1
30
DCIN
PC130
2.2U_0603_6.3V6K
2
1
PC128
5600P_0402_25V7K
1
2
PD16
1SS355TE-17_SOD323-2
1
P3
PC123
10U_1206_25V6M
2
1
4
PR153
200K_0402_1%
2
1
2
3
PC127
0.1U_0603_25V7K
4
1
2
PQ32
DTA144EUA_SC70-3
CSIP
PQ43
TP0610K-T1-E3_SOT23-3
8
7
6
5
4
PR152
47K_0402_1%
1
2
3
PQ31
AO4407_SO8
CHG_B+
FBMA-L18-453215-900LMA90T_1812
1
2
PC126
2200P_0402_25V7K
2
1
PC142
10U_1206_25V6M
2
1
PR151
0.02_2512_1%
P3
8
7
6
5
PC125
0.1U_0603_25V7K
2
1
PQ30
AO4407_SO8
1
2
3
PC145
0.01U_0402_25V7K
P2
1
2
3
PC124
10U_1206_25V6M
2
1
PQ29
AO4407_SO8
8
7
6
5
CP = 85%*Iada ; CP = 4.07A
ADP_I = 19.9*Iadapter*Rsense
VIN
16800mV
LOW
HIGH
16.80V
12600mV
HIGH
HIGH
12.60V
HIGH
HIGH
12.60V
Issued Date
Security Classification
2006/08/22
Deciphered Date
2007/0822
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
Title
CHARGER
Size
Document Number
Rev
1.0
ICL50/ICK70
Date:
Sheet
40
of
49
2
2
PR42
150K_0402_1%
PU2B
LM393DT_SO8
MAINPWON 21,38,39
TM_REF1
PR45
82.5K_0603_1%
1
2
PR49
150K_0402_1%
2
1
VL
PR50
1K_0603_1%
PR44
442K_0603_1%
2
PH1
100K_0603_1%_TH11-4H104FT
2
1
PC34
1000P_0402_50V7K
+3VALWP
PR48
6.49K_0603_1%
1
2
PC33
0.01U_0603_50V7K
PC31
0.1U_0603_25V7K
PC35
1U_0805_16V7K
2
1
1
2
PC32
1000P_0603_50V7K
SMART
Battery:
1,2.BATT+
3.TSA
4.SMC
5.SMD
6,7.GND
PR47
100_0603_1%
2
1
PR46
100_0603_1%
2
1
PR43
9.76K_0402_1%
PR51
150K_0402_1%
BATT+
TSA
EC_SMC1
EC_SMD1
BATT++
VL
VS
PL5
FBMA-L18-453215-900LMA90T_1812
1
2
SUYIN_200275MR007G161ZL
PJP2
1
2
3
4
5
6
7
VL
BATT++
BATT_TEMP
BATT_TEMP 30
EC_SMB_CK1 17,30,32
EC_SMB_DA1 17,30,32
PR52
1M_0402_1%
1
2
VIN
VIN
8
P
PACIN
38,40
PR58
10K_0402_5%
RTCVREF
PU4B
LM393DT_SO8
PQ12
RHU002N06_SOT323-3
2
G
1
SPOK
1
39
22,30
PZD2
RLZ4.3B_LL34
O
4
Vin Detector
Min.
typ.
Max.
H-->L 16.976V 17.257V 17.728V
L-->H 17.430V 17.901V 18.384V
PR62
100K_0402_5%
PR63
0_0402_5%
1
2
ACIN
PACIN
PC39
0.1U_0603_25V7K
ACIN
4
PR60
10K_0402_5%
2
1
1
2
PC38
0.22U_1206_25V7K
VL
PR61
22K_0402_5%
1
2
PU4A
LM393DT_SO8
O 1
1
PC37
0.1U_0603_25V7K
1
PR59
100K_0402_5%
PR55
10K_0402_5%
1
2
2
+VSBP
2
3
B+
PR57
20K_0402_1%
2
1
PC36
1000P_0402_50V7K
PQ11
TP0610K-T1-E3_SOT23-3
PR56
22K_0402_5%
1
2
PR54
10K_0402_5%
VS
PR53
84.5K_0402_1%
@ PC40
0.1U_0402_16V7K
Issued Date
Security Classification
2006/08/22
Deciphered Date
2007/08/22
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
Title
Document Number
Rev
1.0
ICL50/ICK70
Wednesday, August 15, 2007
D
Sheet
41
of
49
+3VALW
PJP3
JUMP_43X118
PM@ PC73
10U_0805_6.3V6M
1
2
+1.8V
TP
1
2
1
PC79
22U_1206_10V6M
PM@ PC77
22U_1206_10V6M
+0.9VSP
2
2
G
+2.5VSP
APL5331KAC-TRL_SO8
PC78
0.1U_0402_16V7K
2
1
PQ19
RHU002N06_SOT323-3
PR114
1K_0402_1%
2
1
33,37 SUSP
SUSP
PR113
0_0402_5%
1
2
VFB
AGND
VTT
VCCA
VTT
REFEN
PM@ PC76
1U_0603_16V6K
1
2
PGND
PM@ PC80
0.047U_0402_16V7K
PM@ PR112
60.4K_0402_1%
NC
VIN
VOUT
PR110
1K_0402_1%
NC
PC75
1U_0603_6.3V6M
VREF
PC74
10U_0805_6.3V6M
PU7
PM@
CM8562IS_PSOP8
PM@ PR115
200K_0402_1%
NC
+3VALW
AGND
GND
PM@ PR111
10_0603_1%
VCNTL
RTCVREF
VIN
PU6
1
+1.8V
+5VALW
PM@
PC81
0.1U_0603_25V7K
PJP4
JUMP_43X118
PM@
PQ20
RHU002N06_SOT323-3
2
G
PM@ PR116
0_0402_5%
1
2
SUSP
C
PJP5
2
+3VALWP
PJP6
1
+3VALW
+1.8VP
JUMP_43X118
PJP7
2
+5VALWP
+5VALW
+2.5VSP
+0.9VS
+1.5VSP
+1.25VS
+VSBP
+1.5VS
+VSB
JUMP_43X118
PJP13
2
PJP12
1
JUMP_43X118
+1.05VSP
+2.5VS
JUMP_43X118
PJP11
2
+1.25VSP
PJP10
1
JUMP_43X118
+1.8V
JUMP_43X118
PJP9
2
PJP8
1
JUMP_43X118
+0.9VSP
JUMP_43X118
PJP14
1
+1.05VS
+1.05VSP
JUMP_43X118
+1.05VS
JUMP_43X118
Issued Date
Security Classification
2006/08/22
2007/08/22
Deciphered Date
+0.9VSP/+2.5VSP
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
Rev
1.0
Sheet
1
42
of
49
+5VALW
ILIM1
VCCA1
25
VCCA_1.8V
LX1
VOUT1
24
Vout_1.8V
DH1
TON1
23
EN/PSV1
22
21
DH2
20
10
VOUT2
LX2
19
11
VCCA2
12
FB2
13
PGD2
14
25,29,30,33,37,40,44 SUSP#
ILIM2
18
VDDP2
17
PR128
ILIM_1.5V
1
2
37.4K_0402_1%
+5VALW
DL2
16
DL_1.5V
PGND2
15
+5VALW
1
2
PC90
4.7U_1206_25V6K
PC97
33P_0402_50V8K
FB_1.5V
PC100
1U_0603_10V6K
+1.5VSP
Vout_1.5V
1
+
PR130
10K_0402_1%
VFB=0.5V
@ PC101
0.1U_0402_16V7K
PR126
0_0603_5%
1
2
0.1U_0603_25V7K
1
2
3
4
AO4916_SO8
LX_1.5V
SC413TSTRT_TSSOP28
2
1
VSSA2
BST_1.5V
1
2
0_0603_5%
DH_1.5V
PC93
1
2
G2
D2
D1/S2/K
D2
D1/S2/K
G1
D1/S2/K S1/A
Close to IC Side
PR131
0_0402_5%
1
PR124
8
7
6
5
PC98
330U_D2E_2.5VM
BST2
TON2
PR121
2
1 B+_1.8/1.5
820K_0402_5%
B+_1.8/1.5
1
PR129
20K_0402_1%
EN/PSV2
PQ22
PGOOD1_1.8V
PC88
1000P_0402_50V7K
1
2
PC89
4.7U_1206_25V6K
2
1
BST1
1
2
3
FB_1.5V
FB_1.8V
PC96
1000P_0402_50V7K
Vout_1.5V
VCCA_1.5V
26
0_0603_5%
27
FB1
VDDP1
PR125
1M_0402_5%
S
S
S
B+_1.8/1.5
0.1U_0603_25V7K
PQ23
FDS6670AS_NL_SO8
<BOM Structure>
PR127
10K_0402_1%
PC91
2
28
PGD1
DL1
DH_1.5V-1
8
7
6
5
DH_1.8V
6
PR123
2 BST_1.8V 7
VSSA1
PGND1
PR119
0_0603_5%
DH_1.8V-1
1
2
D
D
D
D
1
2
FB_1.8V
DL_1.8V
2
PC87
1
2 +5VALW 3
1U_0603_10V6K
1
2 ILIM_1.8V
4
PR120 27.4K_0402_1%
LX_1.8V
5
PC92
33P_0402_50V8K
PC94
330U_D2E_2.5VM
PR122
26.1K_0402_1%
Vout_1.8V
PU8
D
D
D
D
8
7
6
5
BST_1.8V-1
PL10
1UH_SIL104-1R0-R_11A_30%
1
2
PR118
100K_0402_5%
BST_1.5V-1
PQ21
SI4800BDY-T1-E3_SO8
+1.8VP
1
2
3
4
1 2
2
1 2
2
VCCA_1.5V
S
S
S
G
PC85
4.7U_1206_25V6K
2
1
PC86
4.7U_1206_25V6K
2
1
B+_1.8/1.5
PD9
CHP202UPT_SOT323-3
VCCA_1.8V
PC149
1U_0603_10V6K
PR117
10_0603_5%
B+
PL9
FBMA-L11-322513-151LMA50T_1210
1
2
PR180
10_0603_5%
PC82
2.2U_0603_6.3V6K
PC83
1U_0603_10V6K
29,30,37 SYSON
PR133
0_0402_5%
1
Close to IC Side
2
1
PR132
100K_0402_5%
@ PC102
0.1U_0402_16V7K
PGOOD2_1.5V
VFB=0.5V
Vo=VFB*(1+PR129/PR130)=1.5V
VFB=0.5V
Ipeak=4.39A+2.91A=7.3A, Imax=7.3*0.7=5.11A
Vo=VFB*(1+PR122/PR127)=1.805V
Ipeak=11.73A, Imax=8.211A
Ton=(3.3E-12*(PR125+37K)*(Vout/VBat))+50ns
=0.3201us
Ton=(3.3E-12*(PR121+37K)*(Vout/VBat))+50ns
=3.3*10e-12*(820K+37K)*(1.8/19)+50ns=0.3179us
Max:27 mOhm
FDS6670AS:Rds(on)=>Typ:9 mOhm
Ivalleymin=9*E-6*(37.4K/0.027*1.4)=8.904A>7.3*1.2=8.76A
Max:11.5 mOhm
Ivalleymax=11*E-6*(37.4K/0.021*1.1)=17.809A
Iocp=Ivalley+Iripple/2
Iripple=(vin-vout)*(Ton/L)=2.546A, 1/2Iriiple=1.273A
Ivalleymin=10E-6*(PR120/Rds(ON)max*1.5)
Iocp=Ivalley+Iripple/2
=9*10e-6*(27.4K/0.0115*1.5)=14.295A>11.73*1.2=14.076A
OCP==>10.177A~19.082A
Ivalleymax=10E-6*(PR120/Rds(ON)typ*1.2)
=11*10e-6*(27.4K/0.009*1.2)=27.907A.
Security Classification
OCP==>17.029A~30.641A
2006/08/22
Issued Date
Deciphered Date
2007/08/22
+1.5VSP/+1.8VP
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
Rev
1.0
Sheet
1
43
of
49
+5VALW
+5VALW
<BOM Structure>
4
1
PQ28
FDS6670AS_NL_SO8
PC120
1U_0603_10V6K
PR147
10K_0402_1%
1
+
+1.05VSP
Vout_1.05V
DL_1.05V
<BOM Structure>
PC110
4.7U_1206_25V6K
PC117
33P_0402_50V8K
FB_1.05V
VFB=0.5V
+5VS
2
1
1
2
26.1K_0402_1%
DL
PGND
7
PR145
PC118
330U_D2E_2.5VM
10
ILIM_1.05V
1
PR146
11K_0402_1%
LX_1.05V
B+
11
VDDP
0.1U_0603_25V7K
LX
1
2
0_0603_5%
S
S
S
15
13
BST
DH_1.05V
ILIM
17
PU9
SC411MLTRT_MLPQ16_4X4
12
PL12
FBMA-L11-322513-151LMA50T_1210
1
2
3
2
1
PGD
BST_1.05V
DH
PC113
1
2
5
6
7
8
FB
PR141
D
D
D
D
NC
16
TON
VCCA
TP
PGOOD2_1.05V
VSSA
FB_1.05V
NC
VCCA_1.05V
VOUT
PR149
100K_0402_5%
Vout_1.05V
EN/PSV
+5VALW
14
PC109
4.7U_1206_25V6K
2
1
PQ26
SI4800BDY-T1-E3_SO8
4 G
D 5
3 S
D 6
2 S
D 7
1 S
D 8
B+_1.05
BST_1.05V-1
PC116
1000P_0402_50V7K
PD10
1SS355TE-17_SOD323-2
VCCA_1.05V
PR142
1M_0402_5%
B+_1.05 2
1
@PC121
@PC121
0.1U_0402_16V7K
PC104
1U_0603_10V6K
33 VS_ON
PR134
10_0603_5%
PC103
2.2U_0603_6.3V6K
PR148
0_0402_5%
1
2
+1.5VS
Close to IC Side
PJP16
JUMP_43X118
PC155
1U_0603_6.3V6M
Vo=VFB*(1+PR146/PR147)=1.05V
PR188
10K_0402_1%
1
2
Ton=(3.3E-12*(PR142+37K)*(Vout/VBat))+50ns=0.2391us
VOUT
VOUT
FB
VIN
PC156
22U_1206_10V6M
SI4810BDY:Rds(on)=>Typ:9mOhm
Max:11.5 mOhm
+1.25VSP
=9*10E-6*(26.1K/(0.0115*1.5))=13.617A
PC157
0.01U_0402_25V7K
APL5913-KAC-TRL SO 8P
PR190
576_0402_1%
EN
Ivalleymin=9*10E-6*(PR145/Rds(ON)max*1.5)
+
PC160
22U_1206_10V6M
Ivalleymax=11*10E-6*(PR145/Rds(ON)min*1.2)
PC158
@ 150U_D2E_6.3VM_R18
=11*10E-6*(26.1K/(0.009*1.3))=20.076A
Iripple=(vin-vout)*(Ton/L)=4.292A, 1/2Iripple=2.146A
PC159
0.1U_0402_16V7K
GND
SUSP#
25,29,30,33,37,40,43
PR189
100K_0402_5%
1
2
POK
VIN
VCNTL
PU12
PR191
1K_0402_1%
Iocp=Ivalley+Iripple/2
OCP==>15.763A~22.222A
<BOM Structure>
Ipeak=2.91A, Imax=2A.
Vo=0.8*(1+PR190/PR191)=1.2608V
Security Classification
2006/08/22
Issued Date
Deciphered Date
2007/08/22
+1.25VSP/+1.05VSP
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Title
Rev
1.0
Sheet
1
44
of
49
+5VS
DH1
29
DH1_CPU
CPU_VID2
33
D2
LX1
28
LX1_CPU
CPU_VID3
34
D3
DL1
26
DL1_CPU
CPU_VID4
35
D4
PGND1
27
CPU_VID5
36
D5
GND
18
CPU_VID6
37
D6
CSP1
17
CSP1_CPU
71.5K_0402_1%
1
7
TIME
CSN1
16
CSN1_CPU
CCV
FB
12
FB_CPU
DH2_CPU
BST2
20
BST2_CPU
LX2
22
LX2_CPU
DL2
24
DL2_CPU
PGND2
23
CSP2
14
VRHOT
CSN2
15
CSN2_CPU
GNDS
13
POUT
16 CLK_ENABLE#
2
+3VS
VSSSENSE
VSSSENSE
POUT
PR105
10_0402_5%
PR92
@ PC42
100U_25V_M
PC48
2200P_0402_50V7K
2
1
5
6
7
8
D
D
D
D
G
S
S
S
4
3
2
1
PQ18
IRF7832PBF_SO8
5
6
7
8
D
D
D
D
G
S
S
S
PQ17
IRF7832PBF_SO8
4
3
2
1
PC72
1000P_0402_50V7K
1
2 CSN2_CPU
PL8
0.36UH_PCMC104T-R36MN1R17_30A_20%
2
1
Rdcr
R2
R3
PR108
3.48K_0402_1%
1
2
Ceq
Compal Electronics, Inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
PC68 0.22U_0603_16V7K
Choke
Deciphered Date
PH4
10KB_0603_5%_ERTJ1VR103J
2
NTC
1
2005/06/20
Choke
R1
PR109 0_0402_5%
1
2
Issued Date
CPU_B+
PQ16
SI7686DP-T1-E3_SO8
Security Classification
PC47
0.1U_0603_25V7K
2
1
PC57
4700P_0402_25V7K
PR97
20K_0402_1%
25.5mV
PC71
1000P_0402_50V7K
1
2 CSP2_CPU
PC70
1000P_0402_50V7K
1
2 CSN1_CPU
PC69
1000P_0402_50V7K
1
2 CSP1_CPU
2
100_0402_5%
PC58
470P_0603_50V8J
1
2
PC46
10U_1206_25VAK
2
1
PC45
10U_1206_25VAK
2
1
@ PR95
@PR95
3K_0603_1%
1
2
PC66
0.1U_0402_16V7K
PR103
0_0603_5%
1
2
PR104
10K_0402_5%
1
2
2
30
@ PC56 1000P_0402_50V7K
CPU_VCC_SENSE
1
2
3.65K_0402_1%
2
3
2
1
PR100
100_0402_5%
1K_0402_1%
2
PR91
1
@ PR94
@PR94
3K_0603_1%
PR101
56_0402_5%
PC44
10U_1206_25VAK
2
1
@ PR99
@PR99
10K_0402_5%
1
PR98
0_0402_5%
VRHOT
VR_ON
30
MAX8770GTL+_TQFN40
41
TP
PC59
4700P_0402_25V7K
1
2
8,16,22 VGATE
PR88
SHDN
@PR87
@
PR87
1
BSTM2_CPU
PC60
2
1
38
@ PR90
@PR90
2K_0402_1%
2
1
PR89
2K_0402_1%
CSP2_CPU
PR85
0_0402_5%
PC65
2200P_0402_50V7K
2
1
CLKEN
Choke
PR86 0_0402_5%
1
2
PC64
0.1U_0603_25V7K
2
1
PWRGD
PH3
2
0.22U_0603_16V7K
PR107
2.1K_0402_1%
2
1
PC63
10U_1206_25VAK
2
1
PSI
+CPU_CORE
Choke
DPRSTP
PC54
21
PC62
10U_1206_25VAK
2
1
40
10
DH2
+3VS
2
0_0402_5%
2
0_0402_5%
CCI
DPRSLPVR
PR106
4.7_1206_5%
PSI#
REF
NTC
PR79
3.48K_0402_1%
1
2
1
10KB_0603_5%_ERTJ1VR103J
1
2
PC67
680P_0402_50V7K
11
0.22U_0603_16V7K 39
CCI_CPU
PL7
0.36UH_PCMC104T-R36MN1R17_30A_20%
2
1
PC61
10U_1206_25VAK
2
1
1
PR83
1
PR84
5,8,21 H_DPRSTP#
PC55
+CPU_CORE
PR71
0_0603_5%
1
2
8,22 PM_DPRSLPVR
1
PC53
2
BSTM1_CPU 1
D1
VCCSENSE
32
PR80
10_0402_5%
2
1
PR76
2.1K_0402_1%
1
2
PR74
4.7_1206_5%
2
1
BST1_CPU
CPU_VID1
PC52
680P_0402_50V7K
2
1
30
3
2
1
BST1
5
6
7
8
D0
D
D
D
D
31
G
S
S
S
47P_0603_50V8J
1
4
3
2
1
PC51
0.22U_0603_16V7K
5
6
7
8
CPU_VID0
PR82
499_0402_1%
1
2
D
D
D
D
TON
PR81 2
PR66
200K_0402_5%
2
1
1
25
PQ15
IRF7832PBF_SO8
PR78 0_0402_5%
THRM
VDD
G
S
S
S
PR77 0_0402_5%
Vcc
PQ14
IRF7832PBF_SO8
PR75 0_0402_5%
4
3
2
1
PR73 0_0402_5%
19
0_0603_5%
PR72 0_0402_5%
VCC
0.22U_0603_16V7K
PR70 0_0402_5%
PQ13
SI7686DP-T1-E3_SO8
PL6
FBMA-L18-453215-900LMA90T_1812
1
2
1
PU5
NTC
PH2
@PH2
@
100K_0603_1%_TH11-4H104FT
1
2
PR68 0_0402_5%
PR67
13K_0402_1%
2
2
PC49
PC50
2.2U_0603_6.3V6K
1U_0603_6.3V6M
PC43
0.01U_0402_25V7K
1
PR65
10_0402_5%
B+
CPU_B+
PR64
0_1206_5%
5VS12
1
Title
+CPU_CORE
Size Document Number
Custom
ICL50/ICK70
Date:
Rev
1.0
Sheet
1
45
of
49
Fixed Issue
Rev.
PG#
0.1
45
0.2
40
0.2
40
Modify List
Page 1 of 2
for PWR
Date
Phase
10/30/06
EVT
12/21/06
DVT
12/21/06
DVT
12/21/06
DVT
0.2
40
0.2
40
12/21/06
DVT
0.2
40
12/21/06
DVT
0.2
40
Add PC153
12/21/06
DVT
0.2
40
12/21/06
DVT
0.2
40
12/21/06
DVT
10
0.2
40
12/21/06
DVT
11
0.2
40
12/21/06
DVT
12
0.2
40
12/21/06
DVT
13
0.2
40
Add PC154 and PC146 SE075103K80(S CER CAP 0.01U K 25V X7R 0402) 12/21/06
DVT
14
0.2
40
12/21/06
DVT
15
0.2
40
12/21/06
DVT
16
0.2
39
12/21/06
DVT
17
0.2
39
12/21/06
DVT
18
0.2
39
12/21/06
DVT
19
0.2
45
12/21/06
DVT
20
0.2
42
12/21/06
DVT
21
0.2
42
12/21/06
DVT
22
0.2
42
12/21/06
DVT
23
0.2
42
12/21/06
DVT
PIR (PWR)
Rev
ICL50/ICK70
M/B LA-3551P
Schematic
LA-3551P
1.0
Size
Document Number
Date:
Sheet
1
46
of
49
Fixed Issue
Rev.
PG#
Modify List
Date
Phase
0.2
42
10/30/06
EVT
0.2
42
12/21/06
DVT
0.2
42
Delete PC73
12/21/06
DVT
0.2
42
12/21/06
DVT
0.2
42
12/21/06
DVT
0.2
42
12/21/06
DVT
0.2
42
12/21/06
DVT
Cost issue.
0.3
44
12/27/06
DVT
Cost issue.
0.3
44
12/27/06
DVT
10
Cost issue.
0.3
44
12/27/06
DVT
11
Cost issue.
0.3
44
12/27/06
DVT
12
Cost issue.
0.3
44
12/27/06
DVT
13
Cost issue.
0.3
44
12/27/06
DVT
14
Cost issue.
0.3
44
12/27/06
DVT
15
Cost issue.
0.3
44
12/27/06
DVT
16
Cost issue.
0.3
44
12/27/06
DVT
17
Cost issue.
0.3
44
12/27/06
DVT
18
Cost issue.
0.3
44
12/27/06
DVT
19
Cost issue.
0.3
44
12/27/06
DVT
20
Cost issue.
0.3
44
12/27/06
DVT
21
Cost issue.
0.3
44
12/27/06
DVT
22
Cost issue.
0.3
44
12/27/06
DVT
24
Cost issue.
0.3
44
12/27/06
DVT
PIR (PWR)
Rev
ICL50/ICK70
M/B LA-3551P
Schematic
LA-3551P
1.0
Size
Document Number
Date:
Sheet
1
47
of
49
Fixed Issue
Rev.
PG#
Modify List
Date
Phase
Cost issue.
0.3
44
12/27/06
DVT
Cost issue.
0.3
44
12/27/06
DVT
0.3
40
12/27/06
DVT
0.3
43
12/27/06
DVT
0.3
44
Cost issue.
0.3
44
12/27/06
DVT
Cost issue.
0.3
44
12/27/06
DVT
Cost issue.
0.3
44
12/27/06
DVT
Cost issue.
0.3
44
12/27/06
DVT
10
Cost issue.
0.3
44
12/27/06
DVT
11
Cost issue.
0.3
44
12/27/06
DVT
12
Cost issue.
0.3
44
12/27/06
DVT
13
Cost issue.
0.3
44
12/27/06
DVT
14
Cost issue.
0.3
44
12/27/06
DVT
15
0.3
43
12/27/06
DVT
16
Cost issue.
Cost issue.
0.3
44
12/30/06
DVT
17
BOM issue.
BOM issue.
0.3
45
12/30/06
DVT
18
Assembly issue.
0.3
45
12/30/06
DVT
01/04/06
DVT
DVT
19
Cost issue.
Cost issue.
0.4
42
20
Cost issue.
Cost issue.
0.4
42
01/04/06
DVT
21
0.4
45
01/04/06
DVT
22
Delete PQ46
0.4
40
01/04/06
DVT
23
0.4
45
01/04/06
DVT
PIR (PWR)
Rev
ICL50/ICK70
M/B LA-3551P
Schematic
LA-3551P
1.0
Size
Document Number
Date:
Sheet
1
48
of
49
Fixed Issue
Rev.
PG#
Modify List
Date
Phase
D
Cost down
Cost down
0.5
40
03/09/07
PVT
Cost down
Cost down
0.5
40
03/09/07
PVT
0.6
40
04/01/07
Pre-MP
0.6
40
04/01/07
Pre-MP
0.6
42
0.6
42
0.7
39
04/18/07
MP
9
10
11
12
13
14
B
15
16
17
18
19
20
21
22
A
23
Compal Electronics, Inc.
Title
PIR (PWR)
Rev
ICL50/ICK70
M/B LA-3551P
Schematic
LA-3551P
1.0
Size
Document Number
Date:
Sheet
1
49
of
49