Small signal: only 10% or less variation in IC

For the forward active region with fig. 5.13

The simple biasing is not used much in practice due to unstable

variations in parameters
For fig 5.15

This circuit is still of little practical value.

The base voltage Vx is always lower than the collector voltage.

For VA = :
Voltage gain (w/o RE):
Requirements for active:

(w/ RE):

(w/ RE & RB):

Input Impedance (w/o RE):

(w/ RE):

(w/ RE & RB):

Not including RB w/ Rin:
Including RB w/ Rin:

Output Impedance (w/o RE):

w/o RE & w/o Voltage Divider-----------------------------------------------------------

(w/ RE): Doesnt Change

(w/ RE & RB): Doesnt Change

VA

Voltage gain (w/o RE):

Input Impedance (w/o RE):

Doesnt Change
Output Impedance (w/o RE):
(w/ RE & not including RC):

Including RB:

------------------------------------------------------------------------------------

(w/ RE & including RC):

w/o RE, with Voltage Divider ------------------------------------------------------------

------------------------------------------------------------------------------------General CE Stage

------------------------------------------------------------------------------------w/ RE & Voltage Divider, w/o CRE --------------------------------------------------------

Va =

You can use Thevenin equivalents:

------------------------------------------------------------------------------------w RE & Voltage Divider & CRE ------------------------------------------------------------

-------------------------------------------------------------------------------------

Output Resistance (w/o RE on emitter):

(w/ RE on emitter):

Small signal voltage gain (w/o Rs):

(w/ Rs):

(above: if RE is not RE1/gm), which also affects gain:

:
(w/ RB & RE):

Voltage Headroom:

Input resistance (w/o RB):

(w/ RB):

and

Small-signal volage gain

Input Impedance
Output Impedance

For Va