Task 2

VLSI System Design

Nama : Ahmad Nurcholis Majid
NIM

1.

: 13212096

Latency and throghput of 8-point FFT

Tcritical = Tfor longest path = 3 x Tadder + 3 x Tmultiplication = 3 x 10 ns + 3 x 20 ns = 90 ns

Latency = 1 clock cycle x Tcritical = 1 x 90 ns = 90 ns
The throughput of 8-point FFT above is 1 data per clock cyle and 1 data consist 8 bit, so:
Throughput = 8 bit x 1/Tcritical = 8 x 11.1 MHz = 88.8 Mbit/s = 11.1 Mbyte/s

2.

Latency and throughput of pipelined 8-point FFT

note: the white rectangle is register

Tcritical = Tfor longest path = 1 x Tadder + 1 x Tmultiplication = 1 x 10 ns + 1 x 20 ns = 30 ns

Latency = 3 clock cycle x Tcritical = 3 x 30 ns = 90 ns
The throughput of pipelined 8-point FFT above is 1 data per clock cyle and 1 data consist 8
bit, so:
Throughput = 8 bit x 1/Tcritical = 8 x 33.3 MHz = 266.4 Mbit/s = 33.3 Mbyte/s

3.

Latency and throughput of 8-point FFT which only use 2 adder and 1 multiplication

Tcritical = Tfor longest path = 1 x Tadder + 1 x Tmultiplication = 1 x 10 ns + 1 x 20 ns = 30 ns

FFT in picture above can only receive one bit input dan produce one bit output so parallel to
serial converter must be used in the input and serial to parallel converter must be used in the
output to implement FFT which can receive 8 bit parallel data and produce 8 bit parallel data.
Because it only can process one data, and each data must take 3 stage in 8-point FFT so one
data must take 3 clock cycle to get the result. And because there are 8 bit data, so it will take
24 clock cycle to finish FFT of 8 bit data.
Latency = 24 clock cycle x Tcritical = 24 x 30 ns = 720 ns
The throughput of pipelined 8-point FFT above is 1 data per clock cyle and 1 data consist 1
bit, so:
Throughput = 1 bit x 1/Tcritical = 1 x 33.3 MHz = 33.3 Mbit/s = 4.16 Mbyte/s

4.

Graph area - delay of the three condition 8-point FFT above

Condition 1
Area

= 24 x Areaadder + 12 x Areamultiplication = 24 x 2A + 12 x 5A = 48A + 60A = 108A

Delay

= Tmenghasilkan 8 bit output = 90 ns/byte

Condition 2
Area

= 24 x Areaadder + 12 x Areamultiplication + 16 x Arearegister

= 24 x 2A + 12 x 5A + 16 x A = 48A + 60A + 16A = 124A

Delay

= Tmenghasilkan 8 bit output = 30 ns/byte

Condition 3

assume the area of mux and demux is not really big compare to adder and multiplier
2 x Areaadder + 1 x Areamultiplication

Area

2 x 2A + 1 x 5A 9A

The area should be bigger than the result above because of mux and demux but wont be
bigger than FFT in condition 1 and 2.
= Tmenghasilkan 8 bit output = 1/Throughput = 1 / 4.16 Mbyte/s 240.3 ns/byte

Delay

Area (A)

Graph Area - Delay 8-Point FFT

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Condition 1
Condition 2
Condition 3

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Delay (ns)