Sheet

1 of 16

Bandgap reference
The schematic diagram of the bandgap voltage reference is shown in Figure 1.
The bandgap reference has largely independent of temperature and the supply rails and is
therefore used as the controlling current source for mirroring throughout a circuit eg an opamp.
As shown in the diagram there are two voltage sources, one generated across a diode
junction ie VBE (eg the base-emitter junction on a bipolar transistor) and the other a thermal
voltage Vt.
VBE = -2.2mV/C and
Vt
= +0.085mV/C
Thus if multiply Vt by a constant K and combine with VBE it is possible to cancel the
temperature effects of each voltage source to leave a stable reference voltage VREF ie
VREF = VBE + K.Vt

VDD

VDD

Sum

Vref

VBE

Vt

K.Vt

Figure 1 Schematic diagram of a bandgap reference. Vref = K.Vt +VBE.

Sheet
2 of 16

DC
DC
DC1
SweepVar="Tc"
Start=-55
Stop=155
Step=1

BJT_Model
BJTM1
NPN=yes
Vje=0.7
BJT_NPN
BJT2
Model=BJTM1
Area=8
Temp=Tc

Var
Eqn

Vbe

I_DC
SRC1
Idc=100 uA

VAR
VAR1
Tc=23

Figure 2 ADS simulation setup to determine the temperature dependence of Vbe. The
temperature variable of the BJT model Tc is sweep by the DC simulation from 55 to
155 degrees C.

Tcoeff
-1.7966 in mV

m1
800

700

m2
Tc=155.000
Vbe=418.3mV

m1
Tc=-55.000
Vbe=795.6mV

600

Vbe, mV
500

m2
400
-60

-40

-20

20

40

60

80

100

120

140

160

Tc

Eqn Tcoeff=1E3*(Vbe[210]-Vbe[0])/(Tc[210]-Tc[0])
Figure 3 Temperature dependance of Vbe as simulated from the ADS simulation of
Figure 2. Temperature coefficient of VBE ~ -1.79mV/C.

Sheet
3 of 16

Temperature dependance of VBE

We can simulate the temperature effect of VBE by using the ADS simulation shown in Figure
2. In this simulation the temperature parameter of the generic spice BJT model (TC) is sweep
by the DC simulation from 55 to 155 degrees C.
The resulting plot of Vbe vs temperature is shown in Figure 3. An equation has been added to
calculate the temperature coefficient by taking the first and last data points [0] and [210] to
calculate the slope of the graph.
Bipolar collector current is given by : -

Ic = Is .exp

VBE
Vt

Where
Vt = Thermal Voltage given by Where Vt =

kT
q

q = charge on electron = 1.602 x 10 -19 C

K = Boltzmanns constant = 1.3807 x 10 -23 J.K - 1
IS .K.T.n i

- (1)

Where
2

n i = Intrinsic carrier concentrat ion in Silicon (1.5x10 10 cm -3 )

= Mobility of minority carriers
Temperatur e dependance of key variables
O .T m Where m - Eg
2
n i T 3 .exp

K.T

3
2

- (2)

- (3) Where Eg = bandgap voltage = 1.12eV for silicon

Sheet
4 of 16

Sub equations 3 & 2 into 1

- Eg
IS O .T m .K.T.T 3 .exp

K.T

- Eg
= A.T 4 +m .exp
Where constant A includes O .K
K.T

Ic
VBE = VT .Ln
Is
VBE
Ic
of V T .Ln
T
Is
To find

VT
Ic
.Ln
T
Is

Is
Is
1 Is
- VT . .
expand out to get VT Ln.Ic - VT Ln.I S
T
T
I S T

As Ln.ax =

1 y
x x

VBE
VT
Ic V Is
=
.Ln T .
T
T
Is IS T

- Eg
IS = A.T 4 + m .exp

K.T

Use ax n = anx n 1.

dy
dx

Is
- Eg - Eg
- Eg
+ A.T 4 + m .exp
= (4 + m )A..T 3 + m .exp
2
.

T
K.T K.T
K.T
- Eg - Eg
- Eg
.
VT A.T 4 + m .exp
VT (4 + m )A.T 3 + m .exp

VT Is
K.T K.T 2
K.T

.
+
=
IS T
- Eg
- Eg
A.T 4 + m .exp
A.T 4 + m .exp

K.T
K.T
VT Is
V (4 + m )
- Eg
.
= T
+ VT
2
IS T
T
K.T

Sheet
5 of 16

VBE
VT
Ic V Is
.Ln T .
=
T
T
Is IS T
=

VT
Ic V (4 + m)
- Eg
.Ln + T
+ VT
2
T
T
Is
K.T

VBE
V
V (4 + m) kT - Eg
=
= BE + T
+
T
T
T
q K.T 2

kT
Ic
VBE = VT .Ln & Vt =
q
Is
VBE VT (4 + m) 1 - Eg
+
+
T
T
q T

Evaluation of dVBE/dT

VT =

KT 1.3807 x 10 -23 .300

=
= 25.8mV
q
1.602 x 10 -19

Where

Eq = Bandgap voltage (for silicon = 1.12eV) & m = -

3
2

and
K = Boltzmanns constant = 1.3807 x 10 - 23 J.K - 1
q = charge on electron = 1.602 x 10 -19 C
I
VBE = Vt.Ln E
IS

Where IS =

q.A.n i .Dn
QB

Typical values are 10 -14 to 10 -16 A

Where
QB = W B .N A is the number of doping atoms in the base per unit area of the emitter.
(for 0.8um process NA = 3x10 16 for p - type device); W B = base width.
Dn = The average effective value for the electron diffusion constant in the base.
(Typically = 13cm 2 s -1 ).
2

n i = Intrinsic carrier concentrat ion in Silicon (1.5x10

A = Base - Emitter area.

10

cm -3 )

Sheet
6 of 16

To find a typical value for Vbe and Vbe assume IE = 50uA, A = 1um 2
then
I
VBE = Vt.Ln E
IS

Where IS =

q.A.n i .Dn
QB

Q B = W B .N A = 1x10 - 6.3x10 16 = 3x10 10

Is

1.602x10 -19 .1x10 -6. 1.5x10 10 .0.013

= 1.562x10
3x10 10

50x10 - 6
VBE = 2 5 .8 x10 3.Ln
-17
1.562x10

VBE
=
T

VBE - (4 + m)VT

-17

= 0.743V

Eq
q

VT = 25.8mV & VBE = 0.743V

Where Eq = Bandgap voltage (for silicon = 1.12eV) & m = -

VBE
=
T

0.743 - 4 - 25.8 x10 3 1.11

2

=
300

- 1.44mV/ oK

3
2

Sheet
7 of 16

VPTAT generation
The PTAT term is realised by determining the voltage difference between two forward-biased
diodes (eg VBE). MOS transistors operating in the weak inversion region can also be used to
form the diodes.

VDD

V02
VBE

V01
Area = A

Q1

VR

Area = nA
Q2

Figure 4 Generation of VPTAT voltage.

We can simulate the variation VPTAT over temperature using the ADS simulation shown in
Figure 5.
If we run the same simulation again but this time on the results graph we calculate Vref given
that we know vbe1 and (vbe1-vbe2). Various values of K were tried until the temperature
compensation was achieved as shown in the graph of Figure 7. This now forms the basis of
the band-gap reference in a practical circuit the voltage summing and setting of K is achieved
using a resistive network and an op-amp.

Sheet
8 of 16

I_DC
SRC1
Idc=100 uA

I_DC
SRC2
Idc=100 uA

BJT_Model
BJTM1
NPN=yes
Vje=0.7

DC
DC
DC1
SweepVar="Tc"
Start=-55
Stop=155
Step=1

BJT_NPN
BJT2
Model=BJTM1
Area=1
Temp=Tc

Vbe1
Var
Eqn

R
R1
R=1 kOhm

BJT_NPN
BJT3
Model=BJTM1
Area=2
Temp=Tc

Vbe2

VAR
VAR1
Tc=23

Figure 5 ADS simulation setup to analyse the variation of VPTAT over temperature. As
for the previous examples the temperature is swept in the DC simulation box. The
resulting plot is shown in Figure 6.

Sheet
9 of 16

Eqn VTAT=Vbe1-Vbe2

m1

0.026
0.024

m2
Tc=-55.000
VTAT=0.013

0.022

VTAT

0.020

m1
Tc=155.000
VTAT=0.026

0.018
0.016
0.014

m2

0.012
-60

-40

-20

20

40

60

80

100 120

140 160

Tc
VTAT_Temp

0.060 mV

Eqn VTAT_Temp=1e3*(VTAT[210]-VTAT[0])/(Tc[210]-Tc[0])
Figure 6 Resulting simulation of VPTAT vs temperature after running the simulation
shown in Figure 5.
.

Sheet
10 of 16

Figure 4 shows how the VPTAT voltage can be realised. If we force V01 and V02 to be the
same then the voltage across the resistor R will be the difference of the two VBEs.

q.VBE

q.VBE

IE = A.JS e kT 1 A.JS e kT When IE > 0

Assume circuit is configuredsuch that IE1 = IE2 then

IE2 A2.JS
e
=
IE1 A1.JS

VBE1- VBE2

Where vt =

vt

kT
q

Assume transistors are from the same process,

such that Js and vt are the same for each device then
VBE1- VBE2

vt

VBE1- VBE2
vt

I A A
= E2 1 = 1 If IE1 = IE2
IE1 A2 A2
A
A
= 1 Rearrange to give VBE1 - VBE2 = vt.Ln 1
A2
A2

A
If A 1 > A 2 then VBE2 - VBE1 = Vt.Ln 1 = Vbe = IE1.R1
A2
A
KT
Let n = 1 and VT =
q
A2
Vbe =

KT
.Ln(n)
q

(IE1 = IE2 )

dy
K
Vbe
= .Ln(n) Using ax n = anx n 1.
dx
q
T

Where
K = Boltzmanns constant = 1.3807 x 10-23 J.K-1
q = charge on electron = 1.602 x 10-19 C
A = Area of base-emitter junction um2

Sheet
11 of 16

1.191
1.190
1.189

Vref

1.188
1.187
1.186
1.185
-60

-40

-20

20

40

60

80

100 120 140 160

Tc

Eqn K=27 Eqn VTAT=Vbe1-Vbe2

Eqn Vref=Vbe1+(K*VTAT)
Figure 7 Graph of the simulation shown in Figure 5. In this case we have calculated
VTAT ie vbe1-vbe2 and evaluated Vref from Vbe1+(K*VPTAT), where K = 27.
BandGap reference voltage

Previously we found Vbe = VBE1 - VBE2 =

and therefore

KT JC1
KT A 1
=

Ln
Ln
q
q
A2
JC2

Vbe VT JC1

=
Ln
T
T
JC2

VBE
VBE VT (4 + m) 1 - Eg
=
+
+
= - 1.44mV/ oK

T
T
T
q T

Sheet
12 of 16

The band-gap reference voltage is given by:VREF = VBE + K.Vt

The temperature stable value of VREF at 300K is 1.262V. Therefore the value of K required is:

VREF = VBE + K.VT Rearrange to get K

K=

VREF VBE
VT

VT =

K=

With VBE = 0.743 (Calculated earlier)

KT 1.3807 x 10 -23.300
=
= 25.8mV
q
1.602 x 10 -19

1.262 0.743
=
25.8x10 -3

20.11

With reference to Figure 8.

The cascode current mirror makes I1 = I2 = I3

A
A
The voltage across R = Vbe = VBE2 - VBE1 = Vt.Ln 1 Let N = 1
A2
A2
and so I2 =

Vt
.Ln(N) = I1 = I3
R

VOUT = I3 .K.R + VBE3

VOUT =

As I3 = I2 sub in I3 =

Vt
.Ln(N) .K.R + VBE3
R

VOUT = Vt.Ln(N) .K + VBE3

Vt
.Ln(N)
R

Sheet
13 of 16

Assume a temperature of 23 o C and that R = 1K; N= 8

vt =

KT
1.38x10-23.(273 + 23))
=
= 0.025V
q
1.602x10 19

A1
8
Vt.Ln
(0.025).Ln

Vbe
A2 =
1 = 52uA at 23 o C
=
I2 =
3
R1
R1
1x10
A1
8
With V = Vt.Ln
= (0.025).Ln = 0.0536V
A2
1
The zero temperature coefficient reference voltage at 23 o C = 1.262V
K =

VREF - Vbe
1.262 - 0.63
=
= 10.45
VT .Ln(N)
0.025.Ln(8)

K.R = 10.45K

Sheet
14 of 16

VDD
M7

M8
M9

M5

M6
M10

M3

M4
Vref

M1

M2

K.R

IE1

Vt
IE2

Q2

Q1

X.N
VEE
Figure 8 Circuit of the bandgap reference used in the example.

Q3
X.N

Sheet
15 of 16

The Bandgap circuit of Figure 8 was entered as a schematic into ADS as shown in figure and
analysed using a DC simulation block. For the simulation, the Temperature variable was
added to the active devices and resistor and the resistor initially set to 10K was varied until
the correct compensated curve resulted.

V_DC
VDD
Vdc=VDD

MOSFET_PMOS
MOSFET4
Model=MOSFETM2
Length=L um
Width=2.2*W um
Temp=T
MOSFET_PMOS
MOSFET7
Model=MOSFETM2
Length=L um
Width=2.2*W um
Temp=T

DC
DC
DC1
SweepVar="T"
Start=-50
Stop=125
Step=1

LEVEL1_Model
MOSFETM1
NMOS=yes
Vto=0.7
Kp=110e-6
Gamma=0.4
Phi=0.7
Lambda=0.04
Cgso=220e-12
Cgdo=220e-12
Cgbo=700E-12
Cj=770e-12
Mj=0.5
Cjsw=380e-12
Mjsw=0.38
Tox=24.7e-4

MOSFET_PMOS
MOSFET10
Model=MOSFETM2
Length=L um
Width=2.2*W um
Temp=T

MOSFET_PMOS
MOSFET8
Model=MOSFETM2
Length=L um
Width=2.2*W um
Temp=T

MOSFET_NMOS
MOSFET5
Model=MOSFETM1
Length=L um
Width=W um
Temp=T

vout
MOSFET_NMOS
MOSFET3
Model=MOSFETM1
Length=L um
Width=W um
Temp=T

MOSFET_NMOS
MOSFET6
Model=MOSFETM1
Length=L um
Width=W um
Temp=T

BJT_PNP
BJT2
Model=BJTM1
Area=1
Region=
Temp=T
Trise=
Mode=nonlinear

MOSFET_PMOS
MOSFET9
Model=MOSFETM2
Length=L um
Width=2.2*W um
Temp=T

MOSFET_PMOS
MOSFET2
Model=MOSFETM2
Length=L um
Width=2.2*W um
Temp=T

Var
Eqn

vbe

VAR
VAR1
L=1.0
T=23
VDD=7.5
W=1.0

BJT_PNP
BJT1
Model=BJTM1
Area=10
Region=
Temp=T
Trise=
Mode=nonlinear

BJT_Model
BJTM1
NPN=no
Vje=0.7

MOSFET_NMOS
MOSFET1
Model=MOSFETM1
Length=L um
Width=W um
Temp=T

R
R6
R=1 kOhm

BJT_PNP
BJT3
Model=BJTM1
Area=10
Region=
Temp=T
Trise=
Mode=nonlinear

R
R7
R=9 kOhm
Temp=T

Figure 9 ADS schematic setup for analysing the bandgap example circuit. R7 was
initially set to 10K (as per the hand calculations) and then varied to optimise the
bandgap voltage vs temperature curve shown in Figure 10

LEVEL1_Model
MOSFETM2
PMOS=yes
Vto=-0.7
Kp=50e-6
Gamma=0.57
Phi=0.8
Lambda=0.04
Cgso=220e-12
Cgdo=220e-12
Cgbo=700E-12
Cj=560e-12
Mj=0.5
Cjsw=350e-12
Mjsw=0.35
Tox=24.7e-4

Sheet
16 of 16

vout, V
1.170

1.168

1.166

1.164

1.162
-60

-40

-20

20

40

60

80

100

120

140

T
Figure 10 Resulting plot from the simulation shown in Figure 8. For this simulation the
temperature parameter for the active devices and resistor was varied over the
temperature range 50 to 125 deg C using the parameter sweep within the DC
simulation block.
One disadvantage of the example circuit is the headroom required on the supply rails. This is
because there are 4 VSAT+VT and a Vbe, resulting in the need to raise the supply from the
nominal +5V to +7.5V. Lower rail circuits tend to use low supply differential op-amp circuits.