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 Section G2: Current Sources and Active Loads

The transistor biasing techniques introduced in earlier sections are not

suitable for the design of IC amplifiers since, even for a relatively simple
multistage amplification system, many resistors and large capacitors are
required. This is problematic for a couple of reasons, most importantly the
cost of chip “real-estate” and fabrication concerns. However, fabrication of
simple transistors has become cheap and easy, as well as providing the
ability to have a large number of transistors with matched characteristics.
Therefore, biasing in integrated circuit (IC) design is based on the use of
transistors configured to act as constant current sources. On a multistage
amplifier IC chip, a constant dc current source is generated at one location
and is then reproduced at different locations for biasing the various
amplification stages. The major advantages to this approach include:

¾ the requirement for resistors, coupling capacitors and bypass capacitors

is removed; and
¾ the biasing of the multiple stages track each other in case of parameter
changes, such as voltage supply or temperature fluctuations.

In this section, we will be looking at several methods of providing a constant

dc current source for amplifier biasing using simple transistor configurations.
Many of the circuits used to generate bias currents are also used for
providing large resistances for IC applications. The active loads created in
this manner, as well as the dc current sources, are small and easy to
fabricate on IC chips.

Diode Connected Transistors

Before we get into current sources, let’s take a little bit to look at the details
of the diode-connected transistor. In this configuration, the base and
collector of the BJT are connected, or shorted as shown in the figures below
for the npn (left) and pnp (right) transistors. The derivation of the currents
on the figures is shown in the center.

Let i E = i
β β
i C = αi E = iE = i
β +1 β +1
iC 1
iB = = i
β β +1
To illustrate the development of the simplified model for a diode-connected
BJT, we’re going to use the npn device. As usual, development for the pnp is
directly analogous with current directions reversed and polarities switched.

Starting with the usual small signal

model, where the base and collector
are shorted, we have:

Assuming rπ << ro, rπ||ro ≈ rπ and the circuit is

simplified to a single resistor in parallel with
the dependent current source:

Now…reflecting rπ from the base circuit to the

emitter circuit (recall that rπ=(β+1)re), we are
left with a short in the base-emitter leg:

The dependent source is shorted out and we end up with a single

resistance between the
base-collector terminal and the emitter terminal.

So, long story short. A diode-connected transistor may be replaced by a

single resistor…pretty cool, huh?

A Simple Current Source (Current Mirror)

The most basic building block in

the design of IC current sources,
also known as the current
mirror, is shown in the figure to
the right (a modified version of
Figure 5.27 in your text). The
transistors, Q1 and Q2, are
matched devices with their bases
and emitters tied together. The transistor designated Q1 in the figure is
connected as a diode by shorting its base and collector terminals.

A reference current, IREF, is the input to the current mirror at the collector of
the diode-connected transistor Q1 and the output is taken from the collector
of Q2. Note: Q2 must remain in the active (linear) region of operation by
keeping its collector voltage higher than the base voltage at all times. It is
important that the loading effect of any circuit fed by this current mirror
should be inspected to ensure maintaining this mode of operation.

The key point to the analysis of the current mirror circuit is that the
transistors are matched and have the same VBE. Using this and examining
the circuit above, the input current IREF flows through Q1 and sets up a
voltage across Q1. This voltage then appears across the base and emitter of
Q2 since the devices are connected in parallel. Assuming the assumption
IC=IE is valid (β≈β+1), and using the fact that the transistors are matched,
the emitter currents of Q1 and Q2 are the same and equal to IREF. As long as
Q2 remains in the active region of operation, the output current, Iout, will also
be approximately equal to IREF.

If the effect of finite β is considered, the currents are as indicated in the

figure above. This may lead to an output current that is not equal to the
input reference current, since

β β +2
I out = I E and I REF = IE , (Equations 5.59 & 5.60)
β +1 β +1

where the expression for IREF is found by using KCL at the collector of Q1.
The current gain of the current mirror is

I out β
= ,
I REF β +2

which approaches unity for β very large. Another deviation of Iout from IREF
has to do with the Early effect. Since the VBE of Q2 is constant as determined
by IREF, the output resistance of Q2 determines the dependence of Iout. This
may be perceived as a disadvantage of this configuration – the output
resistance of the current mirror (called RTH in your text) is limited by the ro
of Q2, or

VA V
ro = ≈ A .
I out I REF
Widlar Current Source

The Widlar current source differs from

the basic current mirror in one
important way – a resistor (R2) is
added to the emitter circuit of
transistor Q2. Since multistage amplifier
systems often have high gain, bias
currents must be small. Instead of the
large resistors required to create small
currents, the Widlar current source
generates small constant currents using
relatively small resistors. This allows
considerable savings in chip real estate
– which, as was mentioned before and
will be mentioned often, is considered
one of the ultimate goals in IC design.

The dc representation of Equation 4.10 is (assuming n=1)

⎛ VBE ⎞
⎜ ⎟
⎜ V ⎟
IC = Ioe ⎝ T ⎠
, (Equation 4.10, Modified)

where
Io is the reverse saturation current
VT is the thermal voltage (kT/q≈26mV at room temperature)

Solving Equation 4.10 for VBE, we get

⎛I ⎞
VBE = VT ln⎜⎜ C ⎟⎟ .
⎝ IO ⎠

Using this information, and neglecting base currents, we can express VBE1
and VBE2 in the circuit above as follows:

⎛I ⎞ ⎛I ⎞ ⎛I ⎞ ⎛I ⎞
VBE 1 = VT ln⎜⎜ C 1 ⎟⎟ ≅ VT ln⎜⎜ REF ⎟⎟; VBE 2 = VT ln⎜⎜ C 2 ⎟⎟ = VT ln⎜⎜ out ⎟⎟ .
⎝ IO ⎠ ⎝ IO ⎠ ⎝ IO ⎠ ⎝ IO ⎠

Assuming we have matched devices, VT and IO are the same for Q1 and Q2.
Subtracting VBE2 from VBE1, and using the appropriate property of logarithms
(i.e., lnA-lnB=ln(A/B)), we get
 ⎛I ⎞
VBE 1 − VBE 2 = VT ln⎜⎜ REF ⎟⎟ .
⎝ I out ⎠

Hang on, we’re getting ready to use all this stuff!

Writing a KVL around the base loop of the two transistors,

VBE1 = VBE 2 + I E 2 R2 ; or VBE1 − VBE 2 = I E 2 R2 . (Equation 5.61)

Here we go! Assuming that IC2=IE2=Iout, and using our expression for VBE1-
VBE2,

⎛I ⎞
I out R2 = VT ln⎜⎜ REF ⎟⎟ . (Equation 5.63, Modified)
⎝ I out ⎠

Since IREF (=IC1) is usually defined in design, Equation 5.63 can be solved for
the required value of R2.

Another improvement of the Widlar current source over the basic current
mirror is the increased output resistance. The figure to the left below (Figure
5.29a) is the ac small signal model of the Widlar current source, and that to
the right is a simplified version (Figure 5.29b), where r’π=(R1||re)+rπ. Now,
before you convince yourself that this cannot be right, remember that the
small signal model of a diode connected BJT is simply re…

Using the method of applying a test voltage vTH and solving for the resulting
current iTH (or vice versa), we can solve for RTH=vTH/iTH. Analyzing the
simplified circuit (above right), we get the following definitions:
 v TH = v 1 + v 2
v 1 = − i b2 r ' π
v 2 = (iTH − βi b2 )ro . (Equations 5.64 & 5.65)
v2
i TH = β i b2 +
ro

The equivalent output resistance is then given by:

ro (1 + β + rπ' / R2 ) + rπ'
RTH = . (Equation 5.66)
1 + rπ' / R2

By making the assumption that r’π is much larger than R2, and using
r’π=βVT/IC2, the equivalent output resistance may be approximated by

⎛ I R ⎞ ⎛ I R ⎞
RTH = ro ⎜⎜1 + C 2 2 ⎟⎟ = ro ⎜⎜1 + out 2 ⎟⎟ . (Equation 5.69)
⎝ VT ⎠ ⎝ VT ⎠

Note that the term IoutR2 is the dc voltage drop across the resistor R2 and the
larger this voltage, the larger the output resistance.

Wilson Current Source

Another current source configuration that

possesses increased output resistance is the
Wilson current source. The increased ro of the
Wilson current source is due to the negative
feedback provided by Q3. This configuration
uses three transistors as shown in Figure
5.30 of your text and as reproduced to the
right.

Performing an analysis similar to the Widlar

current source, we can derive an expression
for the output resistance of the Wilson
current source to be:

βro βV A
RTH = = . (Equation 5.80)
2 2I C 2

Writing a KCL equation at the emitter of Q2:

 I E 2 = I C 3 + I B1 + I B3 . (Equation 5.71)

If all three transistors are matched VBE1=VBE2=VBE3, β1=β2=β3, IB1=IB3, and

IC1=IC3. With this information and the relationship between base and
collector currents (IB=IC/β), we can rewrite the expression for IE2 as

⎛ 2⎞
I E 2 = I C 3 ⎜⎜1 + ⎟⎟ . (Equation 5.73)
⎝ β⎠

Using IC2=αIE2=βIE2/(β+1) and simplifying,

I C 3 (1 + 2 / β )β I (β + 2)
IC2 = = C3 . (Equation 5.75, Modified)
β +1 (β + 1)

Now, if we sum the currents at the base of Q2,

I C 1 = I C 3 = I REF − I B2 = I REF − I C 2 / β . (Equation 5.76, Modified)

Substituting Equation 5.76 into Equation 5.75 and solving for IC2, we get an
expression for the output current (IC2) in terms of the transistor parameter β
and the input current, IREF:

β 2 + 2β ⎛ 2 ⎞
IC2 = 2 I REF = ⎜⎜1 − 2 ⎟⎟ I REF . (Equation 5.78)
β + 2β + 2 ⎝ β + 2 β + 2 ⎠

For reasonable values of β, the second term will be negligible and

IC2=Iout=IREF. Therefore, in addition to the increased output resistance, the
Wilson configuration provides an output that is almost independent of the
internal transistor characteristics…a very good thing!

Multiple Current Sources Using Current Mirrors

As mentioned earlier, a
constant dc current may be
generated at some point on
a chip and reproduced at
multiple other locations to
bias the various amplifier
stages on the IC. An
example of such a circuit is
shown to the right and is a
modified version of Figure 5.31 in your text. Note that Q2 and Q3 form a
current mirror with transistor Q1, while Q4 is a Widlar current source because
it has a resistor in the emitter leg. The amount of current delivered by this
source can be determined by the size of this emitter resistor. Also, when
using the Widlar circuit, the output current(s) may be different from the
original reference current, IIN.

However, there is a point of concern when using a multiple current source

circuit. The effect of finite transistor β yields a cumulative effect of errors
introduced by multiple base currents. This problem is easily overcome by
restricting the number of outputs of the multiple current source and carefully
selecting transistors with appropriate β.
5/6/2011 section 7_3 The BJT Differential Pair 1/1

7.3 The BJT Differential Pair

Reading Assignment: pp. 704-720

VCC

In addition to common-
emitter, common-
collector (i.e., the RC RC
vO 1 (t )
emitter follower), and vO 2 (t )
common-base amplifiers,
a fourth important and v1 Q1 iE 1 iE 2 Q2 v
+ + 2
“classic” BJT amplifier
vBE 1 vBE 2
stage is the differential
− −
pair. I

VEE

HO: Large Signal Operation of the BJT Differential

Pair

The differential pair is a differential amplifier—we express

its performance in terms of differential and common-mode
gains.

HO: Small-Signal Analysis of the BJT Differential

Pair

Jim Stiles The Univ. of Kansas Dept. of EECS

5/6/2011 Large Signal Operation of BJT diff pair 1/7

Large-Signal Operation of
BJT Differential Pair
Consider the BJT differential pair:

VCC
Note:

vE 1 = vE 2  vE

RC RC
vO 1 (t )
and:
vO 2 (t )

v1 Q1 iE 1 iE 2 Q2 v2
+ + iE 1 + iE 2 = I
vBE 1 vBE 2
− −
I

VEE

Also, we know that:

Is vBE VT 1
Is vBE 2

iE 1 = e iE 2 = e VT

α α
where

vBE 1 = v1 − vE and vBE 2 = v2 − vE

5/6/2011 Large Signal Operation of BJT diff pair 2/7

Therefore, the emitter currents can be written in terms of

the base voltages as:

⎛ I s −vE VT ⎞ v1VT ⎛ Is −vE VT ⎞ v2VT

iE 1 =⎜ e ⎟e iE 2 =⎜ e ⎟e (A)
⎝ α ⎠ ⎝ α ⎠

Of course, we know that I = iE 1 + iE 2 , thus:

⎛ Is −vE VT ⎞ ⎛ v1VT v2
⎞
I =⎜ e ⎟ ⎜ e + e VT ⎟
⎝α ⎠⎝ ⎠

And rearranging we find:

Is −vE VT I
e = v1 v2 (B)
α
e VT
+e VT

Now, we can insert equation (B) into equation (A) and find:

v1
I e VT
I
iE 1 = v1 v2 = − (v1 −v2 )
e VT
+e VT
1+e VT
5/6/2011 Large Signal Operation of BJT diff pair 3/7

as well as:

v2
I e VT
I
iE 2 = v1 v2 = + (v1 −v2 )
e VT
+e VT
1+e VT

Now, let’s define a differential voltage:

vD = v 1 − v 2

We can now (finally) write the emitter currents in terms of

this differential voltage vD only!

I
iE 1 = −vD
1+e VT

I
iE 2 = +vD
1+e VT

In other words, the emitter current in a differential pair is

independent of the common-mode voltage vcm = (v1 + v2 ) 2 !
5/6/2011 Large Signal Operation of BJT diff pair 4/7

Now, let’s examine this result more closely. We will consider

3 cases, vD = 0, vD  VT , and vD  −VT .

vD = 0

When v1 = v2 (i.e., vD = 0 ), we find that the emitter currents

are equal, with each taking half of the available current I:

vD −vD
I I
e VT
=e VT
=1 , ∴ iE 1 = iE 2 = = .
1+1 2
VCC

RC RC

v1 = v 2 Q1 Q2 v 2 = v1

I 2 I 2
I
VEE
5/6/2011 Large Signal Operation of BJT diff pair 5/7

vD VT

When vD VT (i.e., vD  25mV ), we find that the emitter

current iE 1 takes all the available current, leaving emitter
current iE 2 with none:

−vD
I
e VT
≈0 , ∴ iE 1 = =I
1+0
and

vD
I
e VT
≈∞ , ∴ iE 2 = =0
1+∞

VCC

RC RC

v1 > v2 +VT Q1 Q2 v2 < v1 −VT

I 0

I
VEE
5/6/2011 Large Signal Operation of BJT diff pair 6/7

vD  −VT

When vD  −VT (i.e., vD  −25mV ), we find that the emitter

current iE 2 takes all the available current, leaving emitter
current iE 1 with none:

−vD
I
e VT
≈∞ , ∴ iE 1 = =0
1+∞
and

vD
I
e VT
≈0, ∴ iE 2 = =I
1+0

VCC

RC RC

v1 < v2 −VT Q1 Q2 v2 > v1 +VT

0 I
I
VEE
5/6/2011 Large Signal Operation of BJT diff pair 7/7

Recall that for BJTs in the active mode, the collector current
is related to the emitter current by iC = α iE .

Thus, we can plot the collector currents iC 1 and iC 2 as a

function of differential voltage vD :

1.0
iC 1 iC 2
I 0.8 I

0.6

0.4

0.2
vD
VT
10 5 5 10

Note for vD < ≈ 2VT :

d iC
1
d vD

Q: Is this important? What does this mean?

A:
5/11/2011 Differential Mode Small Signal Analysis of BJT Diff Pair 1/21

Small-Signal Analysis of
BJT Differential Pairs
Now lets consider the case where each input of the
differential pair consists of an identical DC bias term VB, and
also an AC small-signal component (i.e., v1(t ) and v2(t ) )

VCC

RC RC
vO 1 (t )
vO 2 (t )

VB + v1(t ) Q1 iE 1 iE 2 Q2 v2(t ) +VB

+ +
vBE 1 vBE 2
− −
I
VEE
As a result, the open-circuit output voltages will likewise have
a DC and small-signal component.
 5/11/2011 Differential Mode Small Signal Analysis of BJT Diff Pair 2/21

Recall that we can alternatively express these two small-signal

components in terms of their average (common-mode):

v1(t ) + v2(t )
vcm (t ) 
2

and their differential mode:

vd (t )  v1(t ) − v2(t )

Such that:

vd (t ) vd (t )
v1(t ) = vcm(t ) + v2(t ) = vcm(t ) −
2 2

I.E.: VCC

RC RC
vO 1 (t )
vO 2 (t )
vd (t ) vd (t )
VB +vcm (t ) + Q1 iE 1 iE 2 Q2 vcm (t ) − +VB
2 + + 2
vBE 1 vBE 2
− −
I
VEE
5/11/2011 Differential Mode Small Signal Analysis of BJT Diff Pair 3/21

Now, let’s determine the small-signal voltage gain of this

amplifier!

Q: What do you mean by gain? Is it:

vo 1 vo 2 vo 1 vo 2
Avo  or Avo  or Avo  or Avo  ???
v1 v2 v2 v1

A: Actually, none of those definitions!

This is a differential amplifier, so we typically define gain in

terms of its common-mode ( Acm ) and differential ( Ad ) gains:

vo 1 vo 2 vo 1 v
Acm  = and Ad  = − o2
vcm vcm vd vd

So that:
vo 1(t ) = Acm vcm (t ) + Ad vd (t )

vo 2(t ) = Acm vcm (t ) − Ad vd (t )

Q: So how do we determine the differential and common-

mode gains?

A: The first step—of course—is to accomplish a DC analysis;

turn off the small-signal sources!