EXPERIMENT-10

Aim: - To study & perform voltage divider biasing circuit & find its stability.

Apparatus:-

 Transistor
 Resister
 Soldering iron
 Power supply
 Wires
 DMM

Theory:-

A very common used biasing arrangement is self bias. Fig shows the all there of
emitter Bias. In this method R1 & R2 are connected across supply voltage Vcc &
provide bias-Ing. RE provide stabillration. The name voltage divider stabilization the
name voltage divider to divided from the fact that R1 & R2 from a potential divider
across Vcc. If cause, a voltage drop in direction so as to R.B. the emitter junction. The
improvement in operation point stability man be explained as follows:

Let there be a rise in I co i.e. a rise in IC. Now current in RE, increase as a result,
voltage drop across RE tests & IB decreased & so IE thus presence of RE reduce the
increase in IE & Improve the operating it stability in case of emitter to avoid the fad back
caused by RE The capacitance offers a very small reactance to ac signal & hence it passes
through the capacitance.

Let current I, flows through R1 as the base current I B is very small, the current
following through R2 can abo be taken as I1
Thus,
I1 = Vcc / R1+R2

Applying KVL to the base circuit:-

V2 +VBE + VE = 0
V2= VBE + VE
V2= VBE +IE RE
= VBE +IE RE
Ic = V2 - VBE /
RE
Ic is almost independent of transistor parameter & hence good stabilization is ensued.
The collector emitter voltage can be calculated by collector circuit.
Applying KVL to alt:
 VCC + IERE +VCC – IE- RE = 0
VCE = VCC – IERE - ICRE
VCE = VCC – IC (RE +RE )

 Circuit analysis using invenius equipment circuit :-

Thevenin’s equivalent circuit is:

Vth = Vcc. R2/ R1 + R2

Rth = RB = R1 / R2 = R1R2 / R1 +R2

Applying KVL to base emitter cut

Vth = IB Rth + VBE + (IB + IC)RE

IC = Vcc – VCE / Rc = RE

Vth = IB Rth + VBE + RE (IB + VCC – VCE / RE + RE)

 Stability factor s for voltage divider bias:

VT = IB RB + VBE + RE + (IB + IC)

Diff partially root Ie & considering VBE to be independent of Ic, we get,
0 = ðIB /ðIc x RB + ðIB / ðIc x RE + RE
ðIB / ðIc = -RE / RE + RB
ð = 1+B / 1+B (RE / RE+RB) (S= 1+B / 1+B (ðIB / ðIC))

Figure:-
Procedure:-

1) Connect the clt as per diagram

2) First measure IB, IC, VCE for room temperature of transistor
3) Measure IB, IC, VCE again by applying high temperature by soldering
iron.
4) Take two reading for two temperature T1 & T2 (T2 > T1)
5) From the reading make calculation & find stability factor S.

Observation Table:-

Temp IB (UA) IC (UA) IB (UA) IC (UA)

T
T1
T2

Calculation:-

 Reading 1:-
Vtn =