Professional Documents
Culture Documents
Eca Labmanual Multisim 11
Eca Labmanual Multisim 11
DEPARTMENT
OF
ELECTRONICS & COMMUNICATION ENGINEERING
INDEX
S.NO
PAGE.NO
SOFT WARE
1. COMMON EMITTER AND COMMON SOURCE
AMPLIFIER.
2. TWO STAGE RC COUPLED AMPLIFIER.
16
21
25
32
HARD WARE
7. TWO STAGE RC COUPLED AMPLIFER
38
41
9.
44
48
50
52
NPN Transistor 2N2923 for the specifications : IC= 3 mA, Vce = 10v, = 190,
& IR1 = 32IB .verify DC values (Voltage and current) at various nodes using
MULTISIM.
APPARATUS: - Multisim Soft ware.
DESIGN PROCEDURE:
Vcc = 25V
Select VRE VCE
Select VRE = 5V
RE =
V RE
5
=
= 1.66K (select 2.00K )
IC
3m
& VRC=VCC-VCE-VRE=25-10-5=10V
RC =
V RC
10
=
= 3.33K
3m
IC
I C = 3m
= 15A
190
B
5.65
VB
=
= 12.15K
I R 2 465
VCC V B
I R1
25 5.65
= 40.3125K
480
CIRCUIT DIAGRAM:-
VCC
25V
VCC
R1
40.2kOhm_1%
R4
40.2kOhm_1%
10
V4
0V
9
V3
0V
Q1
7
2N2923
V2
11
0V
V1
0V
2
3
R2
12kOhm_5%
R3
2.00kOhm_1%
PROCEDURE:- 1. Rig up the circuit using multisim software and verify the
results using DC operating point analysis (simulate ---- analysis ----- DC
operating point).
2.Rig up the circuit using multisim software and verify the results using DC
transfer characteristic analysis(simulate ---- analysis ----- DC sweep)
RESULT:- The CE single stage amplifier is designed. The D.C voltages and
currents at various nodes are observed. The D.C transfer characteristic is
plotted.
12V
VDD VDS min
VS = VRD =
RD = RS =
VRD
ID
24 12
=6
2
2
6
=
= 6K(Use s tan dard value6.3K)
1m
VG = VS VGS = 6 2 = 4V = VR 2
Select R2 =1M
R1 =
VR1
R2
V R2
VR1 = VDD VG = 24 4 = 20
20 1M
= 5M
R1 =
4
(Use s tan dard value which is less than or equal to 5M i.e. 4.7M )
CIRCUIT DIAGRAM:
PROCEDURE:- 1. Rig up the circuit using multisim software and verify the
results using DC operating point analysis (simulate----analysis ---- DC operating
point)
7
2.Rig up the circuit using multisim software and verify the results using DC
transfer characteristic analysis(simulate ---- analysis ----- DC sweep)
3. Rig up the circuit using multisim software and verify the results using AC
analysis (Simulate ---- analysis ----- AC analysis)
8
4.Rig up the circuit using multisim software and verify the results using
Oscilloscope
10
CIRCUIT DIAGRAM:
VCC
12V
R3
2.2kohm
R1
32.98kohm
V2
0V
5V1
0V
1
V3
BC107BP
Q1
0V
2R4
R2
5.1kohm
516ohm
11
PROCEDURE: Rig up the circuit using multisim software and verify the
analysis
DC
operating point)
DC Operating Point (Results)
1
8.05632v
928.05352mv
1.58077v
Vv1#branch
315.92573a
Vv2#branch
1.79258ma
vcc
12.00000v
vccvcc#branch
-2.10851ma
Q2) Design a single stage transistor amplifier with potential divider circuit
(using
an
npn
si
transistors)
with
following
specifications.
IB=IC/ = 2.32/33=0.07ma
VCC=IC(RC+RE)+VCE ; 12=2.32(2.2+RE)+5.7 ; RE=0.51k
V2=VBE+ICRE ; V2=0.7+2.32*0.51=1.88v
V2=I1R2 ; R2=V2/(I1=10IB) ; 1.88/0.7=2.68k
I1=VCC/(R1+R2) ; (R1+R2)=12/0.7=17.14k ; R1=17.14-2.68=14.46k
12
CIRCUIT DIAGRAM:
VCC
12V
R3
2.2kohm
R1
14.46kohm
V1
V2
0V
12
5 0V
V3
BC107BP
Q1
0V
R2
2.68kohm
R4
510ohm
PROCEDURE: Rig up the circuit using multisim software and verify the
analysis
13
DC
Q3) Cascade above two stages and find overall gain (choose Cc=4.7f,
Ce=470f, hfe=50) find the frequency response, DC operating points and
parameter sweep of load resister.
ANALYSIS:
Stage-2: AI2= -hfe/(1+hoeRL2) ; -50/(1+2/40) = -47.62
Ri2 = hie+hreAI2RL2 ;1.1+2.5e-4*-47.62*2 = 1.076k;
Av2= -AI2*RL2/Ri2 ; -47.62*2/1.076 = -88.51
Stage-1: RL1 = 2.2k||14.2||2.5||1.076 = 0.54k
AI1 = -50/(1+0.54/40) = -49.3
Ri1 = 1.1+2.5e-4*-49.3*0.54 = 1.106k
Av1 = -49.3*0.54/1.106 = -24.07
Overall gain Av = Av1*Av2 = 24.07*88.51= 2130.4
Avs = Av*Ri/(Ri+RS) ; Ri = 1.106||33||5.1= 0.88k
=2130.4*0.88/(0.88+15) =118
CIRCUIT DIAGRAM:
VCC 12V
VCC
R1
Rc2
2.2kOhm_5%
C5
14.0kOhm_1%
Rc1
33kOhm_5%
R12
2.2kOhm_5%
10
9
47uF
C3
Q1
BC107BP
5
Q3 4.7uF
BC107BP
C1
Rs
35kOhm_51%
1
4.7uF
R10
22kOhm_5%
V1
Re1
R2
15 C2
1mV
5.s1kOhm_5% 510Ohm_5%
0.71mV_rm
1000Hz
0Deg
2.55kOhm_1%
R22
470uF
11
Re2
XSC1
G
T
A
14
C4
470Ohm_5%
14
470uF
Note: In above two stage CE amplifier, all resistor values are same as trainer kit
values.
PROCEDURE:1. Rig up the circuit using multisim software and verify the
results using DC operating point analysis (simulate------- analysis ------DC operating point and AC analysis)
DC Operating Point (Results)
Node no
Voltage
2
9
15
5
11
10
1.57966
8.01593
926.65516m
1.83114
1.16896
6.54642
Rig up the circuit using multisim software and verify the results using
Parameter Sweep(Simulate------ analysis ------- Parameter sweep)
2.
15
RESULTS:
amplifiers. It is observed that Two stage amplifier gives a mid band gain of
1220.It is also observed that as load resistance is nearer to RC2, the out put
voltage is decreasing, since net load resistance is decreasing.
16
17
DESIGN PROCEDURE:
=
RE
470
IF
=
=
= 0.085
RF + RE 5K + 470
IE
AI =
I R I C 2 I B 2 I C1 I B1
=
IS
I B2
I C1 I B1 I S
IC2
I
= hFE = 50, C1 = hFE = 50
I B2
I B1
IC2
RC1
2.2K
=
=
= 0.67151
I C1 RC1 + RI 2 2.2K +1.076K
I B1
4K
R
=
=
= 0.8;Where R = RS //(470 + 5K ) = 4K
IS
R + hie 4K +1.1K
AI = (50)(0.67151)(50)(0.8) = 1.343K
D = 1 + AI = 1 + (0.085)(1.343K ) = 115.15
AIF =
AVF
AI 1.343K
=
= 11.66
D 115.15
R
V
I R
2.2K
= 0 = O C 2 = AIF C 2 = 11.66
= 1.71
RS
VS
15K
I S RS
18
CIRCUIT DIAGRAM:
VCC 12V
VCC
R3
33kohm
R4
2.2kohm
R9
2.2kohm
R7
14kohm
C2
C4
7
4.7uF
4
BC107BP
R10
Q1
C1
R1
15kohm 2
4.7uF
1 V1
1mV
0.71mV_rms
1000Hz
0Deg
5kohm
C3
3
R2
5.1kohm
5
R5
470uF
510ohm
Q2 47uF
BC107BP
R11
22kohm
6
8
R6
R8
2.55kohm
470ohm
0
XSC1
G
T
A
19
11
PROCEDURE:- 1. Rig up the circuit using multisim software and verify the
results using DC operating point analysis (simulate ---- analysis ----- DC
operating point)
2. Rig up the circuit using multisim software and verify the results using
Oscilloscope
20
3. Rig up the circuit using multisim software and verify the results using AC
analysis (simulate----- analysis----AC analysis)
4. Rig up the circuit using multisim soft ware and verify the results using
Parameter Sweep(Simulate ---- analysis ----- Parameter Sweep)
RESULT: The current shunt feed back amplifier is designed with feed back
resistance of 5K . The DC operating point values are obtained and the
frequency response is plotted.
21
22
DESIGN PROCEDURE:
a)
Let R = 10K
fr =
When K =
2 RC 6 + 4K
RC
R
C =
4K
10K
= 0.962nF 1nF (Select s tan dard )
2 10K 6K 6 + 4
R = 10K ; C = 1nF
b)
hfe 23 =
29
+ 4K for sustained oscillation
K
= 97.1
23
CIRCUIT DIAGRAM:
VCC
12V
VCC
R1
100kohm
R3
C2
XSC1
10
A
10uF
Q2
12
T
R2
22kohm
C3
100uF
11
R4
1kohm
0
C6
1.0nF6
9
R7
10kOhm_5%
C5
C4
1.0nF 7
1.0nF
R6
10kOhm_5%
R5
10kOhm_5%
24
2N2222A
10uF
PROCEDURE:
RESULT: RC phase shift oscillator with fr =6KHz is designed. The value of hfe
for the designed value is computed.
25
26
AIM :
To study the operation of Class A, Class AB, Class B, Class C power
amplifiers.
APPARATUS:
CIRCUIT DIAGRAM:
V2
12V
R2
1kohm
R5
1kohm
47C
uF
2
R1
C1
47uF
R3
30kohm
XSC1
Q1
PN2369A
G
T
A
100ohm
V1
50mV
35.36mV_rms
1000Hz
0Deg
R4
100ohm
THEORY:
The classification of amplifiers is based on the position of the quiescent
point and extent of the characteristics that is being used to determine the method
of operation.
There are 4 classes of operations.They are
1.Class A
2.Class AB
3.Class B
27
4.Class C
CLASS A:- In class A operation the quiescent point and the input signal are
such that the current in the output circuit (at the collector) flows for all times.
Class A amplifier operates essentially over a linear portion of its characteristic
there by giving rise to minimum of distortion .
CLASS B:- In class B operation , the quiescent point is at an extreme end of the
characteristic , so that under quiescent conditions the power drawn from the dc
power supply is very small .If the input signal is sinusoidal, amplification takes
place for only half cycle.
CLASS AB:- A class AB amplifier is the one that operates between the two
extremes defined for class A and Class B. Hence the output signal exists for
more than 1800 of the input signal.
CLASS C :- In class C operation, the quiescent operating point is chosen such
that output signal (voltage or current)is zero for more than on half of the input
sinusoidal signal cycle.
PROCEDURE:
1. An input sine wave (peak-peak)of 50mV is applied to the circuit.
2. connect the output to the C.R.O.
3. varying R3 value, observe and record the output waveforms for different
classes of operation.
4. Also observe the Vi & Vo waveforms using parameter sweep for different
classes of operation.
28
OBSERVATIONS:
CLASS A:
CLASS AB :
29
30
CLASS B :
31
CLASS C :
RESULT :
1. In class A amplifier output current flows for whole 3600
2. In class AB power amplifier output current flows between 1800 and 3600
3. In class B power amplifier output current flows for 1800
4.
In Class C power amplifier output current flows for less than 1800.
32
33
34
1.4
=1.03 K
1.35ma
Cb =
1
;
2 (Rs + Ri)C b
130=
1
6.28(100 + 22.6)C b
1
6.28(100 + 22.6)130
= 9.9 10-6 10 f
35
2.To Calculate RL
AV = -hfb
RL'
Ri
RL'
= 0.98 22.6
Overall gain = AVS = Av
Ri
Ri + Rs
RL'
Ri + Rs
RL1 = RL 11 RC =3.75k
RL = 15k
1
2RL
C
sh
C sh =
1
2 10 10 6 3.75k
= 4.24 pf 4pf
The Internal junction capacitance Cbc 3pf
Csh = Cbc + Csh
4.24 = 2.9pf + Csh
Csh = 1.34pf 2pf
36
CIRCUIT DIAGRAM :
XSC1
G
T
A
Rs
11000ohm
V1
10mV
7.07mV_rms
1000Hz
0Deg
Cb
11
10uF
12
Re
1kohm
10uF
BC107BP
Q1
Rc
5kohm
12V
7 VEE
2V
Cb1
3
R5
15kohm
Csh
2pF
VCC
0
PROCEDURE: 1.Rig up the circuit using multisim software and verify the
results using DC operating point analysis (Simulate ------Analysis------ DC
operating point)
37
2. Rig up the circuit using multisim software and verify the results using AC
analysis (Simulate--- Analysis--- AC analysis)
38
39
1. What are the factors to be taken into account in the high frequency model
of a transistor?
2. What are and cut off frequencies?
3. What is unity gain small signal band width?
4. What is the relation between fT & f?
5. What is the expression for trans conductance gm in the high frequency
model?
6. What is the expression for input conductance gb
e in terms of gm ?
7. What is base spreading resistance?
8. Give the expressions for the hybrid capacitances.
40
AIM:
1. To study the Two-stage RC coupled amplifier.
2. To measure the voltage gain of the amplifier at 1KHz.
3. To obtain the frequency response characteristic and the band width of the
amplifier.
EQUIPMENT:
Two stage RC coupled amplifier, trainer.
1. Signal Generator.
2. C.R.O
3. Connecting patch cords.
CIRCUIT DIAGRAM:
VCC
12V
R1
33kohm
R3
R6
2.2kohm
CC 15kohm
C2
Q1
10uF
BC107BP
C1
RG
15kohm
RC
2.2kohm
Q2
10uF
BC107BP
10uF
C3 OUTPUT
INPUT V
50mV
CE
R2
5.1kohm
RE
510ohm
10uF
2.7kohm
41
R4
R5
1kohm
10uF
VO
PROCEDURE:
1.Switch ON the power supply.
2. Connect the signal generator with sine wave output 50mV p-p at the
input terminals.
3. Connect the C.R.O at output terminals of the module.
4. Measure the voltage at the second stage of amplifier.
5. Now vary the input frequency from 10Hz to 1MHz in steps,and for every
value of input frequency note the output voltage
VO
42
FREQUENCY RESPONSE:
0.707 VO/VI
FL
FH
Gain VO/VI
FL
FH
RESULT:
The gain of the amplifier at 1 KHz is -----The BW of the amplifier is -------
43
Frequency
AIM:
1. To study the current shunt feedback amplifier
2. To measure the voltage gain of the amplifier at 1KHz.
3. To obtain the frequency response characteristic and the band width
of the amplifier.
EQUIPMENT:
Current shunt feed back amplifier trainer.
4. Signal Generator.
5. C.R.O
6. Connecting patch cords.
CIRCUIT DIAGRAM:
44
PROCEDURE:
1. Switch ON the power supply.
2. Connect the signal generator with sine wave output 50mV p-p at the
input terminals.
3. Connect the C.R.O at output terminals of the module.
4. Measure the voltage at the second stage of amplifier.
5. Now vary the input frequency from 10Hz to 1MHz in steps, and for
each value of input frequency note the output voltage keeping the
input amplitude at constant value.
6. Calculate the gain magnitude of the amplifier using the formula
Gain = Vo/Vi
Gain in dB= 20 log (Vo / Vi )
7. Plot a graph of frequency versus gain (dB) of the amplifier. Sample
frequency response graph is as shown in fig. Below.
OBSERVATIONS :
Vi = 50mV(p-p)
Frequency
VO
45
46
FREQUENCY RESPONSE:
RESULT:
The gain of the amplifier at 1 KHz is -----The BW of the amplifier is -------
47
AIM: To study the operation of Class A, Class B, Class AB and Class C power
amplifiers.
EQUIPMENT:
1.Class/A/B/C/AB amplifier trainer
2.Function generator.
3.C.R.O
4. Connecting patch cords.
CIRCUIT DIAGRAM:
48
PROCEDURE:
1.Connect the circuit as shown in the circuit diagram, and get the circuit
verified by your Instructor.
2. Connect the signal generator with sine wave at 1KHz and keep the
amplitude at .5V (peak-to-peak)
3. Connect the C.R.O across the output terminals.
4. Now switch ON the trainer and see that the supply LED glows.
5. Keep the potentiometer at minimum position, observe and record
the waveform from the C.R.O.
6. Slowly varying the potentiometer, observe the outputs for the
Class A/B/AB/C amplifiers as shown in fig.
CLASS A:
49
CLASS B:
CLASS AB:
50
CLASS C :
RESULT: It is observed that for class A amplifier, the transistor conducts for
360deg, for class AB more than 180deg and for Class C less than 180 deg.
51
CIRCUIT DIAGRAM:
52
PROCEDURE:
1.Connect the circuit as shown in fig and get the circuit verified by
your Instructor.
2. Connect the signal generator with sine wave at the input and
keep the amplitude to minimum position, and connect a C.R.O at
output terminals of the circuit.
3. Apply the amplitude between 1.6v to 4.4v to get the distortion
less output sine wave.
4. Now, vary the input frequency in steps and observe and record
The output voltage.
5. Calculate the gain of the tuned RF amplifier using the formula
Gain = out put voltage/ input voltage.
6. plot a graph with input frequency versus gain (in dBs)
Gain (in dBs) = 20 log (Vo/Vi)
Graph :-
Gain
Frequency
RESULT:
The tuned amplifier offers maximum gain at resonant frequency of the
tank circuit.
53
EQUIPMENT :
1. Series voltage regulated power supply trainer.
2. Multimeter.
3. Patch chords.
CIRCUIT DIAGRAM:
3055
560E
Rs
+ IL
IR
Un Regulated
Input
+
- IZ
500E
VO
50%
VZ=12V
PROCEDURE:
1. Switch ON the power supply.
2. Observe the Unregulated voltage at the output of rectifier.
3. Connect this voltage to the input of series voltage regulator circuit.
4. Keep the load resistance 1K at constant.
5. Observe the output voltage VO = VZ-VBE
54
6. And also observe the voltage across RS,and values of IR,IL and IZ.
7. Compare the practical values with theoretical values.
8. By changing the load resistance, observe the output voltage and various
currents.
OBSERVATIONS:
RL
VO
IR
IZ
IL
LOAD REGULATION :
VO
RL
RESULT:
The regulator maintains a constant output voltage inspite of the
changes in load conditions.
55
AIM : To study and design a Shunt Regulator and to observe the load
regulation feature.
EQUIPMENT :
1. Shunt regulated power supply trainer.
2. Multimeter.
3. Patch chords.
CIRCUIT DIAGRAM:
RS
220E
IL
+
Un Regulated
In put
8.2V
IC
1K
RL
VO
50%
3055
PROCEDURE:
1. Switch On the main power supply.
2. Observe the unregulated voltage at the output of rectifier.
3. Connect this voltage to the input of shunt Regulator circuit
4 .Keep the load resistance 1K constant.
5. Observe the output voltage across the load resistor V0 =VZ + VBE
56
VO
IS
IC
IL
LOAD REGULATION:
VO
RL
RESULT:
The regulator maintains a constant output voltage inspite of the
changes in load conditions.
57