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Clocks
Clock Sources:
LFXT1CLK : Low-frequency/high-frequency oscillator
supports 32KHz external crystal in LF mode (XTS=0). Appropriate
capacitance can be selected.
supports high speed crystal in HF mode (XTS=1, XCAPx=00 (cap setting))
supports use of external clock
LFXT1 can be disabled if it is not sourcing SMCLK or MCLK by setting OSCOFF
Clock Signals:
ACLK: Auxiliary clock.
The signal is sourced from LFXT1CLK with a divider of 1, 2, 4, or 8.
ACLK can be used as the clock signal for Timer A and Timer B.
ACLK can be divided by 1, 2, 4, or 8. ACLK is software selectable for individual
peripheral modules.
BCSCTL1
BCSCTL1:
This register is to
select the source of
ACLK and also used
to set DCO
Default value on
reset is 0x87h (1000
0111). This means
that XT2 is turned
off and LFXT1 in low
frequency mode is
selected with divider
being 1.
BCSCTL2:
The source of
MCLK and SMCLK
are selected.
The reset value
is 0000 0000.
This means that
the default
source for MCLK
and SMCLK is
DCO with divider
as 1 in both
cases.
1Mhz
8Mhz
12Mhz
16Mhz